上傳檔案到 'app/main/CTO20220622/build'

app/main/CTO20220622/build/SDIO.hex

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+:1027D800070C0CFA03F322EA0303E3600468E268D7
+:1027E8000B8803EB43031E3B8D6805FA03F3134381
+:1027F800E3604B68062B3DD80468626B03EB8303E8
+:10280800053B4FF01F0C0CFA03F322EA0303636342
+:102818000468626B4B6803EB8303053BB1F800C0A7
+:102828000CFA03F3134363630268414B9A4251D095
+:1028380002683F4B9A4256D0002380F83C30184635
+:1028480002B030BC7047046822699BB203EB4303B3
+:102858004FF0070C0CFA03F322EA03032361046820
+:1028680022690B8803EB43038D6805FA03F31343CE
+:102878002361BEE70C2B16D805682A6B03EB83038C
+:10288800233B1F2404FA03F322EA03032B6305689E
+:102898002A6B4B6803EB8303233B0C8804FA03F38E
+:1028A80013432B63C0E70568EA6A03EB8303413BE4
+:1028B8001F2404FA03F322EA0303EB620568EA6AB9
+:1028C8004B6803EB8303413B0C8804FA03F313437F
+:1028D800EB62A9E70B68122BAAD1164A536843F496
+:1028E80080035360A4E70B68103B012BA4D8114A5E
+:1028F800536843F4000353600B68102B9CD10E4BB4
+:102908001B6802F1467202F52E3202F28332A2FBF4
+:1029180003239B0C03EB83035B00019302E0019B01
+:10292800013B0193019B002BF9D185E7022087E742
+:10293800002001400023014014000020006C704773
+:10294800DFF834D0002103E00C4B5B5843500431CE
+:102958000B480C4B42189A42F6D30B4A02E000236C
+:1029680042F8043B094B9A42F9D3FFF7D3FC00F035
+:1029780011F8FEF70DFA704700000220342A01080A
+:10298800000000201800002018000020500100203E
+:10299800FEE7000070B50D4D0D4C641BA410002619
+:1029A800A64209D10B4D0C4C00F020F8641BA41072
+:1029B8000026A64205D170BD55F8043B984701365C
+:1029C800EEE755F8043B98470136F2E72C2A010850
+:1029D8002C2A01082C2A0108302A0108024403463F
+:1029E800934200D1704703F8011BF9E7F8B500BF1F
+:1029F800F8BC08BC9E467047F8B500BFF8BC08BCD8
+:042A08009E4670472F
+:102A0C000000000000000000010203040607080992
+:082A1C000000000001020304A8
+:082A240010E0FF7F010000003B
+:042A2C00AD010108EF
+:042A3000890101080F
+:102A34009A99793F85EB01400000C03F01000000F6
+:082A4400100000000024F40062
+:04000005080129497C
+:00000001FF

app/main/CTO20220622/build/adc.d

@@ -0,0 +1,57 @@
+build/adc.o: Src/adc.c Inc/adc.h Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Inc/adc.h:
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/adc.lst

@@ -0,0 +1,510 @@
+ARM GAS  /tmp/ccsyoZIu.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"adc.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.MX_ADC1_Init,"ax",%progbits
+  20              		.align	1
+  21              		.global	MX_ADC1_Init
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	MX_ADC1_Init:
+  27              	.LFB130:
+  28              		.file 1 "Src/adc.c"
+   1:Src/adc.c     **** /**
+   2:Src/adc.c     ****   ******************************************************************************
+   3:Src/adc.c     ****   * File Name          : ADC.c
+   4:Src/adc.c     ****   * Description        : This file provides code for the configuration
+   5:Src/adc.c     ****   *                      of the ADC instances.
+   6:Src/adc.c     ****   ******************************************************************************
+   7:Src/adc.c     ****   * @attention
+   8:Src/adc.c     ****   *
+   9:Src/adc.c     ****   * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  10:Src/adc.c     ****   * All rights reserved.</center></h2>
+  11:Src/adc.c     ****   *
+  12:Src/adc.c     ****   * This software component is licensed by ST under BSD 3-Clause license,
+  13:Src/adc.c     ****   * the "License"; You may not use this file except in compliance with the
+  14:Src/adc.c     ****   * License. You may obtain a copy of the License at:
+  15:Src/adc.c     ****   *                        opensource.org/licenses/BSD-3-Clause
+  16:Src/adc.c     ****   *
+  17:Src/adc.c     ****   ******************************************************************************
+  18:Src/adc.c     ****   */
+  19:Src/adc.c     **** 
+  20:Src/adc.c     **** /* Includes ------------------------------------------------------------------*/
+  21:Src/adc.c     **** #include "adc.h"
+  22:Src/adc.c     **** 
+  23:Src/adc.c     **** /* USER CODE BEGIN 0 */
+  24:Src/adc.c     **** 
+  25:Src/adc.c     **** /* USER CODE END 0 */
+  26:Src/adc.c     **** 
+  27:Src/adc.c     **** ADC_HandleTypeDef hadc1;
+  28:Src/adc.c     **** 
+  29:Src/adc.c     **** /* ADC1 init function */
+  30:Src/adc.c     **** void MX_ADC1_Init(void)
+ARM GAS  /tmp/ccsyoZIu.s 			page 2
+
+
+  31:Src/adc.c     **** {
+  29              		.loc 1 31 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 16
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33 0000 00B5     		push	{lr}
+  34              	.LCFI0:
+  35              		.cfi_def_cfa_offset 4
+  36              		.cfi_offset 14, -4
+  37 0002 85B0     		sub	sp, sp, #20
+  38              	.LCFI1:
+  39              		.cfi_def_cfa_offset 24
+  32:Src/adc.c     ****   ADC_ChannelConfTypeDef sConfig = {0};
+  40              		.loc 1 32 3 view .LVU1
+  41              		.loc 1 32 26 is_stmt 0 view .LVU2
+  42 0004 0023     		movs	r3, #0
+  43 0006 0093     		str	r3, [sp]
+  44 0008 0193     		str	r3, [sp, #4]
+  45 000a 0293     		str	r3, [sp, #8]
+  46 000c 0393     		str	r3, [sp, #12]
+  33:Src/adc.c     **** 
+  34:Src/adc.c     ****   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
+  35:Src/adc.c     ****   */
+  36:Src/adc.c     ****   hadc1.Instance = ADC1;
+  47              		.loc 1 36 3 is_stmt 1 view .LVU3
+  48              		.loc 1 36 18 is_stmt 0 view .LVU4
+  49 000e 1448     		ldr	r0, .L7
+  50 0010 144A     		ldr	r2, .L7+4
+  51 0012 0260     		str	r2, [r0]
+  37:Src/adc.c     ****   hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+  52              		.loc 1 37 3 is_stmt 1 view .LVU5
+  53              		.loc 1 37 29 is_stmt 0 view .LVU6
+  54 0014 4360     		str	r3, [r0, #4]
+  38:Src/adc.c     ****   hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+  55              		.loc 1 38 3 is_stmt 1 view .LVU7
+  56              		.loc 1 38 25 is_stmt 0 view .LVU8
+  57 0016 8360     		str	r3, [r0, #8]
+  39:Src/adc.c     ****   hadc1.Init.ScanConvMode = DISABLE;
+  58              		.loc 1 39 3 is_stmt 1 view .LVU9
+  59              		.loc 1 39 27 is_stmt 0 view .LVU10
+  60 0018 0361     		str	r3, [r0, #16]
+  40:Src/adc.c     ****   hadc1.Init.ContinuousConvMode = DISABLE;
+  61              		.loc 1 40 3 is_stmt 1 view .LVU11
+  62              		.loc 1 40 33 is_stmt 0 view .LVU12
+  63 001a 0376     		strb	r3, [r0, #24]
+  41:Src/adc.c     ****   hadc1.Init.DiscontinuousConvMode = DISABLE;
+  64              		.loc 1 41 3 is_stmt 1 view .LVU13
+  65              		.loc 1 41 36 is_stmt 0 view .LVU14
+  66 001c 80F82030 		strb	r3, [r0, #32]
+  42:Src/adc.c     ****   hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+  67              		.loc 1 42 3 is_stmt 1 view .LVU15
+  68              		.loc 1 42 35 is_stmt 0 view .LVU16
+  69 0020 C362     		str	r3, [r0, #44]
+  43:Src/adc.c     ****   hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  70              		.loc 1 43 3 is_stmt 1 view .LVU17
+  71              		.loc 1 43 31 is_stmt 0 view .LVU18
+  72 0022 114A     		ldr	r2, .L7+8
+ARM GAS  /tmp/ccsyoZIu.s 			page 3
+
+
+  73 0024 8262     		str	r2, [r0, #40]
+  44:Src/adc.c     ****   hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  74              		.loc 1 44 3 is_stmt 1 view .LVU19
+  75              		.loc 1 44 24 is_stmt 0 view .LVU20
+  76 0026 C360     		str	r3, [r0, #12]
+  45:Src/adc.c     ****   hadc1.Init.NbrOfConversion = 1;
+  77              		.loc 1 45 3 is_stmt 1 view .LVU21
+  78              		.loc 1 45 30 is_stmt 0 view .LVU22
+  79 0028 0122     		movs	r2, #1
+  80 002a C261     		str	r2, [r0, #28]
+  46:Src/adc.c     ****   hadc1.Init.DMAContinuousRequests = DISABLE;
+  81              		.loc 1 46 3 is_stmt 1 view .LVU23
+  82              		.loc 1 46 36 is_stmt 0 view .LVU24
+  83 002c 80F83030 		strb	r3, [r0, #48]
+  47:Src/adc.c     ****   hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  84              		.loc 1 47 3 is_stmt 1 view .LVU25
+  85              		.loc 1 47 27 is_stmt 0 view .LVU26
+  86 0030 4261     		str	r2, [r0, #20]
+  48:Src/adc.c     ****   if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  87              		.loc 1 48 3 is_stmt 1 view .LVU27
+  88              		.loc 1 48 7 is_stmt 0 view .LVU28
+  89 0032 FFF7FEFF 		bl	HAL_ADC_Init
+  90              	.LVL0:
+  91              		.loc 1 48 6 view .LVU29
+  92 0036 68B9     		cbnz	r0, .L5
+  93              	.L2:
+  49:Src/adc.c     ****   {
+  50:Src/adc.c     ****     Error_Handler();
+  51:Src/adc.c     ****   }
+  52:Src/adc.c     ****   /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+  53:Src/adc.c     ****   */
+  54:Src/adc.c     ****   sConfig.Channel = ADC_CHANNEL_4;
+  94              		.loc 1 54 3 is_stmt 1 view .LVU30
+  95              		.loc 1 54 19 is_stmt 0 view .LVU31
+  96 0038 0423     		movs	r3, #4
+  97 003a 0093     		str	r3, [sp]
+  55:Src/adc.c     ****   sConfig.Rank = 1;
+  98              		.loc 1 55 3 is_stmt 1 view .LVU32
+  99              		.loc 1 55 16 is_stmt 0 view .LVU33
+ 100 003c 0123     		movs	r3, #1
+ 101 003e 0193     		str	r3, [sp, #4]
+  56:Src/adc.c     ****   sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 102              		.loc 1 56 3 is_stmt 1 view .LVU34
+ 103              		.loc 1 56 24 is_stmt 0 view .LVU35
+ 104 0040 0023     		movs	r3, #0
+ 105 0042 0293     		str	r3, [sp, #8]
+  57:Src/adc.c     ****   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 106              		.loc 1 57 3 is_stmt 1 view .LVU36
+ 107              		.loc 1 57 7 is_stmt 0 view .LVU37
+ 108 0044 6946     		mov	r1, sp
+ 109 0046 0648     		ldr	r0, .L7
+ 110 0048 FFF7FEFF 		bl	HAL_ADC_ConfigChannel
+ 111              	.LVL1:
+ 112              		.loc 1 57 6 view .LVU38
+ 113 004c 28B9     		cbnz	r0, .L6
+ 114              	.L1:
+  58:Src/adc.c     ****   {
+ARM GAS  /tmp/ccsyoZIu.s 			page 4
+
+
+  59:Src/adc.c     ****     Error_Handler();
+  60:Src/adc.c     ****   }
+  61:Src/adc.c     **** 
+  62:Src/adc.c     **** }
+ 115              		.loc 1 62 1 view .LVU39
+ 116 004e 05B0     		add	sp, sp, #20
+ 117              	.LCFI2:
+ 118              		.cfi_remember_state
+ 119              		.cfi_def_cfa_offset 4
+ 120              		@ sp needed
+ 121 0050 5DF804FB 		ldr	pc, [sp], #4
+ 122              	.L5:
+ 123              	.LCFI3:
+ 124              		.cfi_restore_state
+  50:Src/adc.c     ****   }
+ 125              		.loc 1 50 5 is_stmt 1 view .LVU40
+ 126 0054 FFF7FEFF 		bl	Error_Handler
+ 127              	.LVL2:
+ 128 0058 EEE7     		b	.L2
+ 129              	.L6:
+  59:Src/adc.c     ****   }
+ 130              		.loc 1 59 5 view .LVU41
+ 131 005a FFF7FEFF 		bl	Error_Handler
+ 132              	.LVL3:
+ 133              		.loc 1 62 1 is_stmt 0 view .LVU42
+ 134 005e F6E7     		b	.L1
+ 135              	.L8:
+ 136              		.align	2
+ 137              	.L7:
+ 138 0060 00000000 		.word	.LANCHOR0
+ 139 0064 00200140 		.word	1073815552
+ 140 0068 0100000F 		.word	251658241
+ 141              		.cfi_endproc
+ 142              	.LFE130:
+ 144              		.section	.text.HAL_ADC_MspInit,"ax",%progbits
+ 145              		.align	1
+ 146              		.global	HAL_ADC_MspInit
+ 147              		.syntax unified
+ 148              		.thumb
+ 149              		.thumb_func
+ 151              	HAL_ADC_MspInit:
+ 152              	.LVL4:
+ 153              	.LFB131:
+  63:Src/adc.c     **** 
+  64:Src/adc.c     **** void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
+  65:Src/adc.c     **** {
+ 154              		.loc 1 65 1 is_stmt 1 view -0
+ 155              		.cfi_startproc
+ 156              		@ args = 0, pretend = 0, frame = 32
+ 157              		@ frame_needed = 0, uses_anonymous_args = 0
+ 158              		.loc 1 65 1 is_stmt 0 view .LVU44
+ 159 0000 00B5     		push	{lr}
+ 160              	.LCFI4:
+ 161              		.cfi_def_cfa_offset 4
+ 162              		.cfi_offset 14, -4
+ 163 0002 89B0     		sub	sp, sp, #36
+ 164              	.LCFI5:
+ARM GAS  /tmp/ccsyoZIu.s 			page 5
+
+
+ 165              		.cfi_def_cfa_offset 40
+  66:Src/adc.c     **** 
+  67:Src/adc.c     ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 166              		.loc 1 67 3 is_stmt 1 view .LVU45
+ 167              		.loc 1 67 20 is_stmt 0 view .LVU46
+ 168 0004 0023     		movs	r3, #0
+ 169 0006 0393     		str	r3, [sp, #12]
+ 170 0008 0493     		str	r3, [sp, #16]
+ 171 000a 0593     		str	r3, [sp, #20]
+ 172 000c 0693     		str	r3, [sp, #24]
+ 173 000e 0793     		str	r3, [sp, #28]
+  68:Src/adc.c     ****   if(adcHandle->Instance==ADC1)
+ 174              		.loc 1 68 3 is_stmt 1 view .LVU47
+ 175              		.loc 1 68 15 is_stmt 0 view .LVU48
+ 176 0010 0268     		ldr	r2, [r0]
+ 177              		.loc 1 68 5 view .LVU49
+ 178 0012 03F18043 		add	r3, r3, #1073741824
+ 179 0016 03F59033 		add	r3, r3, #73728
+ 180 001a 9A42     		cmp	r2, r3
+ 181 001c 02D0     		beq	.L12
+ 182              	.LVL5:
+ 183              	.L9:
+  69:Src/adc.c     ****   {
+  70:Src/adc.c     ****   /* USER CODE BEGIN ADC1_MspInit 0 */
+  71:Src/adc.c     **** 
+  72:Src/adc.c     ****   /* USER CODE END ADC1_MspInit 0 */
+  73:Src/adc.c     ****     /* ADC1 clock enable */
+  74:Src/adc.c     ****     __HAL_RCC_ADC1_CLK_ENABLE();
+  75:Src/adc.c     ****   
+  76:Src/adc.c     ****     __HAL_RCC_GPIOA_CLK_ENABLE();
+  77:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+  78:Src/adc.c     ****     PA4     ------> ADC1_IN4 
+  79:Src/adc.c     ****     */
+  80:Src/adc.c     ****     GPIO_InitStruct.Pin = GPIO_PIN_4;
+  81:Src/adc.c     ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+  82:Src/adc.c     ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+  83:Src/adc.c     ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+  84:Src/adc.c     **** 
+  85:Src/adc.c     ****   /* USER CODE BEGIN ADC1_MspInit 1 */
+  86:Src/adc.c     **** 
+  87:Src/adc.c     ****   /* USER CODE END ADC1_MspInit 1 */
+  88:Src/adc.c     ****   }
+  89:Src/adc.c     **** }
+ 184              		.loc 1 89 1 view .LVU50
+ 185 001e 09B0     		add	sp, sp, #36
+ 186              	.LCFI6:
+ 187              		.cfi_remember_state
+ 188              		.cfi_def_cfa_offset 4
+ 189              		@ sp needed
+ 190 0020 5DF804FB 		ldr	pc, [sp], #4
+ 191              	.LVL6:
+ 192              	.L12:
+ 193              	.LCFI7:
+ 194              		.cfi_restore_state
+  74:Src/adc.c     ****   
+ 195              		.loc 1 74 5 is_stmt 1 view .LVU51
+ 196              	.LBB2:
+ARM GAS  /tmp/ccsyoZIu.s 			page 6
+
+
+  74:Src/adc.c     ****   
+ 197              		.loc 1 74 5 view .LVU52
+ 198 0024 0021     		movs	r1, #0
+ 199 0026 0191     		str	r1, [sp, #4]
+  74:Src/adc.c     ****   
+ 200              		.loc 1 74 5 view .LVU53
+ 201 0028 03F58C33 		add	r3, r3, #71680
+ 202 002c 5A6C     		ldr	r2, [r3, #68]
+ 203 002e 42F48072 		orr	r2, r2, #256
+ 204 0032 5A64     		str	r2, [r3, #68]
+  74:Src/adc.c     ****   
+ 205              		.loc 1 74 5 view .LVU54
+ 206 0034 5A6C     		ldr	r2, [r3, #68]
+ 207 0036 02F48072 		and	r2, r2, #256
+ 208 003a 0192     		str	r2, [sp, #4]
+  74:Src/adc.c     ****   
+ 209              		.loc 1 74 5 view .LVU55
+ 210 003c 019A     		ldr	r2, [sp, #4]
+ 211              	.LBE2:
+  74:Src/adc.c     ****   
+ 212              		.loc 1 74 5 view .LVU56
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 213              		.loc 1 76 5 view .LVU57
+ 214              	.LBB3:
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 215              		.loc 1 76 5 view .LVU58
+ 216 003e 0291     		str	r1, [sp, #8]
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 217              		.loc 1 76 5 view .LVU59
+ 218 0040 1A6B     		ldr	r2, [r3, #48]
+ 219 0042 42F00102 		orr	r2, r2, #1
+ 220 0046 1A63     		str	r2, [r3, #48]
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 221              		.loc 1 76 5 view .LVU60
+ 222 0048 1B6B     		ldr	r3, [r3, #48]
+ 223 004a 03F00103 		and	r3, r3, #1
+ 224 004e 0293     		str	r3, [sp, #8]
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 225              		.loc 1 76 5 view .LVU61
+ 226 0050 029B     		ldr	r3, [sp, #8]
+ 227              	.LBE3:
+  76:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 228              		.loc 1 76 5 view .LVU62
+  80:Src/adc.c     ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ 229              		.loc 1 80 5 view .LVU63
+  80:Src/adc.c     ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ 230              		.loc 1 80 25 is_stmt 0 view .LVU64
+ 231 0052 1023     		movs	r3, #16
+ 232 0054 0393     		str	r3, [sp, #12]
+  81:Src/adc.c     ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 233              		.loc 1 81 5 is_stmt 1 view .LVU65
+  81:Src/adc.c     ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 234              		.loc 1 81 26 is_stmt 0 view .LVU66
+ 235 0056 0323     		movs	r3, #3
+ 236 0058 0493     		str	r3, [sp, #16]
+  82:Src/adc.c     ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 237              		.loc 1 82 5 is_stmt 1 view .LVU67
+ARM GAS  /tmp/ccsyoZIu.s 			page 7
+
+
+  83:Src/adc.c     **** 
+ 238              		.loc 1 83 5 view .LVU68
+ 239 005a 03A9     		add	r1, sp, #12
+ 240 005c 0148     		ldr	r0, .L13
+ 241              	.LVL7:
+  83:Src/adc.c     **** 
+ 242              		.loc 1 83 5 is_stmt 0 view .LVU69
+ 243 005e FFF7FEFF 		bl	HAL_GPIO_Init
+ 244              	.LVL8:
+ 245              		.loc 1 89 1 view .LVU70
+ 246 0062 DCE7     		b	.L9
+ 247              	.L14:
+ 248              		.align	2
+ 249              	.L13:
+ 250 0064 00000240 		.word	1073872896
+ 251              		.cfi_endproc
+ 252              	.LFE131:
+ 254              		.section	.text.HAL_ADC_MspDeInit,"ax",%progbits
+ 255              		.align	1
+ 256              		.global	HAL_ADC_MspDeInit
+ 257              		.syntax unified
+ 258              		.thumb
+ 259              		.thumb_func
+ 261              	HAL_ADC_MspDeInit:
+ 262              	.LVL9:
+ 263              	.LFB132:
+  90:Src/adc.c     **** 
+  91:Src/adc.c     **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
+  92:Src/adc.c     **** {
+ 264              		.loc 1 92 1 is_stmt 1 view -0
+ 265              		.cfi_startproc
+ 266              		@ args = 0, pretend = 0, frame = 0
+ 267              		@ frame_needed = 0, uses_anonymous_args = 0
+ 268              		.loc 1 92 1 is_stmt 0 view .LVU72
+ 269 0000 08B5     		push	{r3, lr}
+ 270              	.LCFI8:
+ 271              		.cfi_def_cfa_offset 8
+ 272              		.cfi_offset 3, -8
+ 273              		.cfi_offset 14, -4
+  93:Src/adc.c     **** 
+  94:Src/adc.c     ****   if(adcHandle->Instance==ADC1)
+ 274              		.loc 1 94 3 is_stmt 1 view .LVU73
+ 275              		.loc 1 94 15 is_stmt 0 view .LVU74
+ 276 0002 0268     		ldr	r2, [r0]
+ 277              		.loc 1 94 5 view .LVU75
+ 278 0004 064B     		ldr	r3, .L19
+ 279 0006 9A42     		cmp	r2, r3
+ 280 0008 00D0     		beq	.L18
+ 281              	.LVL10:
+ 282              	.L15:
+  95:Src/adc.c     ****   {
+  96:Src/adc.c     ****   /* USER CODE BEGIN ADC1_MspDeInit 0 */
+  97:Src/adc.c     **** 
+  98:Src/adc.c     ****   /* USER CODE END ADC1_MspDeInit 0 */
+  99:Src/adc.c     ****     /* Peripheral clock disable */
+ 100:Src/adc.c     ****     __HAL_RCC_ADC1_CLK_DISABLE();
+ 101:Src/adc.c     ****   
+ARM GAS  /tmp/ccsyoZIu.s 			page 8
+
+
+ 102:Src/adc.c     ****     /**ADC1 GPIO Configuration    
+ 103:Src/adc.c     ****     PA4     ------> ADC1_IN4 
+ 104:Src/adc.c     ****     */
+ 105:Src/adc.c     ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4);
+ 106:Src/adc.c     **** 
+ 107:Src/adc.c     ****   /* USER CODE BEGIN ADC1_MspDeInit 1 */
+ 108:Src/adc.c     **** 
+ 109:Src/adc.c     ****   /* USER CODE END ADC1_MspDeInit 1 */
+ 110:Src/adc.c     ****   }
+ 111:Src/adc.c     **** } 
+ 283              		.loc 1 111 1 view .LVU76
+ 284 000a 08BD     		pop	{r3, pc}
+ 285              	.LVL11:
+ 286              	.L18:
+ 100:Src/adc.c     ****   
+ 287              		.loc 1 100 5 is_stmt 1 view .LVU77
+ 288 000c 054A     		ldr	r2, .L19+4
+ 289 000e 536C     		ldr	r3, [r2, #68]
+ 290 0010 23F48073 		bic	r3, r3, #256
+ 291 0014 5364     		str	r3, [r2, #68]
+ 105:Src/adc.c     **** 
+ 292              		.loc 1 105 5 view .LVU78
+ 293 0016 1021     		movs	r1, #16
+ 294 0018 0348     		ldr	r0, .L19+8
+ 295              	.LVL12:
+ 105:Src/adc.c     **** 
+ 296              		.loc 1 105 5 is_stmt 0 view .LVU79
+ 297 001a FFF7FEFF 		bl	HAL_GPIO_DeInit
+ 298              	.LVL13:
+ 299              		.loc 1 111 1 view .LVU80
+ 300 001e F4E7     		b	.L15
+ 301              	.L20:
+ 302              		.align	2
+ 303              	.L19:
+ 304 0020 00200140 		.word	1073815552
+ 305 0024 00380240 		.word	1073887232
+ 306 0028 00000240 		.word	1073872896
+ 307              		.cfi_endproc
+ 308              	.LFE132:
+ 310              		.global	hadc1
+ 311              		.section	.bss.hadc1,"aw",%nobits
+ 312              		.align	2
+ 313              		.set	.LANCHOR0,. + 0
+ 316              	hadc1:
+ 317 0000 00000000 		.space	72
+ 317      00000000 
+ 317      00000000 
+ 317      00000000 
+ 317      00000000 
+ 318              		.text
+ 319              	.Letext0:
+ 320              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 321              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 322              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ 323              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
+ 324              		.file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
+ 325              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
+ARM GAS  /tmp/ccsyoZIu.s 			page 9
+
+
+ 326              		.file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
+ 327              		.file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
+ 328              		.file 10 "Inc/main.h"
+ 329              		.file 11 "Inc/adc.h"
+ARM GAS  /tmp/ccsyoZIu.s 			page 10
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 adc.c
+     /tmp/ccsyoZIu.s:20     .text.MX_ADC1_Init:0000000000000000 $t
+     /tmp/ccsyoZIu.s:26     .text.MX_ADC1_Init:0000000000000000 MX_ADC1_Init
+     /tmp/ccsyoZIu.s:138    .text.MX_ADC1_Init:0000000000000060 $d
+     /tmp/ccsyoZIu.s:145    .text.HAL_ADC_MspInit:0000000000000000 $t
+     /tmp/ccsyoZIu.s:151    .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
+     /tmp/ccsyoZIu.s:250    .text.HAL_ADC_MspInit:0000000000000064 $d
+     /tmp/ccsyoZIu.s:255    .text.HAL_ADC_MspDeInit:0000000000000000 $t
+     /tmp/ccsyoZIu.s:261    .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
+     /tmp/ccsyoZIu.s:304    .text.HAL_ADC_MspDeInit:0000000000000020 $d
+     /tmp/ccsyoZIu.s:316    .bss.hadc1:0000000000000000 hadc1
+     /tmp/ccsyoZIu.s:312    .bss.hadc1:0000000000000000 $d
+
+UNDEFINED SYMBOLS
+HAL_ADC_Init
+HAL_ADC_ConfigChannel
+Error_Handler
+HAL_GPIO_Init
+HAL_GPIO_DeInit

app/main/CTO20220622/build/gpio.d

@@ -0,0 +1,57 @@
+build/gpio.o: Src/gpio.c Inc/gpio.h Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Inc/gpio.h:
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/gpio.lst

@@ -0,0 +1,238 @@
+ARM GAS  /tmp/cceyi1nA.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"gpio.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.MX_GPIO_Init,"ax",%progbits
+  20              		.align	1
+  21              		.global	MX_GPIO_Init
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	MX_GPIO_Init:
+  27              	.LFB130:
+  28              		.file 1 "Src/gpio.c"
+   1:Src/gpio.c    **** /**
+   2:Src/gpio.c    ****   ******************************************************************************
+   3:Src/gpio.c    ****   * File Name          : gpio.c
+   4:Src/gpio.c    ****   * Description        : This file provides code for the configuration
+   5:Src/gpio.c    ****   *                      of all used GPIO pins.
+   6:Src/gpio.c    ****   ******************************************************************************
+   7:Src/gpio.c    ****   * @attention
+   8:Src/gpio.c    ****   *
+   9:Src/gpio.c    ****   * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  10:Src/gpio.c    ****   * All rights reserved.</center></h2>
+  11:Src/gpio.c    ****   *
+  12:Src/gpio.c    ****   * This software component is licensed by ST under BSD 3-Clause license,
+  13:Src/gpio.c    ****   * the "License"; You may not use this file except in compliance with the
+  14:Src/gpio.c    ****   * License. You may obtain a copy of the License at:
+  15:Src/gpio.c    ****   *                        opensource.org/licenses/BSD-3-Clause
+  16:Src/gpio.c    ****   *
+  17:Src/gpio.c    ****   ******************************************************************************
+  18:Src/gpio.c    ****   */
+  19:Src/gpio.c    **** 
+  20:Src/gpio.c    **** /* Includes ------------------------------------------------------------------*/
+  21:Src/gpio.c    **** #include "gpio.h"
+  22:Src/gpio.c    **** /* USER CODE BEGIN 0 */
+  23:Src/gpio.c    **** 
+  24:Src/gpio.c    **** /* USER CODE END 0 */
+  25:Src/gpio.c    **** 
+  26:Src/gpio.c    **** /*----------------------------------------------------------------------------*/
+  27:Src/gpio.c    **** /* Configure GPIO                                                             */
+  28:Src/gpio.c    **** /*----------------------------------------------------------------------------*/
+  29:Src/gpio.c    **** /* USER CODE BEGIN 1 */
+  30:Src/gpio.c    **** 
+ARM GAS  /tmp/cceyi1nA.s 			page 2
+
+
+  31:Src/gpio.c    **** /* USER CODE END 1 */
+  32:Src/gpio.c    **** 
+  33:Src/gpio.c    **** /** Configure pins
+  34:Src/gpio.c    **** */
+  35:Src/gpio.c    **** void MX_GPIO_Init(void)
+  36:Src/gpio.c    **** {
+  29              		.loc 1 36 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 40
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33 0000 30B5     		push	{r4, r5, lr}
+  34              	.LCFI0:
+  35              		.cfi_def_cfa_offset 12
+  36              		.cfi_offset 4, -12
+  37              		.cfi_offset 5, -8
+  38              		.cfi_offset 14, -4
+  39 0002 8BB0     		sub	sp, sp, #44
+  40              	.LCFI1:
+  41              		.cfi_def_cfa_offset 56
+  37:Src/gpio.c    **** 
+  38:Src/gpio.c    ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+  42              		.loc 1 38 3 view .LVU1
+  43              		.loc 1 38 20 is_stmt 0 view .LVU2
+  44 0004 0024     		movs	r4, #0
+  45 0006 0594     		str	r4, [sp, #20]
+  46 0008 0694     		str	r4, [sp, #24]
+  47 000a 0794     		str	r4, [sp, #28]
+  48 000c 0894     		str	r4, [sp, #32]
+  49 000e 0994     		str	r4, [sp, #36]
+  39:Src/gpio.c    **** 
+  40:Src/gpio.c    ****   /* GPIO Ports Clock Enable */
+  41:Src/gpio.c    ****   __HAL_RCC_GPIOA_CLK_ENABLE();
+  50              		.loc 1 41 3 is_stmt 1 view .LVU3
+  51              	.LBB2:
+  52              		.loc 1 41 3 view .LVU4
+  53 0010 0194     		str	r4, [sp, #4]
+  54              		.loc 1 41 3 view .LVU5
+  55 0012 1E4B     		ldr	r3, .L3
+  56 0014 1A6B     		ldr	r2, [r3, #48]
+  57 0016 42F00102 		orr	r2, r2, #1
+  58 001a 1A63     		str	r2, [r3, #48]
+  59              		.loc 1 41 3 view .LVU6
+  60 001c 1A6B     		ldr	r2, [r3, #48]
+  61 001e 02F00102 		and	r2, r2, #1
+  62 0022 0192     		str	r2, [sp, #4]
+  63              		.loc 1 41 3 view .LVU7
+  64 0024 019A     		ldr	r2, [sp, #4]
+  65              	.LBE2:
+  66              		.loc 1 41 3 view .LVU8
+  42:Src/gpio.c    ****   __HAL_RCC_GPIOD_CLK_ENABLE();
+  67              		.loc 1 42 3 view .LVU9
+  68              	.LBB3:
+  69              		.loc 1 42 3 view .LVU10
+  70 0026 0294     		str	r4, [sp, #8]
+  71              		.loc 1 42 3 view .LVU11
+  72 0028 1A6B     		ldr	r2, [r3, #48]
+  73 002a 42F00802 		orr	r2, r2, #8
+ARM GAS  /tmp/cceyi1nA.s 			page 3
+
+
+  74 002e 1A63     		str	r2, [r3, #48]
+  75              		.loc 1 42 3 view .LVU12
+  76 0030 1A6B     		ldr	r2, [r3, #48]
+  77 0032 02F00802 		and	r2, r2, #8
+  78 0036 0292     		str	r2, [sp, #8]
+  79              		.loc 1 42 3 view .LVU13
+  80 0038 029A     		ldr	r2, [sp, #8]
+  81              	.LBE3:
+  82              		.loc 1 42 3 view .LVU14
+  43:Src/gpio.c    ****   __HAL_RCC_GPIOC_CLK_ENABLE();
+  83              		.loc 1 43 3 view .LVU15
+  84              	.LBB4:
+  85              		.loc 1 43 3 view .LVU16
+  86 003a 0394     		str	r4, [sp, #12]
+  87              		.loc 1 43 3 view .LVU17
+  88 003c 1A6B     		ldr	r2, [r3, #48]
+  89 003e 42F00402 		orr	r2, r2, #4
+  90 0042 1A63     		str	r2, [r3, #48]
+  91              		.loc 1 43 3 view .LVU18
+  92 0044 1A6B     		ldr	r2, [r3, #48]
+  93 0046 02F00402 		and	r2, r2, #4
+  94 004a 0392     		str	r2, [sp, #12]
+  95              		.loc 1 43 3 view .LVU19
+  96 004c 039A     		ldr	r2, [sp, #12]
+  97              	.LBE4:
+  98              		.loc 1 43 3 view .LVU20
+  44:Src/gpio.c    ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+  99              		.loc 1 44 3 view .LVU21
+ 100              	.LBB5:
+ 101              		.loc 1 44 3 view .LVU22
+ 102 004e 0494     		str	r4, [sp, #16]
+ 103              		.loc 1 44 3 view .LVU23
+ 104 0050 1A6B     		ldr	r2, [r3, #48]
+ 105 0052 42F00202 		orr	r2, r2, #2
+ 106 0056 1A63     		str	r2, [r3, #48]
+ 107              		.loc 1 44 3 view .LVU24
+ 108 0058 1B6B     		ldr	r3, [r3, #48]
+ 109 005a 03F00203 		and	r3, r3, #2
+ 110 005e 0493     		str	r3, [sp, #16]
+ 111              		.loc 1 44 3 view .LVU25
+ 112 0060 049B     		ldr	r3, [sp, #16]
+ 113              	.LBE5:
+ 114              		.loc 1 44 3 view .LVU26
+  45:Src/gpio.c    **** 
+  46:Src/gpio.c    ****   /*Configure GPIO pin Output Level */
+  47:Src/gpio.c    ****   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
+ 115              		.loc 1 47 3 view .LVU27
+ 116 0062 0B4D     		ldr	r5, .L3+4
+ 117 0064 2246     		mov	r2, r4
+ 118 0066 4FF47041 		mov	r1, #61440
+ 119 006a 2846     		mov	r0, r5
+ 120 006c FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 121              	.LVL0:
+  48:Src/gpio.c    **** 
+  49:Src/gpio.c    ****   /*Configure GPIO pins : PD12 PD13 PD14 PD15 */
+  50:Src/gpio.c    ****   GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ 122              		.loc 1 50 3 view .LVU28
+ARM GAS  /tmp/cceyi1nA.s 			page 4
+
+
+ 123              		.loc 1 50 23 is_stmt 0 view .LVU29
+ 124 0070 4FF47043 		mov	r3, #61440
+ 125 0074 0593     		str	r3, [sp, #20]
+  51:Src/gpio.c    ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 126              		.loc 1 51 3 is_stmt 1 view .LVU30
+ 127              		.loc 1 51 24 is_stmt 0 view .LVU31
+ 128 0076 0123     		movs	r3, #1
+ 129 0078 0693     		str	r3, [sp, #24]
+  52:Src/gpio.c    ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 130              		.loc 1 52 3 is_stmt 1 view .LVU32
+ 131              		.loc 1 52 24 is_stmt 0 view .LVU33
+ 132 007a 0794     		str	r4, [sp, #28]
+  53:Src/gpio.c    ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 133              		.loc 1 53 3 is_stmt 1 view .LVU34
+ 134              		.loc 1 53 25 is_stmt 0 view .LVU35
+ 135 007c 0894     		str	r4, [sp, #32]
+  54:Src/gpio.c    ****   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 136              		.loc 1 54 3 is_stmt 1 view .LVU36
+ 137 007e 05A9     		add	r1, sp, #20
+ 138 0080 2846     		mov	r0, r5
+ 139 0082 FFF7FEFF 		bl	HAL_GPIO_Init
+ 140              	.LVL1:
+  55:Src/gpio.c    **** 
+  56:Src/gpio.c    **** }
+ 141              		.loc 1 56 1 is_stmt 0 view .LVU37
+ 142 0086 0BB0     		add	sp, sp, #44
+ 143              	.LCFI2:
+ 144              		.cfi_def_cfa_offset 12
+ 145              		@ sp needed
+ 146 0088 30BD     		pop	{r4, r5, pc}
+ 147              	.L4:
+ 148 008a 00BF     		.align	2
+ 149              	.L3:
+ 150 008c 00380240 		.word	1073887232
+ 151 0090 000C0240 		.word	1073875968
+ 152              		.cfi_endproc
+ 153              	.LFE130:
+ 155              		.text
+ 156              	.Letext0:
+ 157              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 158              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 159              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ 160              		.file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
+ARM GAS  /tmp/cceyi1nA.s 			page 5
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 gpio.c
+     /tmp/cceyi1nA.s:20     .text.MX_GPIO_Init:0000000000000000 $t
+     /tmp/cceyi1nA.s:26     .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
+     /tmp/cceyi1nA.s:150    .text.MX_GPIO_Init:000000000000008c $d
+
+UNDEFINED SYMBOLS
+HAL_GPIO_WritePin
+HAL_GPIO_Init

app/main/CTO20220622/build/main.d

@@ -0,0 +1,61 @@
+build/main.o: Src/main.c Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h Inc/adc.h \
+ Inc/main.h Inc/usart.h Inc/gpio.h
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+Inc/adc.h:
+Inc/main.h:
+Inc/usart.h:
+Inc/gpio.h:

app/main/CTO20220622/build/main.lst

@@ -0,0 +1,752 @@
+ARM GAS  /tmp/cclhzA2e.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"main.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.SystemClock_Config,"ax",%progbits
+  20              		.align	1
+  21              		.global	SystemClock_Config
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	SystemClock_Config:
+  27              	.LFB131:
+  28              		.file 1 "Src/main.c"
+   1:Src/main.c    **** /* USER CODE BEGIN Header */
+   2:Src/main.c    **** /**
+   3:Src/main.c    ****   ******************************************************************************
+   4:Src/main.c    ****   * @file           : main.c
+   5:Src/main.c    ****   * @brief          : Main program body
+   6:Src/main.c    ****   * @attention
+   7:Src/main.c    ****   *
+   8:Src/main.c    ****   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+   9:Src/main.c    ****   * All rights reserved.</center></h2>
+  10:Src/main.c    ****   *
+  11:Src/main.c    ****   * This software component is licensed by ST under BSD 3-Clause license,
+  12:Src/main.c    ****   * the License; You may not use this file except in compliance with the
+  13:Src/main.c    ****   * License. You may obtain a copy of the License at:
+  14:Src/main.c    ****   *                        www.st.com/SLA0044
+  15:Src/main.c    ****   *
+  16:Src/main.c    ****   ******************************************************************************
+  17:Src/main.c    ****   */
+  18:Src/main.c    **** /* USER CODE END Header */
+  19:Src/main.c    **** 
+  20:Src/main.c    **** /* Includes ------------------------------------------------------------------*/
+  21:Src/main.c    **** #include"main.h"
+  22:Src/main.c    **** #include "adc.h"
+  23:Src/main.c    **** #include "usart.h"
+  24:Src/main.c    **** #include "gpio.h"
+  25:Src/main.c    **** 
+  26:Src/main.c    **** /* Private variables ---------------------------------------------------------*/
+  27:Src/main.c    **** #define VECT_TAB_OFFSET  0x10000
+  28:Src/main.c    **** int tankstatus = 0;
+  29:Src/main.c    **** uint16_t M4_AD_Value = 0;
+  30:Src/main.c    **** float M4_voltage_V =0;
+ARM GAS  /tmp/cclhzA2e.s 			page 2
+
+
+  31:Src/main.c    **** float M4_pH_mid = 1.500;
+  32:Src/main.c    **** float M4_pH_low = 2.030;
+  33:Src/main.c    **** float M4_pH_high =0.975;
+  34:Src/main.c    **** float M4_PH=0;
+  35:Src/main.c    **** /* USER CODE BEGIN PV */
+  36:Src/main.c    **** typedef  void (*pFunction)(void);
+  37:Src/main.c    **** /* USER CODE END PV */
+  38:Src/main.c    **** /* Private function prototypes -----------------------------------------------*/
+  39:Src/main.c    **** void SystemClock_Config(void);
+  40:Src/main.c    **** /* USER CODE BEGIN PFP */
+  41:Src/main.c    **** /* USER CODE END PFP */
+  42:Src/main.c    **** /* Private user code ---------------------------------------------------------*/
+  43:Src/main.c    **** /* USER CODE BEGIN 0 */
+  44:Src/main.c    **** /* USER CODE END 0 */
+  45:Src/main.c    **** /**
+  46:Src/main.c    **** * @brief  The application entry point.
+  47:Src/main.c    **** * @retval int
+  48:Src/main.c    **** */
+  49:Src/main.c    **** int main(void)
+  50:Src/main.c    **** {
+  51:Src/main.c    ****   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
+  52:Src/main.c    ****   HAL_Init();
+  53:Src/main.c    ****   SystemClock_Config();
+  54:Src/main.c    ****   MX_GPIO_Init();
+  55:Src/main.c    ****   MX_USART2_UART_Init();
+  56:Src/main.c    ****   MX_UART4_Init();
+  57:Src/main.c    ****   MX_USART1_UART_Init();
+  58:Src/main.c    ****   MX_ADC1_Init();
+  59:Src/main.c    ****   while (1)
+  60:Src/main.c    ****   {
+  61:Src/main.c    ****     HAL_ADC_Start(&hadc1);
+  62:Src/main.c    ****     HAL_ADC_PollForConversion(&hadc1, 50);
+  63:Src/main.c    ****     if(HAL_IS_BIT_SET(HAL_ADC_GetState(&hadc1), HAL_ADC_STATE_REG_EOC))
+  64:Src/main.c    ****       {
+  65:Src/main.c    ****           M4_AD_Value = HAL_ADC_GetValue(&hadc1);
+  66:Src/main.c    ****           M4_voltage_V = M4_AD_Value*3.3f/4096;
+  67:Src/main.c    ****           if (M4_voltage_V > M4_pH_mid)
+  68:Src/main.c    ****            {
+  69:Src/main.c    ****                M4_PH = 7.0 - 3.0 / (M4_pH_low - M4_pH_mid) * (M4_voltage_V - M4_pH_mid);
+  70:Src/main.c    ****            }
+  71:Src/main.c    ****           else
+  72:Src/main.c    ****            {
+  73:Src/main.c    ****                M4_PH = 7.0 - 3.0 / (M4_pH_mid - M4_pH_high) * (M4_voltage_V - M4_pH_mid);
+  74:Src/main.c    ****            }
+  75:Src/main.c    ****       }
+  76:Src/main.c    ****     HAL_UART_Transmit(&huart4,(unsigned char*)&M4_PH,4,10);
+  77:Src/main.c    ****     HAL_Delay(10000);
+  78:Src/main.c    ****     if(M4_PH<14 && tankstatus == 0)
+  79:Src/main.c    ****     {
+  80:Src/main.c    ****          HAL_GPIO_WritePin(GPIOD,GPIO_PIN_15, GPIO_PIN_SET);
+  81:Src/main.c    **** 
+  82:Src/main.c    ****          HAL_Delay(30000);
+  83:Src/main.c    **** 
+  84:Src/main.c    ****          HAL_GPIO_WritePin(GPIOD,GPIO_PIN_15, GPIO_PIN_RESET);
+  85:Src/main.c    **** 
+  86:Src/main.c    ****     }
+  87:Src/main.c    ****   }
+ARM GAS  /tmp/cclhzA2e.s 			page 3
+
+
+  88:Src/main.c    **** }
+  89:Src/main.c    **** void SystemClock_Config(void)
+  90:Src/main.c    **** {
+  29              		.loc 1 90 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 80
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33 0000 30B5     		push	{r4, r5, lr}
+  34              	.LCFI0:
+  35              		.cfi_def_cfa_offset 12
+  36              		.cfi_offset 4, -12
+  37              		.cfi_offset 5, -8
+  38              		.cfi_offset 14, -4
+  39 0002 95B0     		sub	sp, sp, #84
+  40              	.LCFI1:
+  41              		.cfi_def_cfa_offset 96
+  91:Src/main.c    ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  42              		.loc 1 91 3 view .LVU1
+  43              		.loc 1 91 22 is_stmt 0 view .LVU2
+  44 0004 3022     		movs	r2, #48
+  45 0006 0021     		movs	r1, #0
+  46 0008 08A8     		add	r0, sp, #32
+  47 000a FFF7FEFF 		bl	memset
+  48              	.LVL0:
+  92:Src/main.c    ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  49              		.loc 1 92 3 is_stmt 1 view .LVU3
+  50              		.loc 1 92 22 is_stmt 0 view .LVU4
+  51 000e 0024     		movs	r4, #0
+  52 0010 0394     		str	r4, [sp, #12]
+  53 0012 0494     		str	r4, [sp, #16]
+  54 0014 0594     		str	r4, [sp, #20]
+  55 0016 0694     		str	r4, [sp, #24]
+  56 0018 0794     		str	r4, [sp, #28]
+  93:Src/main.c    ****   __HAL_RCC_PWR_CLK_ENABLE();
+  57              		.loc 1 93 3 is_stmt 1 view .LVU5
+  58              	.LBB2:
+  59              		.loc 1 93 3 view .LVU6
+  60 001a 0194     		str	r4, [sp, #4]
+  61              		.loc 1 93 3 view .LVU7
+  62 001c 1A4B     		ldr	r3, .L3
+  63 001e 1A6C     		ldr	r2, [r3, #64]
+  64 0020 42F08052 		orr	r2, r2, #268435456
+  65 0024 1A64     		str	r2, [r3, #64]
+  66              		.loc 1 93 3 view .LVU8
+  67 0026 1B6C     		ldr	r3, [r3, #64]
+  68 0028 03F08053 		and	r3, r3, #268435456
+  69 002c 0193     		str	r3, [sp, #4]
+  70              		.loc 1 93 3 view .LVU9
+  71 002e 019B     		ldr	r3, [sp, #4]
+  72              	.LBE2:
+  73              		.loc 1 93 3 view .LVU10
+  94:Src/main.c    ****   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  74              		.loc 1 94 3 view .LVU11
+  75              	.LBB3:
+  76              		.loc 1 94 3 view .LVU12
+  77 0030 0294     		str	r4, [sp, #8]
+  78              		.loc 1 94 3 view .LVU13
+ARM GAS  /tmp/cclhzA2e.s 			page 4
+
+
+  79 0032 164B     		ldr	r3, .L3+4
+  80 0034 1A68     		ldr	r2, [r3]
+  81 0036 42F48042 		orr	r2, r2, #16384
+  82 003a 1A60     		str	r2, [r3]
+  83              		.loc 1 94 3 view .LVU14
+  84 003c 1B68     		ldr	r3, [r3]
+  85 003e 03F48043 		and	r3, r3, #16384
+  86 0042 0293     		str	r3, [sp, #8]
+  87              		.loc 1 94 3 view .LVU15
+  88 0044 029B     		ldr	r3, [sp, #8]
+  89              	.LBE3:
+  90              		.loc 1 94 3 view .LVU16
+  95:Src/main.c    ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  91              		.loc 1 95 3 view .LVU17
+  92              		.loc 1 95 36 is_stmt 0 view .LVU18
+  93 0046 0225     		movs	r5, #2
+  94 0048 0895     		str	r5, [sp, #32]
+  96:Src/main.c    ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  95              		.loc 1 96 3 is_stmt 1 view .LVU19
+  96              		.loc 1 96 30 is_stmt 0 view .LVU20
+  97 004a 0123     		movs	r3, #1
+  98 004c 0B93     		str	r3, [sp, #44]
+  97:Src/main.c    ****   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  99              		.loc 1 97 3 is_stmt 1 view .LVU21
+ 100              		.loc 1 97 41 is_stmt 0 view .LVU22
+ 101 004e 1023     		movs	r3, #16
+ 102 0050 0C93     		str	r3, [sp, #48]
+  98:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 103              		.loc 1 98 3 is_stmt 1 view .LVU23
+ 104              		.loc 1 98 34 is_stmt 0 view .LVU24
+ 105 0052 0E95     		str	r5, [sp, #56]
+  99:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ 106              		.loc 1 99 3 is_stmt 1 view .LVU25
+ 107              		.loc 1 99 35 is_stmt 0 view .LVU26
+ 108 0054 0F94     		str	r4, [sp, #60]
+ 100:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLM = 8;
+ 109              		.loc 1 100 3 is_stmt 1 view .LVU27
+ 110              		.loc 1 100 30 is_stmt 0 view .LVU28
+ 111 0056 0823     		movs	r3, #8
+ 112 0058 1093     		str	r3, [sp, #64]
+ 101:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLN = 72;
+ 113              		.loc 1 101 3 is_stmt 1 view .LVU29
+ 114              		.loc 1 101 30 is_stmt 0 view .LVU30
+ 115 005a 4823     		movs	r3, #72
+ 116 005c 1193     		str	r3, [sp, #68]
+ 102:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 117              		.loc 1 102 3 is_stmt 1 view .LVU31
+ 118              		.loc 1 102 30 is_stmt 0 view .LVU32
+ 119 005e 1295     		str	r5, [sp, #72]
+ 103:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLQ = 3;
+ 120              		.loc 1 103 3 is_stmt 1 view .LVU33
+ 121              		.loc 1 103 30 is_stmt 0 view .LVU34
+ 122 0060 0323     		movs	r3, #3
+ 123 0062 1393     		str	r3, [sp, #76]
+ 104:Src/main.c    ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 124              		.loc 1 104 3 is_stmt 1 view .LVU35
+ 105:Src/main.c    ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ARM GAS  /tmp/cclhzA2e.s 			page 5
+
+
+ 125              		.loc 1 105 3 view .LVU36
+ 126              		.loc 1 105 7 is_stmt 0 view .LVU37
+ 127 0064 08A8     		add	r0, sp, #32
+ 128 0066 FFF7FEFF 		bl	HAL_RCC_OscConfig
+ 129              	.LVL1:
+ 106:Src/main.c    ****   {
+ 107:Src/main.c    ****     Error_Handler();
+ 108:Src/main.c    ****   }
+ 109:Src/main.c    ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 130              		.loc 1 109 3 is_stmt 1 view .LVU38
+ 131              		.loc 1 109 31 is_stmt 0 view .LVU39
+ 132 006a 0F23     		movs	r3, #15
+ 133 006c 0393     		str	r3, [sp, #12]
+ 110:Src/main.c    ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 111:Src/main.c    ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 134              		.loc 1 111 3 is_stmt 1 view .LVU40
+ 135              		.loc 1 111 34 is_stmt 0 view .LVU41
+ 136 006e 0495     		str	r5, [sp, #16]
+ 112:Src/main.c    ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 137              		.loc 1 112 3 is_stmt 1 view .LVU42
+ 138              		.loc 1 112 35 is_stmt 0 view .LVU43
+ 139 0070 0594     		str	r4, [sp, #20]
+ 113:Src/main.c    ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ 140              		.loc 1 113 3 is_stmt 1 view .LVU44
+ 141              		.loc 1 113 36 is_stmt 0 view .LVU45
+ 142 0072 4FF48053 		mov	r3, #4096
+ 143 0076 0693     		str	r3, [sp, #24]
+ 114:Src/main.c    ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 144              		.loc 1 114 3 is_stmt 1 view .LVU46
+ 145              		.loc 1 114 36 is_stmt 0 view .LVU47
+ 146 0078 0794     		str	r4, [sp, #28]
+ 115:Src/main.c    ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+ 147              		.loc 1 115 3 is_stmt 1 view .LVU48
+ 148              		.loc 1 115 7 is_stmt 0 view .LVU49
+ 149 007a 2946     		mov	r1, r5
+ 150 007c 03A8     		add	r0, sp, #12
+ 151 007e FFF7FEFF 		bl	HAL_RCC_ClockConfig
+ 152              	.LVL2:
+ 116:Src/main.c    ****   {
+ 117:Src/main.c    ****     Error_Handler();
+ 118:Src/main.c    ****   }
+ 119:Src/main.c    **** }
+ 153              		.loc 1 119 1 view .LVU50
+ 154 0082 15B0     		add	sp, sp, #84
+ 155              	.LCFI2:
+ 156              		.cfi_def_cfa_offset 12
+ 157              		@ sp needed
+ 158 0084 30BD     		pop	{r4, r5, pc}
+ 159              	.L4:
+ 160 0086 00BF     		.align	2
+ 161              	.L3:
+ 162 0088 00380240 		.word	1073887232
+ 163 008c 00700040 		.word	1073770496
+ 164              		.cfi_endproc
+ 165              	.LFE131:
+ 167              		.global	__aeabi_f2d
+ 168              		.global	__aeabi_ddiv
+ARM GAS  /tmp/cclhzA2e.s 			page 6
+
+
+ 169              		.global	__aeabi_dmul
+ 170              		.global	__aeabi_dsub
+ 171              		.global	__aeabi_d2f
+ 172              		.section	.text.main,"ax",%progbits
+ 173              		.align	1
+ 174              		.global	main
+ 175              		.syntax unified
+ 176              		.thumb
+ 177              		.thumb_func
+ 179              	main:
+ 180              	.LFB130:
+  50:Src/main.c    ****   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
+ 181              		.loc 1 50 1 is_stmt 1 view -0
+ 182              		.cfi_startproc
+ 183              		@ Volatile: function does not return.
+ 184              		@ args = 0, pretend = 0, frame = 0
+ 185              		@ frame_needed = 0, uses_anonymous_args = 0
+ 186 0000 08B5     		push	{r3, lr}
+ 187              	.LCFI3:
+ 188              		.cfi_def_cfa_offset 8
+ 189              		.cfi_offset 3, -8
+ 190              		.cfi_offset 14, -4
+  51:Src/main.c    ****   HAL_Init();
+ 191              		.loc 1 51 3 view .LVU52
+  51:Src/main.c    ****   HAL_Init();
+ 192              		.loc 1 51 13 is_stmt 0 view .LVU53
+ 193 0002 5B4B     		ldr	r3, .L17
+ 194 0004 5B4A     		ldr	r2, .L17+4
+ 195 0006 9A60     		str	r2, [r3, #8]
+  52:Src/main.c    ****   SystemClock_Config();
+ 196              		.loc 1 52 3 is_stmt 1 view .LVU54
+ 197 0008 FFF7FEFF 		bl	HAL_Init
+ 198              	.LVL3:
+  53:Src/main.c    ****   MX_GPIO_Init();
+ 199              		.loc 1 53 3 view .LVU55
+ 200 000c FFF7FEFF 		bl	SystemClock_Config
+ 201              	.LVL4:
+  54:Src/main.c    ****   MX_USART2_UART_Init();
+ 202              		.loc 1 54 3 view .LVU56
+ 203 0010 FFF7FEFF 		bl	MX_GPIO_Init
+ 204              	.LVL5:
+  55:Src/main.c    ****   MX_UART4_Init();
+ 205              		.loc 1 55 3 view .LVU57
+ 206 0014 FFF7FEFF 		bl	MX_USART2_UART_Init
+ 207              	.LVL6:
+  56:Src/main.c    ****   MX_USART1_UART_Init();
+ 208              		.loc 1 56 3 view .LVU58
+ 209 0018 FFF7FEFF 		bl	MX_UART4_Init
+ 210              	.LVL7:
+  57:Src/main.c    ****   MX_ADC1_Init();
+ 211              		.loc 1 57 3 view .LVU59
+ 212 001c FFF7FEFF 		bl	MX_USART1_UART_Init
+ 213              	.LVL8:
+  58:Src/main.c    ****   while (1)
+ 214              		.loc 1 58 3 view .LVU60
+ 215 0020 FFF7FEFF 		bl	MX_ADC1_Init
+ 216              	.LVL9:
+ARM GAS  /tmp/cclhzA2e.s 			page 7
+
+
+ 217              	.L6:
+  59:Src/main.c    ****   {
+ 218              		.loc 1 59 3 view .LVU61
+  61:Src/main.c    ****     HAL_ADC_PollForConversion(&hadc1, 50);
+ 219              		.loc 1 61 5 view .LVU62
+ 220 0024 544C     		ldr	r4, .L17+8
+ 221 0026 2046     		mov	r0, r4
+ 222 0028 FFF7FEFF 		bl	HAL_ADC_Start
+ 223              	.LVL10:
+  62:Src/main.c    ****     if(HAL_IS_BIT_SET(HAL_ADC_GetState(&hadc1), HAL_ADC_STATE_REG_EOC))
+ 224              		.loc 1 62 5 view .LVU63
+ 225 002c 3221     		movs	r1, #50
+ 226 002e 2046     		mov	r0, r4
+ 227 0030 FFF7FEFF 		bl	HAL_ADC_PollForConversion
+ 228              	.LVL11:
+  63:Src/main.c    ****       {
+ 229              		.loc 1 63 5 view .LVU64
+  63:Src/main.c    ****       {
+ 230              		.loc 1 63 8 is_stmt 0 view .LVU65
+ 231 0034 2046     		mov	r0, r4
+ 232 0036 FFF7FEFF 		bl	HAL_ADC_GetState
+ 233              	.LVL12:
+  63:Src/main.c    ****       {
+ 234              		.loc 1 63 7 view .LVU66
+ 235 003a 10F4007F 		tst	r0, #512
+ 236 003e 29D1     		bne	.L16
+ 237              	.L7:
+  76:Src/main.c    ****     HAL_Delay(10000);
+ 238              		.loc 1 76 5 is_stmt 1 view .LVU67
+ 239 0040 4E4C     		ldr	r4, .L17+12
+ 240 0042 0A23     		movs	r3, #10
+ 241 0044 0422     		movs	r2, #4
+ 242 0046 2146     		mov	r1, r4
+ 243 0048 4D48     		ldr	r0, .L17+16
+ 244 004a FFF7FEFF 		bl	HAL_UART_Transmit
+ 245              	.LVL13:
+  77:Src/main.c    ****     if(M4_PH<14 && tankstatus == 0)
+ 246              		.loc 1 77 5 view .LVU68
+ 247 004e 42F21070 		movw	r0, #10000
+ 248 0052 FFF7FEFF 		bl	HAL_Delay
+ 249              	.LVL14:
+  78:Src/main.c    ****     {
+ 250              		.loc 1 78 5 view .LVU69
+  78:Src/main.c    ****     {
+ 251              		.loc 1 78 13 is_stmt 0 view .LVU70
+ 252 0056 94ED007A 		vldr.32	s14, [r4]
+  78:Src/main.c    ****     {
+ 253              		.loc 1 78 7 view .LVU71
+ 254 005a F2EE0C7A 		vmov.f32	s15, #1.4e+1
+ 255 005e B4EEE77A 		vcmpe.f32	s14, s15
+ 256 0062 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 257 0066 DDD5     		bpl	.L6
+  78:Src/main.c    ****     {
+ 258              		.loc 1 78 31 discriminator 1 view .LVU72
+ 259 0068 464B     		ldr	r3, .L17+20
+ 260 006a 1B68     		ldr	r3, [r3]
+  78:Src/main.c    ****     {
+ARM GAS  /tmp/cclhzA2e.s 			page 8
+
+
+ 261              		.loc 1 78 17 discriminator 1 view .LVU73
+ 262 006c 002B     		cmp	r3, #0
+ 263 006e D9D1     		bne	.L6
+  80:Src/main.c    **** 
+ 264              		.loc 1 80 10 is_stmt 1 view .LVU74
+ 265 0070 454C     		ldr	r4, .L17+24
+ 266 0072 0122     		movs	r2, #1
+ 267 0074 4FF40041 		mov	r1, #32768
+ 268 0078 2046     		mov	r0, r4
+ 269 007a FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 270              	.LVL15:
+  82:Src/main.c    **** 
+ 271              		.loc 1 82 10 view .LVU75
+ 272 007e 47F23050 		movw	r0, #30000
+ 273 0082 FFF7FEFF 		bl	HAL_Delay
+ 274              	.LVL16:
+  84:Src/main.c    **** 
+ 275              		.loc 1 84 10 view .LVU76
+ 276 0086 0022     		movs	r2, #0
+ 277 0088 4FF40041 		mov	r1, #32768
+ 278 008c 2046     		mov	r0, r4
+ 279 008e FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 280              	.LVL17:
+ 281 0092 C7E7     		b	.L6
+ 282              	.L16:
+  65:Src/main.c    ****           M4_voltage_V = M4_AD_Value*3.3f/4096;
+ 283              		.loc 1 65 11 view .LVU77
+  65:Src/main.c    ****           M4_voltage_V = M4_AD_Value*3.3f/4096;
+ 284              		.loc 1 65 25 is_stmt 0 view .LVU78
+ 285 0094 2046     		mov	r0, r4
+ 286 0096 FFF7FEFF 		bl	HAL_ADC_GetValue
+ 287              	.LVL18:
+  65:Src/main.c    ****           M4_voltage_V = M4_AD_Value*3.3f/4096;
+ 288              		.loc 1 65 23 view .LVU79
+ 289 009a 80B2     		uxth	r0, r0
+ 290 009c 3B4B     		ldr	r3, .L17+28
+ 291 009e 1880     		strh	r0, [r3]	@ movhi
+  66:Src/main.c    ****           if (M4_voltage_V > M4_pH_mid)
+ 292              		.loc 1 66 11 is_stmt 1 view .LVU80
+  66:Src/main.c    ****           if (M4_voltage_V > M4_pH_mid)
+ 293              		.loc 1 66 37 is_stmt 0 view .LVU81
+ 294 00a0 07EE900A 		vmov	s15, r0	@ int
+ 295 00a4 B8EEE78A 		vcvt.f32.s32	s16, s15
+ 296 00a8 DFED397A 		vldr.32	s15, .L17+32
+ 297 00ac 28EE278A 		vmul.f32	s16, s16, s15
+  66:Src/main.c    ****           if (M4_voltage_V > M4_pH_mid)
+ 298              		.loc 1 66 42 view .LVU82
+ 299 00b0 DFED387A 		vldr.32	s15, .L17+36
+ 300 00b4 28EE278A 		vmul.f32	s16, s16, s15
+  66:Src/main.c    ****           if (M4_voltage_V > M4_pH_mid)
+ 301              		.loc 1 66 24 view .LVU83
+ 302 00b8 374B     		ldr	r3, .L17+40
+ 303 00ba 83ED008A 		vstr.32	s16, [r3]
+  67:Src/main.c    ****            {
+ 304              		.loc 1 67 11 is_stmt 1 view .LVU84
+  67:Src/main.c    ****            {
+ 305              		.loc 1 67 28 is_stmt 0 view .LVU85
+ARM GAS  /tmp/cclhzA2e.s 			page 9
+
+
+ 306 00be 374B     		ldr	r3, .L17+44
+ 307 00c0 D3ED008A 		vldr.32	s17, [r3]
+  67:Src/main.c    ****            {
+ 308              		.loc 1 67 14 view .LVU86
+ 309 00c4 B4EEE88A 		vcmpe.f32	s16, s17
+ 310 00c8 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
+ 311 00cc 27DD     		ble	.L14
+  69:Src/main.c    ****            }
+ 312              		.loc 1 69 16 is_stmt 1 view .LVU87
+  69:Src/main.c    ****            }
+ 313              		.loc 1 69 47 is_stmt 0 view .LVU88
+ 314 00ce 344B     		ldr	r3, .L17+48
+ 315 00d0 D3ED007A 		vldr.32	s15, [r3]
+ 316 00d4 77EEE87A 		vsub.f32	s15, s15, s17
+ 317 00d8 17EE900A 		vmov	r0, s15
+ 318 00dc FFF7FEFF 		bl	__aeabi_f2d
+ 319              	.LVL19:
+ 320 00e0 0246     		mov	r2, r0
+ 321 00e2 0B46     		mov	r3, r1
+  69:Src/main.c    ****            }
+ 322              		.loc 1 69 34 view .LVU89
+ 323 00e4 0020     		movs	r0, #0
+ 324 00e6 2F49     		ldr	r1, .L17+52
+ 325 00e8 FFF7FEFF 		bl	__aeabi_ddiv
+ 326              	.LVL20:
+ 327 00ec 0446     		mov	r4, r0
+ 328 00ee 0D46     		mov	r5, r1
+  69:Src/main.c    ****            }
+ 329              		.loc 1 69 76 view .LVU90
+ 330 00f0 78EE687A 		vsub.f32	s15, s16, s17
+ 331 00f4 17EE900A 		vmov	r0, s15
+ 332 00f8 FFF7FEFF 		bl	__aeabi_f2d
+ 333              	.LVL21:
+ 334 00fc 0246     		mov	r2, r0
+ 335 00fe 0B46     		mov	r3, r1
+  69:Src/main.c    ****            }
+ 336              		.loc 1 69 60 view .LVU91
+ 337 0100 2046     		mov	r0, r4
+ 338 0102 2946     		mov	r1, r5
+ 339 0104 FFF7FEFF 		bl	__aeabi_dmul
+ 340              	.LVL22:
+ 341 0108 0246     		mov	r2, r0
+ 342 010a 0B46     		mov	r3, r1
+  69:Src/main.c    ****            }
+ 343              		.loc 1 69 28 view .LVU92
+ 344 010c 0020     		movs	r0, #0
+ 345 010e 2649     		ldr	r1, .L17+56
+ 346 0110 FFF7FEFF 		bl	__aeabi_dsub
+ 347              	.LVL23:
+ 348 0114 FFF7FEFF 		bl	__aeabi_d2f
+ 349              	.LVL24:
+  69:Src/main.c    ****            }
+ 350              		.loc 1 69 22 view .LVU93
+ 351 0118 184B     		ldr	r3, .L17+12
+ 352 011a 1860     		str	r0, [r3]	@ float
+ 353 011c 90E7     		b	.L7
+ 354              	.L14:
+ARM GAS  /tmp/cclhzA2e.s 			page 10
+
+
+  73:Src/main.c    ****            }
+ 355              		.loc 1 73 16 is_stmt 1 view .LVU94
+  73:Src/main.c    ****            }
+ 356              		.loc 1 73 47 is_stmt 0 view .LVU95
+ 357 011e 234B     		ldr	r3, .L17+60
+ 358 0120 D3ED007A 		vldr.32	s15, [r3]
+ 359 0124 78EEE77A 		vsub.f32	s15, s17, s15
+ 360 0128 17EE900A 		vmov	r0, s15
+ 361 012c FFF7FEFF 		bl	__aeabi_f2d
+ 362              	.LVL25:
+ 363 0130 0246     		mov	r2, r0
+ 364 0132 0B46     		mov	r3, r1
+  73:Src/main.c    ****            }
+ 365              		.loc 1 73 34 view .LVU96
+ 366 0134 0020     		movs	r0, #0
+ 367 0136 1B49     		ldr	r1, .L17+52
+ 368 0138 FFF7FEFF 		bl	__aeabi_ddiv
+ 369              	.LVL26:
+ 370 013c 0446     		mov	r4, r0
+ 371 013e 0D46     		mov	r5, r1
+  73:Src/main.c    ****            }
+ 372              		.loc 1 73 77 view .LVU97
+ 373 0140 78EE687A 		vsub.f32	s15, s16, s17
+ 374 0144 17EE900A 		vmov	r0, s15
+ 375 0148 FFF7FEFF 		bl	__aeabi_f2d
+ 376              	.LVL27:
+ 377 014c 0246     		mov	r2, r0
+ 378 014e 0B46     		mov	r3, r1
+  73:Src/main.c    ****            }
+ 379              		.loc 1 73 61 view .LVU98
+ 380 0150 2046     		mov	r0, r4
+ 381 0152 2946     		mov	r1, r5
+ 382 0154 FFF7FEFF 		bl	__aeabi_dmul
+ 383              	.LVL28:
+ 384 0158 0246     		mov	r2, r0
+ 385 015a 0B46     		mov	r3, r1
+  73:Src/main.c    ****            }
+ 386              		.loc 1 73 28 view .LVU99
+ 387 015c 0020     		movs	r0, #0
+ 388 015e 1249     		ldr	r1, .L17+56
+ 389 0160 FFF7FEFF 		bl	__aeabi_dsub
+ 390              	.LVL29:
+ 391 0164 FFF7FEFF 		bl	__aeabi_d2f
+ 392              	.LVL30:
+  73:Src/main.c    ****            }
+ 393              		.loc 1 73 22 view .LVU100
+ 394 0168 044B     		ldr	r3, .L17+12
+ 395 016a 1860     		str	r0, [r3]	@ float
+ 396 016c 68E7     		b	.L7
+ 397              	.L18:
+ 398 016e 00BF     		.align	2
+ 399              	.L17:
+ 400 0170 00ED00E0 		.word	-536810240
+ 401 0174 00000108 		.word	134283264
+ 402 0178 00000000 		.word	hadc1
+ 403 017c 00000000 		.word	.LANCHOR4
+ 404 0180 00000000 		.word	huart4
+ARM GAS  /tmp/cclhzA2e.s 			page 11
+
+
+ 405 0184 00000000 		.word	.LANCHOR6
+ 406 0188 000C0240 		.word	1073875968
+ 407 018c 00000000 		.word	.LANCHOR0
+ 408 0190 33335340 		.word	1079194419
+ 409 0194 00008039 		.word	964689920
+ 410 0198 00000000 		.word	.LANCHOR1
+ 411 019c 00000000 		.word	.LANCHOR2
+ 412 01a0 00000000 		.word	.LANCHOR3
+ 413 01a4 00000840 		.word	1074266112
+ 414 01a8 00001C40 		.word	1075576832
+ 415 01ac 00000000 		.word	.LANCHOR5
+ 416              		.cfi_endproc
+ 417              	.LFE130:
+ 419              		.section	.text.Error_Handler,"ax",%progbits
+ 420              		.align	1
+ 421              		.global	Error_Handler
+ 422              		.syntax unified
+ 423              		.thumb
+ 424              		.thumb_func
+ 426              	Error_Handler:
+ 427              	.LFB132:
+ 120:Src/main.c    **** void Error_Handler(void)
+ 121:Src/main.c    **** {
+ 428              		.loc 1 121 1 is_stmt 1 view -0
+ 429              		.cfi_startproc
+ 430              		@ args = 0, pretend = 0, frame = 0
+ 431              		@ frame_needed = 0, uses_anonymous_args = 0
+ 432              		@ link register save eliminated.
+ 122:Src/main.c    **** }
+ 433              		.loc 1 122 1 view .LVU102
+ 434 0000 7047     		bx	lr
+ 435              		.cfi_endproc
+ 436              	.LFE132:
+ 438              		.global	M4_PH
+ 439              		.global	M4_pH_high
+ 440              		.global	M4_pH_low
+ 441              		.global	M4_pH_mid
+ 442              		.global	M4_voltage_V
+ 443              		.global	M4_AD_Value
+ 444              		.global	tankstatus
+ 445              		.section	.bss.M4_AD_Value,"aw",%nobits
+ 446              		.align	1
+ 447              		.set	.LANCHOR0,. + 0
+ 450              	M4_AD_Value:
+ 451 0000 0000     		.space	2
+ 452              		.section	.bss.M4_PH,"aw",%nobits
+ 453              		.align	2
+ 454              		.set	.LANCHOR4,. + 0
+ 457              	M4_PH:
+ 458 0000 00000000 		.space	4
+ 459              		.section	.bss.M4_voltage_V,"aw",%nobits
+ 460              		.align	2
+ 461              		.set	.LANCHOR1,. + 0
+ 464              	M4_voltage_V:
+ 465 0000 00000000 		.space	4
+ 466              		.section	.bss.tankstatus,"aw",%nobits
+ 467              		.align	2
+ARM GAS  /tmp/cclhzA2e.s 			page 12
+
+
+ 468              		.set	.LANCHOR6,. + 0
+ 471              	tankstatus:
+ 472 0000 00000000 		.space	4
+ 473              		.section	.data.M4_pH_high,"aw"
+ 474              		.align	2
+ 475              		.set	.LANCHOR5,. + 0
+ 478              	M4_pH_high:
+ 479 0000 9A99793F 		.word	1064933786
+ 480              		.section	.data.M4_pH_low,"aw"
+ 481              		.align	2
+ 482              		.set	.LANCHOR3,. + 0
+ 485              	M4_pH_low:
+ 486 0000 85EB0140 		.word	1073867653
+ 487              		.section	.data.M4_pH_mid,"aw"
+ 488              		.align	2
+ 489              		.set	.LANCHOR2,. + 0
+ 492              	M4_pH_mid:
+ 493 0000 0000C03F 		.word	1069547520
+ 494              		.text
+ 495              	.Letext0:
+ 496              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 497              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 498              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
+ 499              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ 500              		.file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
+ 501              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
+ 502              		.file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
+ 503              		.file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
+ 504              		.file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
+ 505              		.file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
+ 506              		.file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
+ 507              		.file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
+ 508              		.file 14 "Inc/adc.h"
+ 509              		.file 15 "Inc/usart.h"
+ 510              		.file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
+ 511              		.file 17 "Inc/gpio.h"
+ 512              		.file 18 "<built-in>"
+ARM GAS  /tmp/cclhzA2e.s 			page 13
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 main.c
+     /tmp/cclhzA2e.s:20     .text.SystemClock_Config:0000000000000000 $t
+     /tmp/cclhzA2e.s:26     .text.SystemClock_Config:0000000000000000 SystemClock_Config
+     /tmp/cclhzA2e.s:162    .text.SystemClock_Config:0000000000000088 $d
+     /tmp/cclhzA2e.s:173    .text.main:0000000000000000 $t
+     /tmp/cclhzA2e.s:179    .text.main:0000000000000000 main
+     /tmp/cclhzA2e.s:400    .text.main:0000000000000170 $d
+     /tmp/cclhzA2e.s:420    .text.Error_Handler:0000000000000000 $t
+     /tmp/cclhzA2e.s:426    .text.Error_Handler:0000000000000000 Error_Handler
+     /tmp/cclhzA2e.s:457    .bss.M4_PH:0000000000000000 M4_PH
+     /tmp/cclhzA2e.s:478    .data.M4_pH_high:0000000000000000 M4_pH_high
+     /tmp/cclhzA2e.s:485    .data.M4_pH_low:0000000000000000 M4_pH_low
+     /tmp/cclhzA2e.s:492    .data.M4_pH_mid:0000000000000000 M4_pH_mid
+     /tmp/cclhzA2e.s:464    .bss.M4_voltage_V:0000000000000000 M4_voltage_V
+     /tmp/cclhzA2e.s:450    .bss.M4_AD_Value:0000000000000000 M4_AD_Value
+     /tmp/cclhzA2e.s:471    .bss.tankstatus:0000000000000000 tankstatus
+     /tmp/cclhzA2e.s:446    .bss.M4_AD_Value:0000000000000000 $d
+     /tmp/cclhzA2e.s:453    .bss.M4_PH:0000000000000000 $d
+     /tmp/cclhzA2e.s:460    .bss.M4_voltage_V:0000000000000000 $d
+     /tmp/cclhzA2e.s:467    .bss.tankstatus:0000000000000000 $d
+     /tmp/cclhzA2e.s:474    .data.M4_pH_high:0000000000000000 $d
+     /tmp/cclhzA2e.s:481    .data.M4_pH_low:0000000000000000 $d
+     /tmp/cclhzA2e.s:488    .data.M4_pH_mid:0000000000000000 $d
+
+UNDEFINED SYMBOLS
+memset
+HAL_RCC_OscConfig
+HAL_RCC_ClockConfig
+__aeabi_f2d
+__aeabi_ddiv
+__aeabi_dmul
+__aeabi_dsub
+__aeabi_d2f
+HAL_Init
+MX_GPIO_Init
+MX_USART2_UART_Init
+MX_UART4_Init
+MX_USART1_UART_Init
+MX_ADC1_Init
+HAL_ADC_Start
+HAL_ADC_PollForConversion
+HAL_ADC_GetState
+HAL_UART_Transmit
+HAL_Delay
+HAL_GPIO_WritePin
+HAL_ADC_GetValue
+hadc1
+huart4

app/main/CTO20220622/build/startup_stm32f407xx.d

@@ -0,0 +1 @@
+build/startup_stm32f407xx.o: startup_stm32f407xx.s

app/main/CTO20220622/build/stm32f4xx_hal.d

@@ -0,0 +1,55 @@
+build/stm32f4xx_hal.o: Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_adc.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_adc.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_adc_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_adc_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_cortex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_cortex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_dma.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_dma.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_dma_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_dma_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_exti.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_exti.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_flash.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_flash.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_flash_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_flash_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_flash_ramfunc.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_flash_ramfunc.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_flash_ramfunc.lst

@@ -0,0 +1,29 @@
+ARM GAS  /tmp/ccTYmL4H.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_hal_flash_ramfunc.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              	.Letext0:
+ARM GAS  /tmp/ccTYmL4H.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_flash_ramfunc.c
+
+NO UNDEFINED SYMBOLS

app/main/CTO20220622/build/stm32f4xx_hal_gpio.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_gpio.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_msp.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_msp.o: Src/stm32f4xx_hal_msp.c Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_msp.lst

@@ -0,0 +1,183 @@
+ARM GAS  /tmp/cc0kl700.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_hal_msp.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.HAL_MspInit,"ax",%progbits
+  20              		.align	1
+  21              		.global	HAL_MspInit
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	HAL_MspInit:
+  27              	.LFB130:
+  28              		.file 1 "Src/stm32f4xx_hal_msp.c"
+   1:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */
+   2:Src/stm32f4xx_hal_msp.c **** /**
+   3:Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+   4:Src/stm32f4xx_hal_msp.c ****   * File Name          : stm32f4xx_hal_msp.c
+   5:Src/stm32f4xx_hal_msp.c ****   * Description        : This file provides code for the MSP Initialization 
+   6:Src/stm32f4xx_hal_msp.c ****   *                      and de-Initialization codes.
+   7:Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+   8:Src/stm32f4xx_hal_msp.c ****   * @attention
+   9:Src/stm32f4xx_hal_msp.c ****   *
+  10:Src/stm32f4xx_hal_msp.c ****   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  11:Src/stm32f4xx_hal_msp.c ****   * All rights reserved.</center></h2>
+  12:Src/stm32f4xx_hal_msp.c ****   *
+  13:Src/stm32f4xx_hal_msp.c ****   * This software component is licensed by ST under Ultimate Liberty license
+  14:Src/stm32f4xx_hal_msp.c ****   * SLA0044, the "License"; You may not use this file except in compliance with
+  15:Src/stm32f4xx_hal_msp.c ****   * the License. You may obtain a copy of the License at:
+  16:Src/stm32f4xx_hal_msp.c ****   *                             www.st.com/SLA0044
+  17:Src/stm32f4xx_hal_msp.c ****   *
+  18:Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+  19:Src/stm32f4xx_hal_msp.c ****   */
+  20:Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */
+  21:Src/stm32f4xx_hal_msp.c **** 
+  22:Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
+  23:Src/stm32f4xx_hal_msp.c **** #include "main.h"
+  24:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
+  25:Src/stm32f4xx_hal_msp.c **** 
+  26:Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */
+  27:Src/stm32f4xx_hal_msp.c **** 
+  28:Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
+  29:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */
+  30:Src/stm32f4xx_hal_msp.c **** 
+ARM GAS  /tmp/cc0kl700.s 			page 2
+
+
+  31:Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */
+  32:Src/stm32f4xx_hal_msp.c **** 
+  33:Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
+  34:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */
+  35:Src/stm32f4xx_hal_msp.c ****  
+  36:Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */
+  37:Src/stm32f4xx_hal_msp.c **** 
+  38:Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
+  39:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
+  40:Src/stm32f4xx_hal_msp.c **** 
+  41:Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */
+  42:Src/stm32f4xx_hal_msp.c **** 
+  43:Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
+  44:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */
+  45:Src/stm32f4xx_hal_msp.c **** 
+  46:Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */
+  47:Src/stm32f4xx_hal_msp.c **** 
+  48:Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
+  49:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
+  50:Src/stm32f4xx_hal_msp.c **** 
+  51:Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */
+  52:Src/stm32f4xx_hal_msp.c **** 
+  53:Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
+  54:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
+  55:Src/stm32f4xx_hal_msp.c **** 
+  56:Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
+  57:Src/stm32f4xx_hal_msp.c **** 
+  58:Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
+  59:Src/stm32f4xx_hal_msp.c **** 
+  60:Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */
+  61:Src/stm32f4xx_hal_msp.c **** /**
+  62:Src/stm32f4xx_hal_msp.c ****   * Initializes the Global MSP.
+  63:Src/stm32f4xx_hal_msp.c ****   */
+  64:Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void)
+  65:Src/stm32f4xx_hal_msp.c **** {
+  29              		.loc 1 65 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 8
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+  34 0000 82B0     		sub	sp, sp, #8
+  35              	.LCFI0:
+  36              		.cfi_def_cfa_offset 8
+  66:Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
+  67:Src/stm32f4xx_hal_msp.c **** 
+  68:Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 0 */
+  69:Src/stm32f4xx_hal_msp.c **** 
+  70:Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
+  37              		.loc 1 70 3 view .LVU1
+  38              	.LBB2:
+  39              		.loc 1 70 3 view .LVU2
+  40 0002 0021     		movs	r1, #0
+  41 0004 0091     		str	r1, [sp]
+  42              		.loc 1 70 3 view .LVU3
+  43 0006 0B4B     		ldr	r3, .L3
+  44 0008 5A6C     		ldr	r2, [r3, #68]
+  45 000a 42F48042 		orr	r2, r2, #16384
+ARM GAS  /tmp/cc0kl700.s 			page 3
+
+
+  46 000e 5A64     		str	r2, [r3, #68]
+  47              		.loc 1 70 3 view .LVU4
+  48 0010 5A6C     		ldr	r2, [r3, #68]
+  49 0012 02F48042 		and	r2, r2, #16384
+  50 0016 0092     		str	r2, [sp]
+  51              		.loc 1 70 3 view .LVU5
+  52 0018 009A     		ldr	r2, [sp]
+  53              	.LBE2:
+  54              		.loc 1 70 3 view .LVU6
+  71:Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_PWR_CLK_ENABLE();
+  55              		.loc 1 71 3 view .LVU7
+  56              	.LBB3:
+  57              		.loc 1 71 3 view .LVU8
+  58 001a 0191     		str	r1, [sp, #4]
+  59              		.loc 1 71 3 view .LVU9
+  60 001c 1A6C     		ldr	r2, [r3, #64]
+  61 001e 42F08052 		orr	r2, r2, #268435456
+  62 0022 1A64     		str	r2, [r3, #64]
+  63              		.loc 1 71 3 view .LVU10
+  64 0024 1B6C     		ldr	r3, [r3, #64]
+  65 0026 03F08053 		and	r3, r3, #268435456
+  66 002a 0193     		str	r3, [sp, #4]
+  67              		.loc 1 71 3 view .LVU11
+  68 002c 019B     		ldr	r3, [sp, #4]
+  69              	.LBE3:
+  70              		.loc 1 71 3 view .LVU12
+  72:Src/stm32f4xx_hal_msp.c **** 
+  73:Src/stm32f4xx_hal_msp.c ****   /* System interrupt init*/
+  74:Src/stm32f4xx_hal_msp.c **** 
+  75:Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 1 */
+  76:Src/stm32f4xx_hal_msp.c **** 
+  77:Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 1 */
+  78:Src/stm32f4xx_hal_msp.c **** }
+  71              		.loc 1 78 1 is_stmt 0 view .LVU13
+  72 002e 02B0     		add	sp, sp, #8
+  73              	.LCFI1:
+  74              		.cfi_def_cfa_offset 0
+  75              		@ sp needed
+  76 0030 7047     		bx	lr
+  77              	.L4:
+  78 0032 00BF     		.align	2
+  79              	.L3:
+  80 0034 00380240 		.word	1073887232
+  81              		.cfi_endproc
+  82              	.LFE130:
+  84              		.text
+  85              	.Letext0:
+  86              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+  87              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+  88              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ARM GAS  /tmp/cc0kl700.s 			page 4
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_msp.c
+     /tmp/cc0kl700.s:20     .text.HAL_MspInit:0000000000000000 $t
+     /tmp/cc0kl700.s:26     .text.HAL_MspInit:0000000000000000 HAL_MspInit
+     /tmp/cc0kl700.s:80     .text.HAL_MspInit:0000000000000034 $d
+
+NO UNDEFINED SYMBOLS

app/main/CTO20220622/build/stm32f4xx_hal_pwr.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_pwr.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_pwr_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_pwr_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_pwr_ex.lst

@@ -0,0 +1,661 @@
+ARM GAS  /tmp/cce0GhQW.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_hal_pwr_ex.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.HAL_PWREx_EnableBkUpReg,"ax",%progbits
+  20              		.align	1
+  21              		.global	HAL_PWREx_EnableBkUpReg
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	HAL_PWREx_EnableBkUpReg:
+  27              	.LFB130:
+  28              		.file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c"
+   1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+   2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   ******************************************************************************
+   3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @file    stm32f4xx_hal_pwr_ex.c
+   4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @author  MCD Application Team
+   5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief   Extended PWR HAL module driver.
+   6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *          This file provides firmware functions to manage the following 
+   7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *          functionalities of PWR extension peripheral:           
+   8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *           + Peripheral Extended features functions
+   9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *         
+  10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   ******************************************************************************
+  11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @attention
+  12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *
+  13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * All rights reserved.</center></h2>
+  15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *
+  16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * This software component is licensed by ST under BSD 3-Clause license,
+  17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * the "License"; You may not use this file except in compliance with the
+  18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * License. You may obtain a copy of the License at:
+  19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *                        opensource.org/licenses/BSD-3-Clause
+  20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *
+  21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   ******************************************************************************
+  22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */ 
+  23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
+  25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #include "stm32f4xx_hal.h"
+  26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup STM32F4xx_HAL_Driver
+  28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @{
+  29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+  30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ARM GAS  /tmp/cce0GhQW.s 			page 2
+
+
+  31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
+  32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief PWR HAL module driver
+  33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @{
+  34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+  35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
+  37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
+  39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
+  40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants
+  41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @{
+  42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */    
+  43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE  1000U
+  44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE  1000U
+  45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE     1000U
+  46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE     1000U
+  47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+  48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @}
+  49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+  50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****    
+  52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
+  53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
+  54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
+  55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/
+  56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
+  57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *  @{
+  58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+  59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions 
+  61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *  @brief Peripheral Extended features functions 
+  62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *
+  63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @verbatim   
+  64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****  ===============================================================================
+  66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****                  ##### Peripheral extended features functions #####
+  67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****  ===============================================================================
+  68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     *** Main and Backup Regulators configuration ***
+  70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     ================================================
+  71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     [..] 
+  72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from 
+  73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is 
+  74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           retained even in Standby or VBAT mode when the low power backup regulator
+  75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           is enabled. It can be considered as an internal EEPROM when VBAT is 
+  76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           always present. You can use the HAL_PWREx_EnableBkUpReg() function to 
+  77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           enable the low power backup regulator. 
+  78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       (+) When the backup domain is supplied by VDD (analog switch connected to VDD) 
+  80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           the backup SRAM is powered from VDD which replaces the VBAT power supply to 
+  81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           save battery life.
+  82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       (+) The backup SRAM is not mass erased by a tamper event. It is read 
+  84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           protected to prevent confidential data, such as cryptographic private 
+  85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           key, from being accessed. The backup SRAM can be erased only through 
+  86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           the Flash interface when a protection level change from level 1 to 
+  87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           level 0 is requested. 
+ARM GAS  /tmp/cce0GhQW.s 			page 3
+
+
+  88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       -@- Refer to the description of Read protection (RDP) in the Flash 
+  89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           programming manual.
+  90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       (+) The main internal regulator can be configured to have a tradeoff between 
+  92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           performance and power consumption when the device does not operate at 
+  93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() 
+  94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           macro which configure VOS bit in PWR_CR register
+  95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           
+  96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****         Refer to the product datasheets for more details.
+  97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+  98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     *** FLASH Power Down configuration ****
+  99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     =======================================
+ 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     [..] 
+ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       (+) By setting the FPDS bit in the PWR_CR register by using the 
+ 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power 
+ 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           down mode when the device enters Stop mode. When the Flash memory 
+ 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           is in power down mode, an additional startup delay is incurred when 
+ 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           waking up from Stop mode.
+ 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****           
+ 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when
+ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            is OFF and the HSI or HSE clock source is selected as system clock. 
+ 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            The new value programmed is active only when the PLL is ON.
+ 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            When the PLL is OFF, the voltage scale 3 is automatically selected. 
+ 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****         Refer to the datasheets for more details.
+ 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     *** Over-Drive and Under-Drive configuration ****
+ 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     =================================================
+ 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     [..]         
+ 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****        (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
+ 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            2 operating modes available:
+ 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****         (++) Normal mode: The CPU and core logic operate at maximum frequency at a given 
+ 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****              voltage scaling (scale 1, scale 2 or scale 3)
+ 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****         (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a 
+ 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****             higher frequency than the normal mode for a given voltage scaling (scale 1,  
+ 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****             scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function 
+ 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****             disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod
+ 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****             the sequence described in Reference manual.
+ 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****              
+ 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****        (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low
+ 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            supplies a low power voltage to the 1.2V domain, thus preserving the content of register
+ 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****            and internal SRAM. 2 operating modes are available:
+ 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****          (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only 
+ 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****               available when the main regulator or the low power regulator is used in Scale 3 or 
+ 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****               low voltage mode.
+ 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****          (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is 
+ 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****               available when the main regulator or the low power regulator is in low voltage mode.
+ 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @endverbatim
+ 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @{
+ 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Enables the Backup Regulator.
+ 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval HAL status
+ 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
+ 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+ARM GAS  /tmp/cce0GhQW.s 			page 4
+
+
+  29              		.loc 1 144 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 0
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33 0000 10B5     		push	{r4, lr}
+  34              	.LCFI0:
+  35              		.cfi_def_cfa_offset 8
+  36              		.cfi_offset 4, -8
+  37              		.cfi_offset 14, -4
+ 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   uint32_t tickstart = 0U;
+  38              		.loc 1 145 3 view .LVU1
+  39              	.LVL0:
+ 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
+  40              		.loc 1 147 3 view .LVU2
+  41              		.loc 1 147 33 is_stmt 0 view .LVU3
+  42 0002 0B4B     		ldr	r3, .L8
+  43 0004 0122     		movs	r2, #1
+  44 0006 C3F8A420 		str	r2, [r3, #164]
+ 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Get tick */
+ 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   tickstart = HAL_GetTick();
+  45              		.loc 1 150 3 is_stmt 1 view .LVU4
+  46              		.loc 1 150 15 is_stmt 0 view .LVU5
+  47 000a FFF7FEFF 		bl	HAL_GetTick
+  48              	.LVL1:
+  49 000e 0446     		mov	r4, r0
+  50              	.LVL2:
+ 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Wait till Backup regulator ready flag is set */  
+ 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
+  51              		.loc 1 153 3 is_stmt 1 view .LVU6
+  52              	.L2:
+  53              		.loc 1 153 8 view .LVU7
+  54              		.loc 1 153 9 is_stmt 0 view .LVU8
+  55 0010 084B     		ldr	r3, .L8+4
+  56 0012 5B68     		ldr	r3, [r3, #4]
+  57              		.loc 1 153 8 view .LVU9
+  58 0014 13F0080F 		tst	r3, #8
+  59 0018 07D1     		bne	.L7
+ 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   {
+ 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
+  60              		.loc 1 155 5 is_stmt 1 view .LVU10
+  61              		.loc 1 155 9 is_stmt 0 view .LVU11
+  62 001a FFF7FEFF 		bl	HAL_GetTick
+  63              	.LVL3:
+  64              		.loc 1 155 23 view .LVU12
+  65 001e 001B     		subs	r0, r0, r4
+  66              		.loc 1 155 7 view .LVU13
+  67 0020 B0F57A7F 		cmp	r0, #1000
+  68 0024 F4D9     		bls	.L2
+ 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     {
+ 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       return HAL_TIMEOUT;
+  69              		.loc 1 157 14 view .LVU14
+  70 0026 0320     		movs	r0, #3
+  71 0028 00E0     		b	.L3
+  72              	.L7:
+ARM GAS  /tmp/cce0GhQW.s 			page 5
+
+
+ 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     } 
+ 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   }
+ 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   return HAL_OK;
+  73              		.loc 1 160 10 view .LVU15
+  74 002a 0020     		movs	r0, #0
+  75              	.L3:
+ 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+  76              		.loc 1 161 1 view .LVU16
+  77 002c 10BD     		pop	{r4, pc}
+  78              	.LVL4:
+  79              	.L9:
+  80              		.loc 1 161 1 view .LVU17
+  81 002e 00BF     		.align	2
+  82              	.L8:
+  83 0030 00000E42 		.word	1108213760
+  84 0034 00700040 		.word	1073770496
+  85              		.cfi_endproc
+  86              	.LFE130:
+  88              		.section	.text.HAL_PWREx_DisableBkUpReg,"ax",%progbits
+  89              		.align	1
+  90              		.global	HAL_PWREx_DisableBkUpReg
+  91              		.syntax unified
+  92              		.thumb
+  93              		.thumb_func
+  95              	HAL_PWREx_DisableBkUpReg:
+  96              	.LFB131:
+ 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Disables the Backup Regulator.
+ 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval HAL status
+ 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
+ 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+  97              		.loc 1 168 1 is_stmt 1 view -0
+  98              		.cfi_startproc
+  99              		@ args = 0, pretend = 0, frame = 0
+ 100              		@ frame_needed = 0, uses_anonymous_args = 0
+ 101 0000 10B5     		push	{r4, lr}
+ 102              	.LCFI1:
+ 103              		.cfi_def_cfa_offset 8
+ 104              		.cfi_offset 4, -8
+ 105              		.cfi_offset 14, -4
+ 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   uint32_t tickstart = 0U;
+ 106              		.loc 1 169 3 view .LVU19
+ 107              	.LVL5:
+ 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
+ 108              		.loc 1 171 3 view .LVU20
+ 109              		.loc 1 171 33 is_stmt 0 view .LVU21
+ 110 0002 0B4B     		ldr	r3, .L17
+ 111 0004 0022     		movs	r2, #0
+ 112 0006 C3F8A420 		str	r2, [r3, #164]
+ 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Get tick */
+ 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   tickstart = HAL_GetTick();
+ 113              		.loc 1 174 3 is_stmt 1 view .LVU22
+ 114              		.loc 1 174 15 is_stmt 0 view .LVU23
+ARM GAS  /tmp/cce0GhQW.s 			page 6
+
+
+ 115 000a FFF7FEFF 		bl	HAL_GetTick
+ 116              	.LVL6:
+ 117 000e 0446     		mov	r4, r0
+ 118              	.LVL7:
+ 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Wait till Backup regulator ready flag is set */  
+ 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
+ 119              		.loc 1 177 3 is_stmt 1 view .LVU24
+ 120              	.L11:
+ 121              		.loc 1 177 8 view .LVU25
+ 122              		.loc 1 177 9 is_stmt 0 view .LVU26
+ 123 0010 084B     		ldr	r3, .L17+4
+ 124 0012 5B68     		ldr	r3, [r3, #4]
+ 125              		.loc 1 177 8 view .LVU27
+ 126 0014 13F0080F 		tst	r3, #8
+ 127 0018 07D0     		beq	.L16
+ 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   {
+ 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
+ 128              		.loc 1 179 5 is_stmt 1 view .LVU28
+ 129              		.loc 1 179 9 is_stmt 0 view .LVU29
+ 130 001a FFF7FEFF 		bl	HAL_GetTick
+ 131              	.LVL8:
+ 132              		.loc 1 179 23 view .LVU30
+ 133 001e 001B     		subs	r0, r0, r4
+ 134              		.loc 1 179 7 view .LVU31
+ 135 0020 B0F57A7F 		cmp	r0, #1000
+ 136 0024 F4D9     		bls	.L11
+ 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     {
+ 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       return HAL_TIMEOUT;
+ 137              		.loc 1 181 14 view .LVU32
+ 138 0026 0320     		movs	r0, #3
+ 139 0028 00E0     		b	.L12
+ 140              	.L16:
+ 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     } 
+ 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   }
+ 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   return HAL_OK;
+ 141              		.loc 1 184 10 view .LVU33
+ 142 002a 0020     		movs	r0, #0
+ 143              	.L12:
+ 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+ 144              		.loc 1 185 1 view .LVU34
+ 145 002c 10BD     		pop	{r4, pc}
+ 146              	.LVL9:
+ 147              	.L18:
+ 148              		.loc 1 185 1 view .LVU35
+ 149 002e 00BF     		.align	2
+ 150              	.L17:
+ 151 0030 00000E42 		.word	1108213760
+ 152 0034 00700040 		.word	1073770496
+ 153              		.cfi_endproc
+ 154              	.LFE131:
+ 156              		.section	.text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits
+ 157              		.align	1
+ 158              		.global	HAL_PWREx_EnableFlashPowerDown
+ 159              		.syntax unified
+ 160              		.thumb
+ 161              		.thumb_func
+ARM GAS  /tmp/cce0GhQW.s 			page 7
+
+
+ 163              	HAL_PWREx_EnableFlashPowerDown:
+ 164              	.LFB132:
+ 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Enables the Flash Power Down in Stop mode.
+ 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval None
+ 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void)
+ 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+ 165              		.loc 1 192 1 is_stmt 1 view -0
+ 166              		.cfi_startproc
+ 167              		@ args = 0, pretend = 0, frame = 0
+ 168              		@ frame_needed = 0, uses_anonymous_args = 0
+ 169              		@ link register save eliminated.
+ 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
+ 170              		.loc 1 193 3 view .LVU37
+ 171              		.loc 1 193 33 is_stmt 0 view .LVU38
+ 172 0000 014B     		ldr	r3, .L20
+ 173 0002 0122     		movs	r2, #1
+ 174 0004 5A62     		str	r2, [r3, #36]
+ 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+ 175              		.loc 1 194 1 view .LVU39
+ 176 0006 7047     		bx	lr
+ 177              	.L21:
+ 178              		.align	2
+ 179              	.L20:
+ 180 0008 00000E42 		.word	1108213760
+ 181              		.cfi_endproc
+ 182              	.LFE132:
+ 184              		.section	.text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits
+ 185              		.align	1
+ 186              		.global	HAL_PWREx_DisableFlashPowerDown
+ 187              		.syntax unified
+ 188              		.thumb
+ 189              		.thumb_func
+ 191              	HAL_PWREx_DisableFlashPowerDown:
+ 192              	.LFB133:
+ 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Disables the Flash Power Down in Stop mode.
+ 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval None
+ 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void)
+ 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+ 193              		.loc 1 201 1 is_stmt 1 view -0
+ 194              		.cfi_startproc
+ 195              		@ args = 0, pretend = 0, frame = 0
+ 196              		@ frame_needed = 0, uses_anonymous_args = 0
+ 197              		@ link register save eliminated.
+ 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
+ 198              		.loc 1 202 3 view .LVU41
+ 199              		.loc 1 202 33 is_stmt 0 view .LVU42
+ 200 0000 014B     		ldr	r3, .L23
+ 201 0002 0022     		movs	r2, #0
+ 202 0004 5A62     		str	r2, [r3, #36]
+ 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+ 203              		.loc 1 203 1 view .LVU43
+ARM GAS  /tmp/cce0GhQW.s 			page 8
+
+
+ 204 0006 7047     		bx	lr
+ 205              	.L24:
+ 206              		.align	2
+ 207              	.L23:
+ 208 0008 00000E42 		.word	1108213760
+ 209              		.cfi_endproc
+ 210              	.LFE133:
+ 212              		.section	.text.HAL_PWREx_GetVoltageRange,"ax",%progbits
+ 213              		.align	1
+ 214              		.global	HAL_PWREx_GetVoltageRange
+ 215              		.syntax unified
+ 216              		.thumb
+ 217              		.thumb_func
+ 219              	HAL_PWREx_GetVoltageRange:
+ 220              	.LFB134:
+ 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Return Voltage Scaling Range.
+ 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval The configured scale for the regulator voltage(VOS bit field).
+ 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *         The returned value can be one of the following:
+ 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *            - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
+ 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *            - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
+ 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *            - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
+ 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */  
+ 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void)
+ 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+ 221              		.loc 1 214 1 is_stmt 1 view -0
+ 222              		.cfi_startproc
+ 223              		@ args = 0, pretend = 0, frame = 0
+ 224              		@ frame_needed = 0, uses_anonymous_args = 0
+ 225              		@ link register save eliminated.
+ 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   return (PWR->CR & PWR_CR_VOS);
+ 226              		.loc 1 215 3 view .LVU45
+ 227              		.loc 1 215 14 is_stmt 0 view .LVU46
+ 228 0000 024B     		ldr	r3, .L26
+ 229 0002 1868     		ldr	r0, [r3]
+ 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+ 230              		.loc 1 216 1 view .LVU47
+ 231 0004 00F48040 		and	r0, r0, #16384
+ 232 0008 7047     		bx	lr
+ 233              	.L27:
+ 234 000a 00BF     		.align	2
+ 235              	.L26:
+ 236 000c 00700040 		.word	1073770496
+ 237              		.cfi_endproc
+ 238              	.LFE134:
+ 240              		.section	.text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits
+ 241              		.align	1
+ 242              		.global	HAL_PWREx_ControlVoltageScaling
+ 243              		.syntax unified
+ 244              		.thumb
+ 245              		.thumb_func
+ 247              	HAL_PWREx_ControlVoltageScaling:
+ 248              	.LVL10:
+ 249              	.LFB135:
+ 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
+ARM GAS  /tmp/cce0GhQW.s 			page 9
+
+
+ 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
+ 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @brief Configures the main internal regulator output voltage.
+ 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @param  VoltageScaling specifies the regulator output voltage to achieve
+ 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *         a tradeoff between performance and power consumption.
+ 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *          This parameter can be one of the following values:
+ 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
+ 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *                                               the maximum value of fHCLK = 168 MHz.
+ 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
+ 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *                                               the maximum value of fHCLK = 144 MHz.
+ 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @note  When moving from Range 1 to Range 2, the system frequency must be decreased to
+ 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *        a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
+ 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *        When moving from Range 2 to Range 1, the system frequency can be increased to
+ 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   *        a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
+ 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   * @retval HAL Status
+ 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   */
+ 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
+ 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
+ 250              		.loc 1 235 1 is_stmt 1 view -0
+ 251              		.cfi_startproc
+ 252              		@ args = 0, pretend = 0, frame = 8
+ 253              		@ frame_needed = 0, uses_anonymous_args = 0
+ 254              		.loc 1 235 1 is_stmt 0 view .LVU49
+ 255 0000 10B5     		push	{r4, lr}
+ 256              	.LCFI2:
+ 257              		.cfi_def_cfa_offset 8
+ 258              		.cfi_offset 4, -8
+ 259              		.cfi_offset 14, -4
+ 260 0002 82B0     		sub	sp, sp, #8
+ 261              	.LCFI3:
+ 262              		.cfi_def_cfa_offset 16
+ 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   uint32_t tickstart = 0U;
+ 263              		.loc 1 236 3 is_stmt 1 view .LVU50
+ 264              	.LVL11:
+ 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   
+ 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
+ 265              		.loc 1 238 3 view .LVU51
+ 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   
+ 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Enable PWR RCC Clock Peripheral */
+ 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   __HAL_RCC_PWR_CLK_ENABLE();
+ 266              		.loc 1 241 3 view .LVU52
+ 267              	.LBB2:
+ 268              		.loc 1 241 3 view .LVU53
+ 269 0004 0024     		movs	r4, #0
+ 270 0006 0094     		str	r4, [sp]
+ 271              		.loc 1 241 3 view .LVU54
+ 272 0008 144A     		ldr	r2, .L35
+ 273 000a 116C     		ldr	r1, [r2, #64]
+ 274 000c 41F08051 		orr	r1, r1, #268435456
+ 275 0010 1164     		str	r1, [r2, #64]
+ 276              		.loc 1 241 3 view .LVU55
+ 277 0012 126C     		ldr	r2, [r2, #64]
+ 278 0014 02F08052 		and	r2, r2, #268435456
+ 279 0018 0092     		str	r2, [sp]
+ 280              		.loc 1 241 3 view .LVU56
+ 281 001a 009B     		ldr	r3, [sp]
+ 282              	.LBE2:
+ 283              		.loc 1 241 3 view .LVU57
+ARM GAS  /tmp/cce0GhQW.s 			page 10
+
+
+ 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   
+ 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Set Range */
+ 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
+ 284              		.loc 1 244 3 view .LVU58
+ 285              	.LBB3:
+ 286              		.loc 1 244 3 view .LVU59
+ 287 001c 0194     		str	r4, [sp, #4]
+ 288              		.loc 1 244 3 view .LVU60
+ 289 001e 104A     		ldr	r2, .L35+4
+ 290 0020 1368     		ldr	r3, [r2]
+ 291 0022 23F48043 		bic	r3, r3, #16384
+ 292 0026 0343     		orrs	r3, r3, r0
+ 293 0028 1360     		str	r3, [r2]
+ 294              		.loc 1 244 3 view .LVU61
+ 295 002a 1368     		ldr	r3, [r2]
+ 296 002c 03F48043 		and	r3, r3, #16384
+ 297 0030 0193     		str	r3, [sp, #4]
+ 298              		.loc 1 244 3 view .LVU62
+ 299 0032 019B     		ldr	r3, [sp, #4]
+ 300              	.LBE3:
+ 301              		.loc 1 244 3 view .LVU63
+ 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   
+ 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   /* Get Start Tick*/
+ 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   tickstart = HAL_GetTick();
+ 302              		.loc 1 247 3 view .LVU64
+ 303              		.loc 1 247 15 is_stmt 0 view .LVU65
+ 304 0034 FFF7FEFF 		bl	HAL_GetTick
+ 305              	.LVL12:
+ 306              		.loc 1 247 15 view .LVU66
+ 307 0038 0446     		mov	r4, r0
+ 308              	.LVL13:
+ 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
+ 309              		.loc 1 248 3 is_stmt 1 view .LVU67
+ 310              	.L29:
+ 311              		.loc 1 248 8 view .LVU68
+ 312              		.loc 1 248 10 is_stmt 0 view .LVU69
+ 313 003a 094B     		ldr	r3, .L35+4
+ 314 003c 5B68     		ldr	r3, [r3, #4]
+ 315              		.loc 1 248 8 view .LVU70
+ 316 003e 13F4804F 		tst	r3, #16384
+ 317 0042 07D1     		bne	.L34
+ 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   {
+ 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
+ 318              		.loc 1 250 5 is_stmt 1 view .LVU71
+ 319              		.loc 1 250 9 is_stmt 0 view .LVU72
+ 320 0044 FFF7FEFF 		bl	HAL_GetTick
+ 321              	.LVL14:
+ 322              		.loc 1 250 23 view .LVU73
+ 323 0048 001B     		subs	r0, r0, r4
+ 324              		.loc 1 250 7 view .LVU74
+ 325 004a B0F57A7F 		cmp	r0, #1000
+ 326 004e F4D9     		bls	.L29
+ 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     {
+ 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****       return HAL_TIMEOUT;
+ 327              		.loc 1 252 14 view .LVU75
+ 328 0050 0320     		movs	r0, #3
+ 329 0052 00E0     		b	.L30
+ARM GAS  /tmp/cce0GhQW.s 			page 11
+
+
+ 330              	.L34:
+ 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****     } 
+ 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   }
+ 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 
+ 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****   return HAL_OK;
+ 331              		.loc 1 256 10 view .LVU76
+ 332 0054 0020     		movs	r0, #0
+ 333              	.L30:
+ 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
+ 334              		.loc 1 257 1 view .LVU77
+ 335 0056 02B0     		add	sp, sp, #8
+ 336              	.LCFI4:
+ 337              		.cfi_def_cfa_offset 8
+ 338              		@ sp needed
+ 339 0058 10BD     		pop	{r4, pc}
+ 340              	.LVL15:
+ 341              	.L36:
+ 342              		.loc 1 257 1 view .LVU78
+ 343 005a 00BF     		.align	2
+ 344              	.L35:
+ 345 005c 00380240 		.word	1073887232
+ 346 0060 00700040 		.word	1073770496
+ 347              		.cfi_endproc
+ 348              	.LFE135:
+ 350              		.text
+ 351              	.Letext0:
+ 352              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 353              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 354              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ 355              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
+ 356              		.file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
+ 357              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
+ARM GAS  /tmp/cce0GhQW.s 			page 12
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_pwr_ex.c
+     /tmp/cce0GhQW.s:20     .text.HAL_PWREx_EnableBkUpReg:0000000000000000 $t
+     /tmp/cce0GhQW.s:26     .text.HAL_PWREx_EnableBkUpReg:0000000000000000 HAL_PWREx_EnableBkUpReg
+     /tmp/cce0GhQW.s:83     .text.HAL_PWREx_EnableBkUpReg:0000000000000030 $d
+     /tmp/cce0GhQW.s:89     .text.HAL_PWREx_DisableBkUpReg:0000000000000000 $t
+     /tmp/cce0GhQW.s:95     .text.HAL_PWREx_DisableBkUpReg:0000000000000000 HAL_PWREx_DisableBkUpReg
+     /tmp/cce0GhQW.s:151    .text.HAL_PWREx_DisableBkUpReg:0000000000000030 $d
+     /tmp/cce0GhQW.s:157    .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 $t
+     /tmp/cce0GhQW.s:163    .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 HAL_PWREx_EnableFlashPowerDown
+     /tmp/cce0GhQW.s:180    .text.HAL_PWREx_EnableFlashPowerDown:0000000000000008 $d
+     /tmp/cce0GhQW.s:185    .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 $t
+     /tmp/cce0GhQW.s:191    .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 HAL_PWREx_DisableFlashPowerDown
+     /tmp/cce0GhQW.s:208    .text.HAL_PWREx_DisableFlashPowerDown:0000000000000008 $d
+     /tmp/cce0GhQW.s:213    .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t
+     /tmp/cce0GhQW.s:219    .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange
+     /tmp/cce0GhQW.s:236    .text.HAL_PWREx_GetVoltageRange:000000000000000c $d
+     /tmp/cce0GhQW.s:241    .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t
+     /tmp/cce0GhQW.s:247    .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling
+     /tmp/cce0GhQW.s:345    .text.HAL_PWREx_ControlVoltageScaling:000000000000005c $d
+
+UNDEFINED SYMBOLS
+HAL_GetTick

app/main/CTO20220622/build/stm32f4xx_hal_rcc.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_rcc.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_rcc_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_rcc_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_tim.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_tim.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_tim.lst

@@ -0,0 +1,29 @@
+ARM GAS  /tmp/cc9ZAUNO.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_hal_tim.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              	.Letext0:
+ARM GAS  /tmp/cc9ZAUNO.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_tim.c
+
+NO UNDEFINED SYMBOLS

app/main/CTO20220622/build/stm32f4xx_hal_tim_ex.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_tim_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_hal_tim_ex.lst

@@ -0,0 +1,29 @@
+ARM GAS  /tmp/cctmsduV.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_hal_tim_ex.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              	.Letext0:
+ARM GAS  /tmp/cctmsduV.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_tim_ex.c
+
+NO UNDEFINED SYMBOLS

app/main/CTO20220622/build/stm32f4xx_hal_uart.d

@@ -0,0 +1,56 @@
+build/stm32f4xx_hal_uart.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/stm32f4xx_it.d

@@ -0,0 +1,57 @@
+build/stm32f4xx_it.o: Src/stm32f4xx_it.c Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h Inc/stm32f4xx_it.h
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+Inc/stm32f4xx_it.h:

app/main/CTO20220622/build/stm32f4xx_it.lst

@@ -0,0 +1,606 @@
+ARM GAS  /tmp/cc9QsDpS.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"stm32f4xx_it.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.NMI_Handler,"ax",%progbits
+  20              		.align	1
+  21              		.global	NMI_Handler
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	NMI_Handler:
+  27              	.LFB130:
+  28              		.file 1 "Src/stm32f4xx_it.c"
+   1:Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
+   2:Src/stm32f4xx_it.c **** /**
+   3:Src/stm32f4xx_it.c ****   ******************************************************************************
+   4:Src/stm32f4xx_it.c ****   * @file    stm32f4xx_it.c
+   5:Src/stm32f4xx_it.c ****   * @brief   Interrupt Service Routines.
+   6:Src/stm32f4xx_it.c ****   ******************************************************************************
+   7:Src/stm32f4xx_it.c ****   * @attention
+   8:Src/stm32f4xx_it.c ****   *
+   9:Src/stm32f4xx_it.c ****   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  10:Src/stm32f4xx_it.c ****   * All rights reserved.</center></h2>
+  11:Src/stm32f4xx_it.c ****   *
+  12:Src/stm32f4xx_it.c ****   * This software component is licensed by ST under Ultimate Liberty license
+  13:Src/stm32f4xx_it.c ****   * SLA0044, the "License"; You may not use this file except in compliance with
+  14:Src/stm32f4xx_it.c ****   * the License. You may obtain a copy of the License at:
+  15:Src/stm32f4xx_it.c ****   *                             www.st.com/SLA0044
+  16:Src/stm32f4xx_it.c ****   *
+  17:Src/stm32f4xx_it.c ****   ******************************************************************************
+  18:Src/stm32f4xx_it.c ****   */
+  19:Src/stm32f4xx_it.c **** /* USER CODE END Header */
+  20:Src/stm32f4xx_it.c **** 
+  21:Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
+  22:Src/stm32f4xx_it.c **** #include "main.h"
+  23:Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
+  24:Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
+  25:Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
+  26:Src/stm32f4xx_it.c **** /* USER CODE END Includes */
+  27:Src/stm32f4xx_it.c **** 
+  28:Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
+  29:Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
+  30:Src/stm32f4xx_it.c **** 
+ARM GAS  /tmp/cc9QsDpS.s 			page 2
+
+
+  31:Src/stm32f4xx_it.c **** /* USER CODE END TD */
+  32:Src/stm32f4xx_it.c **** 
+  33:Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
+  34:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
+  35:Src/stm32f4xx_it.c ****  
+  36:Src/stm32f4xx_it.c **** /* USER CODE END PD */
+  37:Src/stm32f4xx_it.c **** 
+  38:Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
+  39:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
+  40:Src/stm32f4xx_it.c **** 
+  41:Src/stm32f4xx_it.c **** /* USER CODE END PM */
+  42:Src/stm32f4xx_it.c **** 
+  43:Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
+  44:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
+  45:Src/stm32f4xx_it.c **** 
+  46:Src/stm32f4xx_it.c **** /* USER CODE END PV */
+  47:Src/stm32f4xx_it.c **** 
+  48:Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
+  49:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
+  50:Src/stm32f4xx_it.c **** 
+  51:Src/stm32f4xx_it.c **** /* USER CODE END PFP */
+  52:Src/stm32f4xx_it.c **** 
+  53:Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
+  54:Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
+  55:Src/stm32f4xx_it.c **** 
+  56:Src/stm32f4xx_it.c **** /* USER CODE END 0 */
+  57:Src/stm32f4xx_it.c **** 
+  58:Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
+  59:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart4;
+  60:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart1;
+  61:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart2;
+  62:Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
+  63:Src/stm32f4xx_it.c **** 
+  64:Src/stm32f4xx_it.c **** /* USER CODE END EV */
+  65:Src/stm32f4xx_it.c **** 
+  66:Src/stm32f4xx_it.c **** /******************************************************************************/
+  67:Src/stm32f4xx_it.c **** /*           Cortex-M4 Processor Interruption and Exception Handlers          */ 
+  68:Src/stm32f4xx_it.c **** /******************************************************************************/
+  69:Src/stm32f4xx_it.c **** /**
+  70:Src/stm32f4xx_it.c ****   * @brief This function handles Non maskable interrupt.
+  71:Src/stm32f4xx_it.c ****   */
+  72:Src/stm32f4xx_it.c **** void NMI_Handler(void)
+  73:Src/stm32f4xx_it.c **** {
+  29              		.loc 1 73 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 0
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+  74:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+  75:Src/stm32f4xx_it.c **** 
+  76:Src/stm32f4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
+  77:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  78:Src/stm32f4xx_it.c **** 
+  79:Src/stm32f4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
+  80:Src/stm32f4xx_it.c **** }
+  34              		.loc 1 80 1 view .LVU1
+  35 0000 7047     		bx	lr
+ARM GAS  /tmp/cc9QsDpS.s 			page 3
+
+
+  36              		.cfi_endproc
+  37              	.LFE130:
+  39              		.section	.text.HardFault_Handler,"ax",%progbits
+  40              		.align	1
+  41              		.global	HardFault_Handler
+  42              		.syntax unified
+  43              		.thumb
+  44              		.thumb_func
+  46              	HardFault_Handler:
+  47              	.LFB131:
+  81:Src/stm32f4xx_it.c **** 
+  82:Src/stm32f4xx_it.c **** /**
+  83:Src/stm32f4xx_it.c ****   * @brief This function handles Hard fault interrupt.
+  84:Src/stm32f4xx_it.c ****   */
+  85:Src/stm32f4xx_it.c **** void HardFault_Handler(void)
+  86:Src/stm32f4xx_it.c **** {
+  48              		.loc 1 86 1 view -0
+  49              		.cfi_startproc
+  50              		@ Volatile: function does not return.
+  51              		@ args = 0, pretend = 0, frame = 0
+  52              		@ frame_needed = 0, uses_anonymous_args = 0
+  53              		@ link register save eliminated.
+  54              	.L3:
+  87:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
+  88:Src/stm32f4xx_it.c **** 
+  89:Src/stm32f4xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
+  90:Src/stm32f4xx_it.c ****   while (1)
+  55              		.loc 1 90 3 discriminator 1 view .LVU3
+  91:Src/stm32f4xx_it.c ****   {
+  92:Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+  93:Src/stm32f4xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
+  94:Src/stm32f4xx_it.c ****   }
+  56              		.loc 1 94 3 discriminator 1 view .LVU4
+  90:Src/stm32f4xx_it.c ****   {
+  57              		.loc 1 90 9 discriminator 1 view .LVU5
+  58 0000 FEE7     		b	.L3
+  59              		.cfi_endproc
+  60              	.LFE131:
+  62              		.section	.text.MemManage_Handler,"ax",%progbits
+  63              		.align	1
+  64              		.global	MemManage_Handler
+  65              		.syntax unified
+  66              		.thumb
+  67              		.thumb_func
+  69              	MemManage_Handler:
+  70              	.LFB132:
+  95:Src/stm32f4xx_it.c **** }
+  96:Src/stm32f4xx_it.c **** 
+  97:Src/stm32f4xx_it.c **** /**
+  98:Src/stm32f4xx_it.c ****   * @brief This function handles Memory management fault.
+  99:Src/stm32f4xx_it.c ****   */
+ 100:Src/stm32f4xx_it.c **** void MemManage_Handler(void)
+ 101:Src/stm32f4xx_it.c **** {
+  71              		.loc 1 101 1 view -0
+  72              		.cfi_startproc
+  73              		@ Volatile: function does not return.
+  74              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/cc9QsDpS.s 			page 4
+
+
+  75              		@ frame_needed = 0, uses_anonymous_args = 0
+  76              		@ link register save eliminated.
+  77              	.L5:
+ 102:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+ 103:Src/stm32f4xx_it.c **** 
+ 104:Src/stm32f4xx_it.c ****   /* USER CODE END MemoryManagement_IRQn 0 */
+ 105:Src/stm32f4xx_it.c ****   while (1)
+  78              		.loc 1 105 3 discriminator 1 view .LVU7
+ 106:Src/stm32f4xx_it.c ****   {
+ 107:Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ 108:Src/stm32f4xx_it.c ****     /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ 109:Src/stm32f4xx_it.c ****   }
+  79              		.loc 1 109 3 discriminator 1 view .LVU8
+ 105:Src/stm32f4xx_it.c ****   {
+  80              		.loc 1 105 9 discriminator 1 view .LVU9
+  81 0000 FEE7     		b	.L5
+  82              		.cfi_endproc
+  83              	.LFE132:
+  85              		.section	.text.BusFault_Handler,"ax",%progbits
+  86              		.align	1
+  87              		.global	BusFault_Handler
+  88              		.syntax unified
+  89              		.thumb
+  90              		.thumb_func
+  92              	BusFault_Handler:
+  93              	.LFB133:
+ 110:Src/stm32f4xx_it.c **** }
+ 111:Src/stm32f4xx_it.c **** 
+ 112:Src/stm32f4xx_it.c **** /**
+ 113:Src/stm32f4xx_it.c ****   * @brief This function handles Pre-fetch fault, memory access fault.
+ 114:Src/stm32f4xx_it.c ****   */
+ 115:Src/stm32f4xx_it.c **** void BusFault_Handler(void)
+ 116:Src/stm32f4xx_it.c **** {
+  94              		.loc 1 116 1 view -0
+  95              		.cfi_startproc
+  96              		@ Volatile: function does not return.
+  97              		@ args = 0, pretend = 0, frame = 0
+  98              		@ frame_needed = 0, uses_anonymous_args = 0
+  99              		@ link register save eliminated.
+ 100              	.L7:
+ 117:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN BusFault_IRQn 0 */
+ 118:Src/stm32f4xx_it.c **** 
+ 119:Src/stm32f4xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
+ 120:Src/stm32f4xx_it.c ****   while (1)
+ 101              		.loc 1 120 3 discriminator 1 view .LVU11
+ 121:Src/stm32f4xx_it.c ****   {
+ 122:Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ 123:Src/stm32f4xx_it.c ****     /* USER CODE END W1_BusFault_IRQn 0 */
+ 124:Src/stm32f4xx_it.c ****   }
+ 102              		.loc 1 124 3 discriminator 1 view .LVU12
+ 120:Src/stm32f4xx_it.c ****   {
+ 103              		.loc 1 120 9 discriminator 1 view .LVU13
+ 104 0000 FEE7     		b	.L7
+ 105              		.cfi_endproc
+ 106              	.LFE133:
+ 108              		.section	.text.UsageFault_Handler,"ax",%progbits
+ 109              		.align	1
+ARM GAS  /tmp/cc9QsDpS.s 			page 5
+
+
+ 110              		.global	UsageFault_Handler
+ 111              		.syntax unified
+ 112              		.thumb
+ 113              		.thumb_func
+ 115              	UsageFault_Handler:
+ 116              	.LFB134:
+ 125:Src/stm32f4xx_it.c **** }
+ 126:Src/stm32f4xx_it.c **** 
+ 127:Src/stm32f4xx_it.c **** /**
+ 128:Src/stm32f4xx_it.c ****   * @brief This function handles Undefined instruction or illegal state.
+ 129:Src/stm32f4xx_it.c ****   */
+ 130:Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
+ 131:Src/stm32f4xx_it.c **** {
+ 117              		.loc 1 131 1 view -0
+ 118              		.cfi_startproc
+ 119              		@ Volatile: function does not return.
+ 120              		@ args = 0, pretend = 0, frame = 0
+ 121              		@ frame_needed = 0, uses_anonymous_args = 0
+ 122              		@ link register save eliminated.
+ 123              	.L9:
+ 132:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN UsageFault_IRQn 0 */
+ 133:Src/stm32f4xx_it.c **** 
+ 134:Src/stm32f4xx_it.c ****   /* USER CODE END UsageFault_IRQn 0 */
+ 135:Src/stm32f4xx_it.c ****   while (1)
+ 124              		.loc 1 135 3 discriminator 1 view .LVU15
+ 136:Src/stm32f4xx_it.c ****   {
+ 137:Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ 138:Src/stm32f4xx_it.c ****     /* USER CODE END W1_UsageFault_IRQn 0 */
+ 139:Src/stm32f4xx_it.c ****   }
+ 125              		.loc 1 139 3 discriminator 1 view .LVU16
+ 135:Src/stm32f4xx_it.c ****   {
+ 126              		.loc 1 135 9 discriminator 1 view .LVU17
+ 127 0000 FEE7     		b	.L9
+ 128              		.cfi_endproc
+ 129              	.LFE134:
+ 131              		.section	.text.SVC_Handler,"ax",%progbits
+ 132              		.align	1
+ 133              		.global	SVC_Handler
+ 134              		.syntax unified
+ 135              		.thumb
+ 136              		.thumb_func
+ 138              	SVC_Handler:
+ 139              	.LFB135:
+ 140:Src/stm32f4xx_it.c **** }
+ 141:Src/stm32f4xx_it.c **** 
+ 142:Src/stm32f4xx_it.c **** /**
+ 143:Src/stm32f4xx_it.c ****   * @brief This function handles System service call via SWI instruction.
+ 144:Src/stm32f4xx_it.c ****   */
+ 145:Src/stm32f4xx_it.c **** void SVC_Handler(void)
+ 146:Src/stm32f4xx_it.c **** {
+ 140              		.loc 1 146 1 view -0
+ 141              		.cfi_startproc
+ 142              		@ args = 0, pretend = 0, frame = 0
+ 143              		@ frame_needed = 0, uses_anonymous_args = 0
+ 144              		@ link register save eliminated.
+ 147:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 0 */
+ 148:Src/stm32f4xx_it.c **** 
+ARM GAS  /tmp/cc9QsDpS.s 			page 6
+
+
+ 149:Src/stm32f4xx_it.c ****   /* USER CODE END SVCall_IRQn 0 */
+ 150:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 1 */
+ 151:Src/stm32f4xx_it.c **** 
+ 152:Src/stm32f4xx_it.c ****   /* USER CODE END SVCall_IRQn 1 */
+ 153:Src/stm32f4xx_it.c **** }
+ 145              		.loc 1 153 1 view .LVU19
+ 146 0000 7047     		bx	lr
+ 147              		.cfi_endproc
+ 148              	.LFE135:
+ 150              		.section	.text.DebugMon_Handler,"ax",%progbits
+ 151              		.align	1
+ 152              		.global	DebugMon_Handler
+ 153              		.syntax unified
+ 154              		.thumb
+ 155              		.thumb_func
+ 157              	DebugMon_Handler:
+ 158              	.LFB136:
+ 154:Src/stm32f4xx_it.c **** 
+ 155:Src/stm32f4xx_it.c **** /**
+ 156:Src/stm32f4xx_it.c ****   * @brief This function handles Debug monitor.
+ 157:Src/stm32f4xx_it.c ****   */
+ 158:Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
+ 159:Src/stm32f4xx_it.c **** {
+ 159              		.loc 1 159 1 view -0
+ 160              		.cfi_startproc
+ 161              		@ args = 0, pretend = 0, frame = 0
+ 162              		@ frame_needed = 0, uses_anonymous_args = 0
+ 163              		@ link register save eliminated.
+ 160:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+ 161:Src/stm32f4xx_it.c **** 
+ 162:Src/stm32f4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 0 */
+ 163:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+ 164:Src/stm32f4xx_it.c **** 
+ 165:Src/stm32f4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 1 */
+ 166:Src/stm32f4xx_it.c **** }
+ 164              		.loc 1 166 1 view .LVU21
+ 165 0000 7047     		bx	lr
+ 166              		.cfi_endproc
+ 167              	.LFE136:
+ 169              		.section	.text.PendSV_Handler,"ax",%progbits
+ 170              		.align	1
+ 171              		.global	PendSV_Handler
+ 172              		.syntax unified
+ 173              		.thumb
+ 174              		.thumb_func
+ 176              	PendSV_Handler:
+ 177              	.LFB137:
+ 167:Src/stm32f4xx_it.c **** 
+ 168:Src/stm32f4xx_it.c **** /**
+ 169:Src/stm32f4xx_it.c ****   * @brief This function handles Pendable request for system service.
+ 170:Src/stm32f4xx_it.c ****   */
+ 171:Src/stm32f4xx_it.c **** void PendSV_Handler(void)
+ 172:Src/stm32f4xx_it.c **** {
+ 178              		.loc 1 172 1 view -0
+ 179              		.cfi_startproc
+ 180              		@ args = 0, pretend = 0, frame = 0
+ 181              		@ frame_needed = 0, uses_anonymous_args = 0
+ARM GAS  /tmp/cc9QsDpS.s 			page 7
+
+
+ 182              		@ link register save eliminated.
+ 173:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
+ 174:Src/stm32f4xx_it.c **** 
+ 175:Src/stm32f4xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
+ 176:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
+ 177:Src/stm32f4xx_it.c **** 
+ 178:Src/stm32f4xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
+ 179:Src/stm32f4xx_it.c **** }
+ 183              		.loc 1 179 1 view .LVU23
+ 184 0000 7047     		bx	lr
+ 185              		.cfi_endproc
+ 186              	.LFE137:
+ 188              		.section	.text.SysTick_Handler,"ax",%progbits
+ 189              		.align	1
+ 190              		.global	SysTick_Handler
+ 191              		.syntax unified
+ 192              		.thumb
+ 193              		.thumb_func
+ 195              	SysTick_Handler:
+ 196              	.LFB138:
+ 180:Src/stm32f4xx_it.c **** 
+ 181:Src/stm32f4xx_it.c **** /**
+ 182:Src/stm32f4xx_it.c ****   * @brief This function handles System tick timer.
+ 183:Src/stm32f4xx_it.c ****   */
+ 184:Src/stm32f4xx_it.c **** void SysTick_Handler(void)
+ 185:Src/stm32f4xx_it.c **** {
+ 197              		.loc 1 185 1 view -0
+ 198              		.cfi_startproc
+ 199              		@ args = 0, pretend = 0, frame = 0
+ 200              		@ frame_needed = 0, uses_anonymous_args = 0
+ 201 0000 08B5     		push	{r3, lr}
+ 202              	.LCFI0:
+ 203              		.cfi_def_cfa_offset 8
+ 204              		.cfi_offset 3, -8
+ 205              		.cfi_offset 14, -4
+ 186:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
+ 187:Src/stm32f4xx_it.c **** 
+ 188:Src/stm32f4xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
+ 189:Src/stm32f4xx_it.c ****   HAL_IncTick();
+ 206              		.loc 1 189 3 view .LVU25
+ 207 0002 FFF7FEFF 		bl	HAL_IncTick
+ 208              	.LVL0:
+ 190:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
+ 191:Src/stm32f4xx_it.c **** 
+ 192:Src/stm32f4xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
+ 193:Src/stm32f4xx_it.c **** }
+ 209              		.loc 1 193 1 is_stmt 0 view .LVU26
+ 210 0006 08BD     		pop	{r3, pc}
+ 211              		.cfi_endproc
+ 212              	.LFE138:
+ 214              		.section	.text.USART1_IRQHandler,"ax",%progbits
+ 215              		.align	1
+ 216              		.global	USART1_IRQHandler
+ 217              		.syntax unified
+ 218              		.thumb
+ 219              		.thumb_func
+ 221              	USART1_IRQHandler:
+ARM GAS  /tmp/cc9QsDpS.s 			page 8
+
+
+ 222              	.LFB139:
+ 194:Src/stm32f4xx_it.c **** 
+ 195:Src/stm32f4xx_it.c **** /******************************************************************************/
+ 196:Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers                                    */
+ 197:Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals.                  */
+ 198:Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names,                      */
+ 199:Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s).                    */
+ 200:Src/stm32f4xx_it.c **** /******************************************************************************/
+ 201:Src/stm32f4xx_it.c **** 
+ 202:Src/stm32f4xx_it.c **** /**
+ 203:Src/stm32f4xx_it.c ****   * @brief This function handles USART1 global interrupt.
+ 204:Src/stm32f4xx_it.c ****   */
+ 205:Src/stm32f4xx_it.c **** void USART1_IRQHandler(void)
+ 206:Src/stm32f4xx_it.c **** {
+ 223              		.loc 1 206 1 is_stmt 1 view -0
+ 224              		.cfi_startproc
+ 225              		@ args = 0, pretend = 0, frame = 0
+ 226              		@ frame_needed = 0, uses_anonymous_args = 0
+ 227 0000 08B5     		push	{r3, lr}
+ 228              	.LCFI1:
+ 229              		.cfi_def_cfa_offset 8
+ 230              		.cfi_offset 3, -8
+ 231              		.cfi_offset 14, -4
+ 207:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 0 */
+ 208:Src/stm32f4xx_it.c **** 
+ 209:Src/stm32f4xx_it.c ****   /* USER CODE END USART1_IRQn 0 */
+ 210:Src/stm32f4xx_it.c ****   HAL_UART_IRQHandler(&huart1);
+ 232              		.loc 1 210 3 view .LVU28
+ 233 0002 0248     		ldr	r0, .L17
+ 234 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
+ 235              	.LVL1:
+ 211:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 1 */
+ 212:Src/stm32f4xx_it.c **** 
+ 213:Src/stm32f4xx_it.c ****   /* USER CODE END USART1_IRQn 1 */
+ 214:Src/stm32f4xx_it.c **** }
+ 236              		.loc 1 214 1 is_stmt 0 view .LVU29
+ 237 0008 08BD     		pop	{r3, pc}
+ 238              	.L18:
+ 239 000a 00BF     		.align	2
+ 240              	.L17:
+ 241 000c 00000000 		.word	huart1
+ 242              		.cfi_endproc
+ 243              	.LFE139:
+ 245              		.section	.text.USART2_IRQHandler,"ax",%progbits
+ 246              		.align	1
+ 247              		.global	USART2_IRQHandler
+ 248              		.syntax unified
+ 249              		.thumb
+ 250              		.thumb_func
+ 252              	USART2_IRQHandler:
+ 253              	.LFB140:
+ 215:Src/stm32f4xx_it.c **** 
+ 216:Src/stm32f4xx_it.c **** /**
+ 217:Src/stm32f4xx_it.c ****   * @brief This function handles USART2 global interrupt.
+ 218:Src/stm32f4xx_it.c ****   */
+ 219:Src/stm32f4xx_it.c **** void USART2_IRQHandler(void)
+ 220:Src/stm32f4xx_it.c **** {
+ARM GAS  /tmp/cc9QsDpS.s 			page 9
+
+
+ 254              		.loc 1 220 1 is_stmt 1 view -0
+ 255              		.cfi_startproc
+ 256              		@ args = 0, pretend = 0, frame = 0
+ 257              		@ frame_needed = 0, uses_anonymous_args = 0
+ 258 0000 08B5     		push	{r3, lr}
+ 259              	.LCFI2:
+ 260              		.cfi_def_cfa_offset 8
+ 261              		.cfi_offset 3, -8
+ 262              		.cfi_offset 14, -4
+ 221:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN USART2_IRQn 0 */
+ 222:Src/stm32f4xx_it.c **** 
+ 223:Src/stm32f4xx_it.c ****   /* USER CODE END USART2_IRQn 0 */
+ 224:Src/stm32f4xx_it.c ****   HAL_UART_IRQHandler(&huart2);
+ 263              		.loc 1 224 3 view .LVU31
+ 264 0002 0248     		ldr	r0, .L21
+ 265 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
+ 266              	.LVL2:
+ 225:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN USART2_IRQn 1 */
+ 226:Src/stm32f4xx_it.c **** 
+ 227:Src/stm32f4xx_it.c ****   /* USER CODE END USART2_IRQn 1 */
+ 228:Src/stm32f4xx_it.c **** }
+ 267              		.loc 1 228 1 is_stmt 0 view .LVU32
+ 268 0008 08BD     		pop	{r3, pc}
+ 269              	.L22:
+ 270 000a 00BF     		.align	2
+ 271              	.L21:
+ 272 000c 00000000 		.word	huart2
+ 273              		.cfi_endproc
+ 274              	.LFE140:
+ 276              		.section	.text.UART4_IRQHandler,"ax",%progbits
+ 277              		.align	1
+ 278              		.global	UART4_IRQHandler
+ 279              		.syntax unified
+ 280              		.thumb
+ 281              		.thumb_func
+ 283              	UART4_IRQHandler:
+ 284              	.LFB141:
+ 229:Src/stm32f4xx_it.c **** 
+ 230:Src/stm32f4xx_it.c **** /**
+ 231:Src/stm32f4xx_it.c ****   * @brief This function handles UART4 global interrupt.
+ 232:Src/stm32f4xx_it.c ****   */
+ 233:Src/stm32f4xx_it.c **** void UART4_IRQHandler(void)
+ 234:Src/stm32f4xx_it.c **** {
+ 285              		.loc 1 234 1 is_stmt 1 view -0
+ 286              		.cfi_startproc
+ 287              		@ args = 0, pretend = 0, frame = 0
+ 288              		@ frame_needed = 0, uses_anonymous_args = 0
+ 289 0000 08B5     		push	{r3, lr}
+ 290              	.LCFI3:
+ 291              		.cfi_def_cfa_offset 8
+ 292              		.cfi_offset 3, -8
+ 293              		.cfi_offset 14, -4
+ 235:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN UART4_IRQn 0 */
+ 236:Src/stm32f4xx_it.c **** 
+ 237:Src/stm32f4xx_it.c ****   /* USER CODE END UART4_IRQn 0 */
+ 238:Src/stm32f4xx_it.c ****   HAL_UART_IRQHandler(&huart4);
+ 294              		.loc 1 238 3 view .LVU34
+ARM GAS  /tmp/cc9QsDpS.s 			page 10
+
+
+ 295 0002 0248     		ldr	r0, .L25
+ 296 0004 FFF7FEFF 		bl	HAL_UART_IRQHandler
+ 297              	.LVL3:
+ 239:Src/stm32f4xx_it.c ****   /* USER CODE BEGIN UART4_IRQn 1 */
+ 240:Src/stm32f4xx_it.c **** 
+ 241:Src/stm32f4xx_it.c ****   /* USER CODE END UART4_IRQn 1 */
+ 242:Src/stm32f4xx_it.c **** }
+ 298              		.loc 1 242 1 is_stmt 0 view .LVU35
+ 299 0008 08BD     		pop	{r3, pc}
+ 300              	.L26:
+ 301 000a 00BF     		.align	2
+ 302              	.L25:
+ 303 000c 00000000 		.word	huart4
+ 304              		.cfi_endproc
+ 305              	.LFE141:
+ 307              		.text
+ 308              	.Letext0:
+ 309              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 310              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 311              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ 312              		.file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
+ 313              		.file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
+ 314              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
+ 315              		.file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
+ARM GAS  /tmp/cc9QsDpS.s 			page 11
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_it.c
+     /tmp/cc9QsDpS.s:20     .text.NMI_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:26     .text.NMI_Handler:0000000000000000 NMI_Handler
+     /tmp/cc9QsDpS.s:40     .text.HardFault_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:46     .text.HardFault_Handler:0000000000000000 HardFault_Handler
+     /tmp/cc9QsDpS.s:63     .text.MemManage_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:69     .text.MemManage_Handler:0000000000000000 MemManage_Handler
+     /tmp/cc9QsDpS.s:86     .text.BusFault_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:92     .text.BusFault_Handler:0000000000000000 BusFault_Handler
+     /tmp/cc9QsDpS.s:109    .text.UsageFault_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:115    .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
+     /tmp/cc9QsDpS.s:132    .text.SVC_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:138    .text.SVC_Handler:0000000000000000 SVC_Handler
+     /tmp/cc9QsDpS.s:151    .text.DebugMon_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:157    .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
+     /tmp/cc9QsDpS.s:170    .text.PendSV_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:176    .text.PendSV_Handler:0000000000000000 PendSV_Handler
+     /tmp/cc9QsDpS.s:189    .text.SysTick_Handler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:195    .text.SysTick_Handler:0000000000000000 SysTick_Handler
+     /tmp/cc9QsDpS.s:215    .text.USART1_IRQHandler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:221    .text.USART1_IRQHandler:0000000000000000 USART1_IRQHandler
+     /tmp/cc9QsDpS.s:241    .text.USART1_IRQHandler:000000000000000c $d
+     /tmp/cc9QsDpS.s:246    .text.USART2_IRQHandler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:252    .text.USART2_IRQHandler:0000000000000000 USART2_IRQHandler
+     /tmp/cc9QsDpS.s:272    .text.USART2_IRQHandler:000000000000000c $d
+     /tmp/cc9QsDpS.s:277    .text.UART4_IRQHandler:0000000000000000 $t
+     /tmp/cc9QsDpS.s:283    .text.UART4_IRQHandler:0000000000000000 UART4_IRQHandler
+     /tmp/cc9QsDpS.s:303    .text.UART4_IRQHandler:000000000000000c $d
+
+UNDEFINED SYMBOLS
+HAL_IncTick
+HAL_UART_IRQHandler
+huart1
+huart2
+huart4

app/main/CTO20220622/build/system_stm32f4xx.d

@@ -0,0 +1,55 @@
+build/system_stm32f4xx.o: Src/system_stm32f4xx.c \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

app/main/CTO20220622/build/system_stm32f4xx.lst

@@ -0,0 +1,647 @@
+ARM GAS  /tmp/cc8x624m.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.arch armv7e-m
+   3              		.fpu fpv4-sp-d16
+   4              		.eabi_attribute 27, 1
+   5              		.eabi_attribute 28, 1
+   6              		.eabi_attribute 20, 1
+   7              		.eabi_attribute 21, 1
+   8              		.eabi_attribute 23, 3
+   9              		.eabi_attribute 24, 1
+  10              		.eabi_attribute 25, 1
+  11              		.eabi_attribute 26, 1
+  12              		.eabi_attribute 30, 1
+  13              		.eabi_attribute 34, 1
+  14              		.eabi_attribute 18, 4
+  15              		.file	"system_stm32f4xx.c"
+  16              		.text
+  17              	.Ltext0:
+  18              		.cfi_sections	.debug_frame
+  19              		.section	.text.SystemInit,"ax",%progbits
+  20              		.align	1
+  21              		.global	SystemInit
+  22              		.syntax unified
+  23              		.thumb
+  24              		.thumb_func
+  26              	SystemInit:
+  27              	.LFB130:
+  28              		.file 1 "Src/system_stm32f4xx.c"
+   1:Src/system_stm32f4xx.c **** /**
+   2:Src/system_stm32f4xx.c ****   ******************************************************************************
+   3:Src/system_stm32f4xx.c ****   * @file    system_stm32f4xx.c
+   4:Src/system_stm32f4xx.c ****   * @author  MCD Application Team
+   5:Src/system_stm32f4xx.c ****   * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+   6:Src/system_stm32f4xx.c ****   *
+   7:Src/system_stm32f4xx.c ****   *   This file provides two functions and one global variable to be called from 
+   8:Src/system_stm32f4xx.c ****   *   user application:
+   9:Src/system_stm32f4xx.c ****   *      - SystemInit(): This function is called at startup just after reset and 
+  10:Src/system_stm32f4xx.c ****   *                      before branch to main program. This call is made inside
+  11:Src/system_stm32f4xx.c ****   *                      the "startup_stm32f4xx.s" file.
+  12:Src/system_stm32f4xx.c ****   *
+  13:Src/system_stm32f4xx.c ****   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  14:Src/system_stm32f4xx.c ****   *                                  by the user application to setup the SysTick 
+  15:Src/system_stm32f4xx.c ****   *                                  timer or configure other parameters.
+  16:Src/system_stm32f4xx.c ****   *                                     
+  17:Src/system_stm32f4xx.c ****   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  18:Src/system_stm32f4xx.c ****   *                                 be called whenever the core clock is changed
+  19:Src/system_stm32f4xx.c ****   *                                 during program execution.
+  20:Src/system_stm32f4xx.c ****   *
+  21:Src/system_stm32f4xx.c ****   *
+  22:Src/system_stm32f4xx.c ****   ******************************************************************************
+  23:Src/system_stm32f4xx.c ****   * @attention
+  24:Src/system_stm32f4xx.c ****   *
+  25:Src/system_stm32f4xx.c ****   * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
+  26:Src/system_stm32f4xx.c ****   *
+  27:Src/system_stm32f4xx.c ****   * Redistribution and use in source and binary forms, with or without modification,
+  28:Src/system_stm32f4xx.c ****   * are permitted provided that the following conditions are met:
+  29:Src/system_stm32f4xx.c ****   *   1. Redistributions of source code must retain the above copyright notice,
+  30:Src/system_stm32f4xx.c ****   *      this list of conditions and the following disclaimer.
+ARM GAS  /tmp/cc8x624m.s 			page 2
+
+
+  31:Src/system_stm32f4xx.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
+  32:Src/system_stm32f4xx.c ****   *      this list of conditions and the following disclaimer in the documentation
+  33:Src/system_stm32f4xx.c ****   *      and/or other materials provided with the distribution.
+  34:Src/system_stm32f4xx.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  35:Src/system_stm32f4xx.c ****   *      may be used to endorse or promote products derived from this software
+  36:Src/system_stm32f4xx.c ****   *      without specific prior written permission.
+  37:Src/system_stm32f4xx.c ****   *
+  38:Src/system_stm32f4xx.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  39:Src/system_stm32f4xx.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  40:Src/system_stm32f4xx.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  41:Src/system_stm32f4xx.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  42:Src/system_stm32f4xx.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  43:Src/system_stm32f4xx.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  44:Src/system_stm32f4xx.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  45:Src/system_stm32f4xx.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  46:Src/system_stm32f4xx.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  47:Src/system_stm32f4xx.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  48:Src/system_stm32f4xx.c ****   *
+  49:Src/system_stm32f4xx.c ****   ******************************************************************************
+  50:Src/system_stm32f4xx.c ****   */
+  51:Src/system_stm32f4xx.c **** 
+  52:Src/system_stm32f4xx.c **** /** @addtogroup CMSIS
+  53:Src/system_stm32f4xx.c ****   * @{
+  54:Src/system_stm32f4xx.c ****   */
+  55:Src/system_stm32f4xx.c **** 
+  56:Src/system_stm32f4xx.c **** /** @addtogroup stm32f4xx_system
+  57:Src/system_stm32f4xx.c ****   * @{
+  58:Src/system_stm32f4xx.c ****   */  
+  59:Src/system_stm32f4xx.c ****   
+  60:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Includes
+  61:Src/system_stm32f4xx.c ****   * @{
+  62:Src/system_stm32f4xx.c ****   */
+  63:Src/system_stm32f4xx.c **** 
+  64:Src/system_stm32f4xx.c **** 
+  65:Src/system_stm32f4xx.c **** #include "stm32f4xx.h"
+  66:Src/system_stm32f4xx.c **** 
+  67:Src/system_stm32f4xx.c **** #if !defined  (HSE_VALUE) 
+  68:Src/system_stm32f4xx.c ****   #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+  69:Src/system_stm32f4xx.c **** #endif /* HSE_VALUE */
+  70:Src/system_stm32f4xx.c **** 
+  71:Src/system_stm32f4xx.c **** #if !defined  (HSI_VALUE)
+  72:Src/system_stm32f4xx.c ****   #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+  73:Src/system_stm32f4xx.c **** #endif /* HSI_VALUE */
+  74:Src/system_stm32f4xx.c **** 
+  75:Src/system_stm32f4xx.c **** /**
+  76:Src/system_stm32f4xx.c ****   * @}
+  77:Src/system_stm32f4xx.c ****   */
+  78:Src/system_stm32f4xx.c **** 
+  79:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  80:Src/system_stm32f4xx.c ****   * @{
+  81:Src/system_stm32f4xx.c ****   */
+  82:Src/system_stm32f4xx.c **** 
+  83:Src/system_stm32f4xx.c **** /**
+  84:Src/system_stm32f4xx.c ****   * @}
+  85:Src/system_stm32f4xx.c ****   */
+  86:Src/system_stm32f4xx.c **** 
+  87:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Defines
+ARM GAS  /tmp/cc8x624m.s 			page 3
+
+
+  88:Src/system_stm32f4xx.c ****   * @{
+  89:Src/system_stm32f4xx.c ****   */
+  90:Src/system_stm32f4xx.c **** 
+  91:Src/system_stm32f4xx.c **** /************************* Miscellaneous Configuration ************************/
+  92:Src/system_stm32f4xx.c **** /*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
+  93:Src/system_stm32f4xx.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+  94:Src/system_stm32f4xx.c ****  || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+  95:Src/system_stm32f4xx.c ****  || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+  96:Src/system_stm32f4xx.c **** /* #define DATA_IN_ExtSRAM */
+  97:Src/system_stm32f4xx.c **** #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||
+  98:Src/system_stm32f4xx.c ****           STM32F412Zx || STM32F412Vx */
+  99:Src/system_stm32f4xx.c ****  
+ 100:Src/system_stm32f4xx.c **** #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ 101:Src/system_stm32f4xx.c ****  || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+ 102:Src/system_stm32f4xx.c **** /* #define DATA_IN_ExtSDRAM */
+ 103:Src/system_stm32f4xx.c **** #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||
+ 104:Src/system_stm32f4xx.c ****           STM32F479xx */
+ 105:Src/system_stm32f4xx.c **** 
+ 106:Src/system_stm32f4xx.c **** /*!< Uncomment the following line if you need to relocate your vector Table in
+ 107:Src/system_stm32f4xx.c ****      Internal SRAM. */
+ 108:Src/system_stm32f4xx.c **** /* #define VECT_TAB_SRAM */
+ 109:Src/system_stm32f4xx.c **** #define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+ 110:Src/system_stm32f4xx.c ****                                    This value must be a multiple of 0x200. */
+ 111:Src/system_stm32f4xx.c **** /******************************************************************************/
+ 112:Src/system_stm32f4xx.c **** 
+ 113:Src/system_stm32f4xx.c **** /**
+ 114:Src/system_stm32f4xx.c ****   * @}
+ 115:Src/system_stm32f4xx.c ****   */
+ 116:Src/system_stm32f4xx.c **** 
+ 117:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Macros
+ 118:Src/system_stm32f4xx.c ****   * @{
+ 119:Src/system_stm32f4xx.c ****   */
+ 120:Src/system_stm32f4xx.c **** 
+ 121:Src/system_stm32f4xx.c **** /**
+ 122:Src/system_stm32f4xx.c ****   * @}
+ 123:Src/system_stm32f4xx.c ****   */
+ 124:Src/system_stm32f4xx.c **** 
+ 125:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Variables
+ 126:Src/system_stm32f4xx.c ****   * @{
+ 127:Src/system_stm32f4xx.c ****   */
+ 128:Src/system_stm32f4xx.c ****   /* This variable is updated in three ways:
+ 129:Src/system_stm32f4xx.c ****       1) by calling CMSIS function SystemCoreClockUpdate()
+ 130:Src/system_stm32f4xx.c ****       2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 131:Src/system_stm32f4xx.c ****       3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+ 132:Src/system_stm32f4xx.c ****          Note: If you use this function to configure the system clock; then there
+ 133:Src/system_stm32f4xx.c ****                is no need to call the 2 first functions listed above, since SystemCoreClock
+ 134:Src/system_stm32f4xx.c ****                variable is updated automatically.
+ 135:Src/system_stm32f4xx.c ****   */
+ 136:Src/system_stm32f4xx.c **** uint32_t SystemCoreClock = 16000000;
+ 137:Src/system_stm32f4xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+ 138:Src/system_stm32f4xx.c **** const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+ 139:Src/system_stm32f4xx.c **** /**
+ 140:Src/system_stm32f4xx.c ****   * @}
+ 141:Src/system_stm32f4xx.c ****   */
+ 142:Src/system_stm32f4xx.c **** 
+ 143:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+ 144:Src/system_stm32f4xx.c ****   * @{
+ARM GAS  /tmp/cc8x624m.s 			page 4
+
+
+ 145:Src/system_stm32f4xx.c ****   */
+ 146:Src/system_stm32f4xx.c **** 
+ 147:Src/system_stm32f4xx.c **** #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ 148:Src/system_stm32f4xx.c ****   static void SystemInit_ExtMemCtl(void); 
+ 149:Src/system_stm32f4xx.c **** #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+ 150:Src/system_stm32f4xx.c **** 
+ 151:Src/system_stm32f4xx.c **** /**
+ 152:Src/system_stm32f4xx.c ****   * @}
+ 153:Src/system_stm32f4xx.c ****   */
+ 154:Src/system_stm32f4xx.c **** 
+ 155:Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Functions
+ 156:Src/system_stm32f4xx.c ****   * @{
+ 157:Src/system_stm32f4xx.c ****   */
+ 158:Src/system_stm32f4xx.c **** 
+ 159:Src/system_stm32f4xx.c **** /**
+ 160:Src/system_stm32f4xx.c ****   * @brief  Setup the microcontroller system
+ 161:Src/system_stm32f4xx.c ****   *         Initialize the FPU setting, vector table location and External memory 
+ 162:Src/system_stm32f4xx.c ****   *         configuration.
+ 163:Src/system_stm32f4xx.c ****   * @param  None
+ 164:Src/system_stm32f4xx.c ****   * @retval None
+ 165:Src/system_stm32f4xx.c ****   */
+ 166:Src/system_stm32f4xx.c **** void SystemInit(void)
+ 167:Src/system_stm32f4xx.c **** {
+  29              		.loc 1 167 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 0
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+ 168:Src/system_stm32f4xx.c ****   /* FPU settings ------------------------------------------------------------*/
+ 169:Src/system_stm32f4xx.c ****   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ 170:Src/system_stm32f4xx.c ****     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  34              		.loc 1 170 5 view .LVU1
+  35              		.loc 1 170 16 is_stmt 0 view .LVU2
+  36 0000 0F49     		ldr	r1, .L2
+  37 0002 D1F88830 		ldr	r3, [r1, #136]
+  38 0006 43F47003 		orr	r3, r3, #15728640
+  39 000a C1F88830 		str	r3, [r1, #136]
+ 171:Src/system_stm32f4xx.c ****   #endif
+ 172:Src/system_stm32f4xx.c ****   /* Reset the RCC clock configuration to the default reset state ------------*/
+ 173:Src/system_stm32f4xx.c ****   /* Set HSION bit */
+ 174:Src/system_stm32f4xx.c ****   RCC->CR |= (uint32_t)0x00000001;
+  40              		.loc 1 174 3 is_stmt 1 view .LVU3
+  41              		.loc 1 174 11 is_stmt 0 view .LVU4
+  42 000e 0D4B     		ldr	r3, .L2+4
+  43 0010 1A68     		ldr	r2, [r3]
+  44 0012 42F00102 		orr	r2, r2, #1
+  45 0016 1A60     		str	r2, [r3]
+ 175:Src/system_stm32f4xx.c **** 
+ 176:Src/system_stm32f4xx.c ****   /* Reset CFGR register */
+ 177:Src/system_stm32f4xx.c ****   RCC->CFGR = 0x00000000;
+  46              		.loc 1 177 3 is_stmt 1 view .LVU5
+  47              		.loc 1 177 13 is_stmt 0 view .LVU6
+  48 0018 0020     		movs	r0, #0
+  49 001a 9860     		str	r0, [r3, #8]
+ 178:Src/system_stm32f4xx.c **** 
+ 179:Src/system_stm32f4xx.c ****   /* Reset HSEON, CSSON and PLLON bits */
+ 180:Src/system_stm32f4xx.c ****   RCC->CR &= (uint32_t)0xFEF6FFFF;
+ARM GAS  /tmp/cc8x624m.s 			page 5
+
+
+  50              		.loc 1 180 3 is_stmt 1 view .LVU7
+  51              		.loc 1 180 11 is_stmt 0 view .LVU8
+  52 001c 1A68     		ldr	r2, [r3]
+  53 001e 22F08472 		bic	r2, r2, #17301504
+  54 0022 22F48032 		bic	r2, r2, #65536
+  55 0026 1A60     		str	r2, [r3]
+ 181:Src/system_stm32f4xx.c **** 
+ 182:Src/system_stm32f4xx.c ****   /* Reset PLLCFGR register */
+ 183:Src/system_stm32f4xx.c ****   RCC->PLLCFGR = 0x24003010;
+  56              		.loc 1 183 3 is_stmt 1 view .LVU9
+  57              		.loc 1 183 16 is_stmt 0 view .LVU10
+  58 0028 074A     		ldr	r2, .L2+8
+  59 002a 5A60     		str	r2, [r3, #4]
+ 184:Src/system_stm32f4xx.c **** 
+ 185:Src/system_stm32f4xx.c ****   /* Reset HSEBYP bit */
+ 186:Src/system_stm32f4xx.c ****   RCC->CR &= (uint32_t)0xFFFBFFFF;
+  60              		.loc 1 186 3 is_stmt 1 view .LVU11
+  61              		.loc 1 186 11 is_stmt 0 view .LVU12
+  62 002c 1A68     		ldr	r2, [r3]
+  63 002e 22F48022 		bic	r2, r2, #262144
+  64 0032 1A60     		str	r2, [r3]
+ 187:Src/system_stm32f4xx.c **** 
+ 188:Src/system_stm32f4xx.c ****   /* Disable all interrupts */
+ 189:Src/system_stm32f4xx.c ****   RCC->CIR = 0x00000000;
+  65              		.loc 1 189 3 is_stmt 1 view .LVU13
+  66              		.loc 1 189 12 is_stmt 0 view .LVU14
+  67 0034 D860     		str	r0, [r3, #12]
+ 190:Src/system_stm32f4xx.c **** 
+ 191:Src/system_stm32f4xx.c **** #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ 192:Src/system_stm32f4xx.c ****   SystemInit_ExtMemCtl(); 
+ 193:Src/system_stm32f4xx.c **** #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+ 194:Src/system_stm32f4xx.c **** 
+ 195:Src/system_stm32f4xx.c ****   /* Configure the Vector Table location add offset address ------------------*/
+ 196:Src/system_stm32f4xx.c **** #ifdef VECT_TAB_SRAM
+ 197:Src/system_stm32f4xx.c ****   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+ 198:Src/system_stm32f4xx.c **** #else
+ 199:Src/system_stm32f4xx.c ****   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+  68              		.loc 1 199 3 is_stmt 1 view .LVU15
+  69              		.loc 1 199 13 is_stmt 0 view .LVU16
+  70 0036 4FF00063 		mov	r3, #134217728
+  71 003a 8B60     		str	r3, [r1, #8]
+ 200:Src/system_stm32f4xx.c **** #endif
+ 201:Src/system_stm32f4xx.c **** }
+  72              		.loc 1 201 1 view .LVU17
+  73 003c 7047     		bx	lr
+  74              	.L3:
+  75 003e 00BF     		.align	2
+  76              	.L2:
+  77 0040 00ED00E0 		.word	-536810240
+  78 0044 00380240 		.word	1073887232
+  79 0048 10300024 		.word	603992080
+  80              		.cfi_endproc
+  81              	.LFE130:
+  83              		.section	.text.SystemCoreClockUpdate,"ax",%progbits
+  84              		.align	1
+  85              		.global	SystemCoreClockUpdate
+  86              		.syntax unified
+ARM GAS  /tmp/cc8x624m.s 			page 6
+
+
+  87              		.thumb
+  88              		.thumb_func
+  90              	SystemCoreClockUpdate:
+  91              	.LFB131:
+ 202:Src/system_stm32f4xx.c **** 
+ 203:Src/system_stm32f4xx.c **** /**
+ 204:Src/system_stm32f4xx.c ****    * @brief  Update SystemCoreClock variable according to Clock Register Values.
+ 205:Src/system_stm32f4xx.c ****   *         The SystemCoreClock variable contains the core clock (HCLK), it can
+ 206:Src/system_stm32f4xx.c ****   *         be used by the user application to setup the SysTick timer or configure
+ 207:Src/system_stm32f4xx.c ****   *         other parameters.
+ 208:Src/system_stm32f4xx.c ****   *           
+ 209:Src/system_stm32f4xx.c ****   * @note   Each time the core clock (HCLK) changes, this function must be called
+ 210:Src/system_stm32f4xx.c ****   *         to update SystemCoreClock variable value. Otherwise, any configuration
+ 211:Src/system_stm32f4xx.c ****   *         based on this variable will be incorrect.         
+ 212:Src/system_stm32f4xx.c ****   *     
+ 213:Src/system_stm32f4xx.c ****   * @note   - The system frequency computed by this function is not the real 
+ 214:Src/system_stm32f4xx.c ****   *           frequency in the chip. It is calculated based on the predefined 
+ 215:Src/system_stm32f4xx.c ****   *           constant and the selected clock source:
+ 216:Src/system_stm32f4xx.c ****   *             
+ 217:Src/system_stm32f4xx.c ****   *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ 218:Src/system_stm32f4xx.c ****   *                                              
+ 219:Src/system_stm32f4xx.c ****   *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ 220:Src/system_stm32f4xx.c ****   *                          
+ 221:Src/system_stm32f4xx.c ****   *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+ 222:Src/system_stm32f4xx.c ****   *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ 223:Src/system_stm32f4xx.c ****   *         
+ 224:Src/system_stm32f4xx.c ****   *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+ 225:Src/system_stm32f4xx.c ****   *             16 MHz) but the real value may vary depending on the variations
+ 226:Src/system_stm32f4xx.c ****   *             in voltage and temperature.   
+ 227:Src/system_stm32f4xx.c ****   *    
+ 228:Src/system_stm32f4xx.c ****   *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+ 229:Src/system_stm32f4xx.c ****   *              depends on the application requirements), user has to ensure that HSE_VALUE
+ 230:Src/system_stm32f4xx.c ****   *              is same as the real frequency of the crystal used. Otherwise, this function
+ 231:Src/system_stm32f4xx.c ****   *              may have wrong result.
+ 232:Src/system_stm32f4xx.c ****   *                
+ 233:Src/system_stm32f4xx.c ****   *         - The result of this function could be not correct when using fractional
+ 234:Src/system_stm32f4xx.c ****   *           value for HSE crystal.
+ 235:Src/system_stm32f4xx.c ****   *     
+ 236:Src/system_stm32f4xx.c ****   * @param  None
+ 237:Src/system_stm32f4xx.c ****   * @retval None
+ 238:Src/system_stm32f4xx.c ****   */
+ 239:Src/system_stm32f4xx.c **** void SystemCoreClockUpdate(void)
+ 240:Src/system_stm32f4xx.c **** {
+  92              		.loc 1 240 1 is_stmt 1 view -0
+  93              		.cfi_startproc
+  94              		@ args = 0, pretend = 0, frame = 0
+  95              		@ frame_needed = 0, uses_anonymous_args = 0
+  96              		@ link register save eliminated.
+ 241:Src/system_stm32f4xx.c ****   uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  97              		.loc 1 241 3 view .LVU19
+  98              	.LVL0:
+ 242:Src/system_stm32f4xx.c ****   
+ 243:Src/system_stm32f4xx.c ****   /* Get SYSCLK source -------------------------------------------------------*/
+ 244:Src/system_stm32f4xx.c ****   tmp = RCC->CFGR & RCC_CFGR_SWS;
+  99              		.loc 1 244 3 view .LVU20
+ 100              		.loc 1 244 12 is_stmt 0 view .LVU21
+ 101 0000 224B     		ldr	r3, .L12
+ARM GAS  /tmp/cc8x624m.s 			page 7
+
+
+ 102 0002 9B68     		ldr	r3, [r3, #8]
+ 103              		.loc 1 244 7 view .LVU22
+ 104 0004 03F00C03 		and	r3, r3, #12
+ 105              	.LVL1:
+ 245:Src/system_stm32f4xx.c **** 
+ 246:Src/system_stm32f4xx.c ****   switch (tmp)
+ 106              		.loc 1 246 3 is_stmt 1 view .LVU23
+ 107 0008 042B     		cmp	r3, #4
+ 108 000a 14D0     		beq	.L5
+ 109 000c 082B     		cmp	r3, #8
+ 110 000e 16D0     		beq	.L6
+ 111 0010 1BB1     		cbz	r3, .L11
+ 247:Src/system_stm32f4xx.c ****   {
+ 248:Src/system_stm32f4xx.c ****     case 0x00:  /* HSI used as system clock source */
+ 249:Src/system_stm32f4xx.c ****       SystemCoreClock = HSI_VALUE;
+ 250:Src/system_stm32f4xx.c ****       break;
+ 251:Src/system_stm32f4xx.c ****     case 0x04:  /* HSE used as system clock source */
+ 252:Src/system_stm32f4xx.c ****       SystemCoreClock = HSE_VALUE;
+ 253:Src/system_stm32f4xx.c ****       break;
+ 254:Src/system_stm32f4xx.c ****     case 0x08:  /* PLL used as system clock source */
+ 255:Src/system_stm32f4xx.c **** 
+ 256:Src/system_stm32f4xx.c ****       /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+ 257:Src/system_stm32f4xx.c ****          SYSCLK = PLL_VCO / PLL_P
+ 258:Src/system_stm32f4xx.c ****          */    
+ 259:Src/system_stm32f4xx.c ****       pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+ 260:Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 261:Src/system_stm32f4xx.c ****       
+ 262:Src/system_stm32f4xx.c ****       if (pllsource != 0)
+ 263:Src/system_stm32f4xx.c ****       {
+ 264:Src/system_stm32f4xx.c ****         /* HSE used as PLL clock source */
+ 265:Src/system_stm32f4xx.c ****         pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ 266:Src/system_stm32f4xx.c ****       }
+ 267:Src/system_stm32f4xx.c ****       else
+ 268:Src/system_stm32f4xx.c ****       {
+ 269:Src/system_stm32f4xx.c ****         /* HSI used as PLL clock source */
+ 270:Src/system_stm32f4xx.c ****         pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ 271:Src/system_stm32f4xx.c ****       }
+ 272:Src/system_stm32f4xx.c **** 
+ 273:Src/system_stm32f4xx.c ****       pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+ 274:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 275:Src/system_stm32f4xx.c ****       break;
+ 276:Src/system_stm32f4xx.c ****     default:
+ 277:Src/system_stm32f4xx.c ****       SystemCoreClock = HSI_VALUE;
+ 112              		.loc 1 277 7 view .LVU24
+ 113              		.loc 1 277 23 is_stmt 0 view .LVU25
+ 114 0012 1F4B     		ldr	r3, .L12+4
+ 115              	.LVL2:
+ 116              		.loc 1 277 23 view .LVU26
+ 117 0014 1F4A     		ldr	r2, .L12+8
+ 118 0016 1A60     		str	r2, [r3]
+ 278:Src/system_stm32f4xx.c ****       break;
+ 119              		.loc 1 278 7 is_stmt 1 view .LVU27
+ 120 0018 02E0     		b	.L8
+ 121              	.LVL3:
+ 122              	.L11:
+ 249:Src/system_stm32f4xx.c ****       break;
+ 123              		.loc 1 249 7 view .LVU28
+ARM GAS  /tmp/cc8x624m.s 			page 8
+
+
+ 249:Src/system_stm32f4xx.c ****       break;
+ 124              		.loc 1 249 23 is_stmt 0 view .LVU29
+ 125 001a 1D4B     		ldr	r3, .L12+4
+ 126              	.LVL4:
+ 249:Src/system_stm32f4xx.c ****       break;
+ 127              		.loc 1 249 23 view .LVU30
+ 128 001c 1D4A     		ldr	r2, .L12+8
+ 129 001e 1A60     		str	r2, [r3]
+ 250:Src/system_stm32f4xx.c ****     case 0x04:  /* HSE used as system clock source */
+ 130              		.loc 1 250 7 is_stmt 1 view .LVU31
+ 131              	.LVL5:
+ 132              	.L8:
+ 279:Src/system_stm32f4xx.c ****   }
+ 280:Src/system_stm32f4xx.c ****   /* Compute HCLK frequency --------------------------------------------------*/
+ 281:Src/system_stm32f4xx.c ****   /* Get HCLK prescaler */
+ 282:Src/system_stm32f4xx.c ****   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ 133              		.loc 1 282 3 view .LVU32
+ 134              		.loc 1 282 28 is_stmt 0 view .LVU33
+ 135 0020 1A4B     		ldr	r3, .L12
+ 136 0022 9B68     		ldr	r3, [r3, #8]
+ 137              		.loc 1 282 52 view .LVU34
+ 138 0024 C3F30313 		ubfx	r3, r3, #4, #4
+ 139              		.loc 1 282 22 view .LVU35
+ 140 0028 1B4A     		ldr	r2, .L12+12
+ 141 002a D15C     		ldrb	r1, [r2, r3]	@ zero_extendqisi2
+ 142              	.LVL6:
+ 283:Src/system_stm32f4xx.c ****   /* HCLK frequency */
+ 284:Src/system_stm32f4xx.c ****   SystemCoreClock >>= tmp;
+ 143              		.loc 1 284 3 is_stmt 1 view .LVU36
+ 144              		.loc 1 284 19 is_stmt 0 view .LVU37
+ 145 002c 184A     		ldr	r2, .L12+4
+ 146 002e 1368     		ldr	r3, [r2]
+ 147 0030 CB40     		lsrs	r3, r3, r1
+ 148 0032 1360     		str	r3, [r2]
+ 285:Src/system_stm32f4xx.c **** }
+ 149              		.loc 1 285 1 view .LVU38
+ 150 0034 7047     		bx	lr
+ 151              	.LVL7:
+ 152              	.L5:
+ 252:Src/system_stm32f4xx.c ****       break;
+ 153              		.loc 1 252 7 is_stmt 1 view .LVU39
+ 252:Src/system_stm32f4xx.c ****       break;
+ 154              		.loc 1 252 23 is_stmt 0 view .LVU40
+ 155 0036 164B     		ldr	r3, .L12+4
+ 156              	.LVL8:
+ 252:Src/system_stm32f4xx.c ****       break;
+ 157              		.loc 1 252 23 view .LVU41
+ 158 0038 184A     		ldr	r2, .L12+16
+ 159 003a 1A60     		str	r2, [r3]
+ 253:Src/system_stm32f4xx.c ****     case 0x08:  /* PLL used as system clock source */
+ 160              		.loc 1 253 7 is_stmt 1 view .LVU42
+ 161 003c F0E7     		b	.L8
+ 162              	.LVL9:
+ 163              	.L6:
+ 259:Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 164              		.loc 1 259 7 view .LVU43
+ 259:Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ARM GAS  /tmp/cc8x624m.s 			page 9
+
+
+ 165              		.loc 1 259 23 is_stmt 0 view .LVU44
+ 166 003e 134B     		ldr	r3, .L12
+ 167              	.LVL10:
+ 259:Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 168              		.loc 1 259 23 view .LVU45
+ 169 0040 5968     		ldr	r1, [r3, #4]
+ 170              	.LVL11:
+ 260:Src/system_stm32f4xx.c ****       
+ 171              		.loc 1 260 7 is_stmt 1 view .LVU46
+ 260:Src/system_stm32f4xx.c ****       
+ 172              		.loc 1 260 17 is_stmt 0 view .LVU47
+ 173 0042 5A68     		ldr	r2, [r3, #4]
+ 260:Src/system_stm32f4xx.c ****       
+ 174              		.loc 1 260 12 view .LVU48
+ 175 0044 02F03F02 		and	r2, r2, #63
+ 176              	.LVL12:
+ 262:Src/system_stm32f4xx.c ****       {
+ 177              		.loc 1 262 7 is_stmt 1 view .LVU49
+ 262:Src/system_stm32f4xx.c ****       {
+ 178              		.loc 1 262 10 is_stmt 0 view .LVU50
+ 179 0048 11F4800F 		tst	r1, #4194304
+ 180 004c 13D0     		beq	.L9
+ 265:Src/system_stm32f4xx.c ****       }
+ 181              		.loc 1 265 9 is_stmt 1 view .LVU51
+ 265:Src/system_stm32f4xx.c ****       }
+ 182              		.loc 1 265 29 is_stmt 0 view .LVU52
+ 183 004e 134B     		ldr	r3, .L12+16
+ 184 0050 B3FBF2F3 		udiv	r3, r3, r2
+ 265:Src/system_stm32f4xx.c ****       }
+ 185              		.loc 1 265 44 view .LVU53
+ 186 0054 0D4A     		ldr	r2, .L12
+ 187              	.LVL13:
+ 265:Src/system_stm32f4xx.c ****       }
+ 188              		.loc 1 265 44 view .LVU54
+ 189 0056 5268     		ldr	r2, [r2, #4]
+ 265:Src/system_stm32f4xx.c ****       }
+ 190              		.loc 1 265 74 view .LVU55
+ 191 0058 C2F38812 		ubfx	r2, r2, #6, #9
+ 265:Src/system_stm32f4xx.c ****       }
+ 192              		.loc 1 265 16 view .LVU56
+ 193 005c 02FB03F3 		mul	r3, r2, r3
+ 194              	.LVL14:
+ 195              	.L10:
+ 273:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 196              		.loc 1 273 7 is_stmt 1 view .LVU57
+ 273:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 197              		.loc 1 273 20 is_stmt 0 view .LVU58
+ 198 0060 0A4A     		ldr	r2, .L12
+ 199 0062 5268     		ldr	r2, [r2, #4]
+ 273:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 200              		.loc 1 273 50 view .LVU59
+ 201 0064 C2F30142 		ubfx	r2, r2, #16, #2
+ 273:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 202              		.loc 1 273 56 view .LVU60
+ 203 0068 0132     		adds	r2, r2, #1
+ 273:Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 204              		.loc 1 273 12 view .LVU61
+ARM GAS  /tmp/cc8x624m.s 			page 10
+
+
+ 205 006a 5200     		lsls	r2, r2, #1
+ 206              	.LVL15:
+ 274:Src/system_stm32f4xx.c ****       break;
+ 207              		.loc 1 274 7 is_stmt 1 view .LVU62
+ 274:Src/system_stm32f4xx.c ****       break;
+ 208              		.loc 1 274 31 is_stmt 0 view .LVU63
+ 209 006c B3FBF2F3 		udiv	r3, r3, r2
+ 210              	.LVL16:
+ 274:Src/system_stm32f4xx.c ****       break;
+ 211              		.loc 1 274 23 view .LVU64
+ 212 0070 074A     		ldr	r2, .L12+4
+ 213              	.LVL17:
+ 274:Src/system_stm32f4xx.c ****       break;
+ 214              		.loc 1 274 23 view .LVU65
+ 215 0072 1360     		str	r3, [r2]
+ 275:Src/system_stm32f4xx.c ****     default:
+ 216              		.loc 1 275 7 is_stmt 1 view .LVU66
+ 217 0074 D4E7     		b	.L8
+ 218              	.LVL18:
+ 219              	.L9:
+ 270:Src/system_stm32f4xx.c ****       }
+ 220              		.loc 1 270 9 view .LVU67
+ 270:Src/system_stm32f4xx.c ****       }
+ 221              		.loc 1 270 29 is_stmt 0 view .LVU68
+ 222 0076 074B     		ldr	r3, .L12+8
+ 223 0078 B3FBF2F3 		udiv	r3, r3, r2
+ 270:Src/system_stm32f4xx.c ****       }
+ 224              		.loc 1 270 44 view .LVU69
+ 225 007c 034A     		ldr	r2, .L12
+ 226              	.LVL19:
+ 270:Src/system_stm32f4xx.c ****       }
+ 227              		.loc 1 270 44 view .LVU70
+ 228 007e 5268     		ldr	r2, [r2, #4]
+ 270:Src/system_stm32f4xx.c ****       }
+ 229              		.loc 1 270 74 view .LVU71
+ 230 0080 C2F38812 		ubfx	r2, r2, #6, #9
+ 270:Src/system_stm32f4xx.c ****       }
+ 231              		.loc 1 270 16 view .LVU72
+ 232 0084 02FB03F3 		mul	r3, r2, r3
+ 233              	.LVL20:
+ 270:Src/system_stm32f4xx.c ****       }
+ 234              		.loc 1 270 16 view .LVU73
+ 235 0088 EAE7     		b	.L10
+ 236              	.L13:
+ 237 008a 00BF     		.align	2
+ 238              	.L12:
+ 239 008c 00380240 		.word	1073887232
+ 240 0090 00000000 		.word	.LANCHOR0
+ 241 0094 0024F400 		.word	16000000
+ 242 0098 00000000 		.word	.LANCHOR1
+ 243 009c 40787D01 		.word	25000000
+ 244              		.cfi_endproc
+ 245              	.LFE131:
+ 247              		.global	APBPrescTable
+ 248              		.global	AHBPrescTable
+ 249              		.global	SystemCoreClock
+ 250              		.section	.data.SystemCoreClock,"aw"
+ARM GAS  /tmp/cc8x624m.s 			page 11
+
+
+ 251              		.align	2
+ 252              		.set	.LANCHOR0,. + 0
+ 255              	SystemCoreClock:
+ 256 0000 0024F400 		.word	16000000
+ 257              		.section	.rodata.AHBPrescTable,"a"
+ 258              		.align	2
+ 259              		.set	.LANCHOR1,. + 0
+ 262              	AHBPrescTable:
+ 263 0000 00000000 		.ascii	"\000\000\000\000\000\000\000\000\001\002\003\004\006"
+ 263      00000000 
+ 263      01020304 
+ 263      06
+ 264 000d 070809   		.ascii	"\007\010\011"
+ 265              		.section	.rodata.APBPrescTable,"a"
+ 266              		.align	2
+ 269              	APBPrescTable:
+ 270 0000 00000000 		.ascii	"\000\000\000\000\001\002\003\004"
+ 270      01020304 
+ 271              		.text
+ 272              	.Letext0:
+ 273              		.file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 274              		.file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
+ 275              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
+ 276              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
+ 277              		.file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
+ARM GAS  /tmp/cc8x624m.s 			page 12
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 system_stm32f4xx.c
+     /tmp/cc8x624m.s:20     .text.SystemInit:0000000000000000 $t
+     /tmp/cc8x624m.s:26     .text.SystemInit:0000000000000000 SystemInit
+     /tmp/cc8x624m.s:77     .text.SystemInit:0000000000000040 $d
+     /tmp/cc8x624m.s:84     .text.SystemCoreClockUpdate:0000000000000000 $t
+     /tmp/cc8x624m.s:90     .text.SystemCoreClockUpdate:0000000000000000 SystemCoreClockUpdate
+     /tmp/cc8x624m.s:239    .text.SystemCoreClockUpdate:000000000000008c $d
+     /tmp/cc8x624m.s:269    .rodata.APBPrescTable:0000000000000000 APBPrescTable
+     /tmp/cc8x624m.s:262    .rodata.AHBPrescTable:0000000000000000 AHBPrescTable
+     /tmp/cc8x624m.s:255    .data.SystemCoreClock:0000000000000000 SystemCoreClock
+     /tmp/cc8x624m.s:251    .data.SystemCoreClock:0000000000000000 $d
+     /tmp/cc8x624m.s:258    .rodata.AHBPrescTable:0000000000000000 $d
+     /tmp/cc8x624m.s:266    .rodata.APBPrescTable:0000000000000000 $d
+
+NO UNDEFINED SYMBOLS

app/main/CTO20220622/build/usart.d

@@ -0,0 +1,57 @@
+build/usart.o: Src/usart.c Inc/usart.h Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Inc/usart.h:
+Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h: