stm32f4xx_it.lst 27 KB

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  1. ARM GAS /tmp/cc9QsDpS.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 1
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "stm32f4xx_it.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.NMI_Handler,"ax",%progbits
  21. 20 .align 1
  22. 21 .global NMI_Handler
  23. 22 .syntax unified
  24. 23 .thumb
  25. 24 .thumb_func
  26. 26 NMI_Handler:
  27. 27 .LFB130:
  28. 28 .file 1 "Src/stm32f4xx_it.c"
  29. 1:Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
  30. 2:Src/stm32f4xx_it.c **** /**
  31. 3:Src/stm32f4xx_it.c **** ******************************************************************************
  32. 4:Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c
  33. 5:Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines.
  34. 6:Src/stm32f4xx_it.c **** ******************************************************************************
  35. 7:Src/stm32f4xx_it.c **** * @attention
  36. 8:Src/stm32f4xx_it.c **** *
  37. 9:Src/stm32f4xx_it.c **** * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  38. 10:Src/stm32f4xx_it.c **** * All rights reserved.</center></h2>
  39. 11:Src/stm32f4xx_it.c **** *
  40. 12:Src/stm32f4xx_it.c **** * This software component is licensed by ST under Ultimate Liberty license
  41. 13:Src/stm32f4xx_it.c **** * SLA0044, the "License"; You may not use this file except in compliance with
  42. 14:Src/stm32f4xx_it.c **** * the License. You may obtain a copy of the License at:
  43. 15:Src/stm32f4xx_it.c **** * www.st.com/SLA0044
  44. 16:Src/stm32f4xx_it.c **** *
  45. 17:Src/stm32f4xx_it.c **** ******************************************************************************
  46. 18:Src/stm32f4xx_it.c **** */
  47. 19:Src/stm32f4xx_it.c **** /* USER CODE END Header */
  48. 20:Src/stm32f4xx_it.c ****
  49. 21:Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
  50. 22:Src/stm32f4xx_it.c **** #include "main.h"
  51. 23:Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
  52. 24:Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
  53. 25:Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
  54. 26:Src/stm32f4xx_it.c **** /* USER CODE END Includes */
  55. 27:Src/stm32f4xx_it.c ****
  56. 28:Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
  57. 29:Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
  58. 30:Src/stm32f4xx_it.c ****
  59. ARM GAS /tmp/cc9QsDpS.s page 2
  60. 31:Src/stm32f4xx_it.c **** /* USER CODE END TD */
  61. 32:Src/stm32f4xx_it.c ****
  62. 33:Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
  63. 34:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
  64. 35:Src/stm32f4xx_it.c ****
  65. 36:Src/stm32f4xx_it.c **** /* USER CODE END PD */
  66. 37:Src/stm32f4xx_it.c ****
  67. 38:Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
  68. 39:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
  69. 40:Src/stm32f4xx_it.c ****
  70. 41:Src/stm32f4xx_it.c **** /* USER CODE END PM */
  71. 42:Src/stm32f4xx_it.c ****
  72. 43:Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
  73. 44:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
  74. 45:Src/stm32f4xx_it.c ****
  75. 46:Src/stm32f4xx_it.c **** /* USER CODE END PV */
  76. 47:Src/stm32f4xx_it.c ****
  77. 48:Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
  78. 49:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
  79. 50:Src/stm32f4xx_it.c ****
  80. 51:Src/stm32f4xx_it.c **** /* USER CODE END PFP */
  81. 52:Src/stm32f4xx_it.c ****
  82. 53:Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
  83. 54:Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
  84. 55:Src/stm32f4xx_it.c ****
  85. 56:Src/stm32f4xx_it.c **** /* USER CODE END 0 */
  86. 57:Src/stm32f4xx_it.c ****
  87. 58:Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
  88. 59:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart4;
  89. 60:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart1;
  90. 61:Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart2;
  91. 62:Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
  92. 63:Src/stm32f4xx_it.c ****
  93. 64:Src/stm32f4xx_it.c **** /* USER CODE END EV */
  94. 65:Src/stm32f4xx_it.c ****
  95. 66:Src/stm32f4xx_it.c **** /******************************************************************************/
  96. 67:Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
  97. 68:Src/stm32f4xx_it.c **** /******************************************************************************/
  98. 69:Src/stm32f4xx_it.c **** /**
  99. 70:Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt.
  100. 71:Src/stm32f4xx_it.c **** */
  101. 72:Src/stm32f4xx_it.c **** void NMI_Handler(void)
  102. 73:Src/stm32f4xx_it.c **** {
  103. 29 .loc 1 73 1 view -0
  104. 30 .cfi_startproc
  105. 31 @ args = 0, pretend = 0, frame = 0
  106. 32 @ frame_needed = 0, uses_anonymous_args = 0
  107. 33 @ link register save eliminated.
  108. 74:Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  109. 75:Src/stm32f4xx_it.c ****
  110. 76:Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
  111. 77:Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  112. 78:Src/stm32f4xx_it.c ****
  113. 79:Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
  114. 80:Src/stm32f4xx_it.c **** }
  115. 34 .loc 1 80 1 view .LVU1
  116. 35 0000 7047 bx lr
  117. ARM GAS /tmp/cc9QsDpS.s page 3
  118. 36 .cfi_endproc
  119. 37 .LFE130:
  120. 39 .section .text.HardFault_Handler,"ax",%progbits
  121. 40 .align 1
  122. 41 .global HardFault_Handler
  123. 42 .syntax unified
  124. 43 .thumb
  125. 44 .thumb_func
  126. 46 HardFault_Handler:
  127. 47 .LFB131:
  128. 81:Src/stm32f4xx_it.c ****
  129. 82:Src/stm32f4xx_it.c **** /**
  130. 83:Src/stm32f4xx_it.c **** * @brief This function handles Hard fault interrupt.
  131. 84:Src/stm32f4xx_it.c **** */
  132. 85:Src/stm32f4xx_it.c **** void HardFault_Handler(void)
  133. 86:Src/stm32f4xx_it.c **** {
  134. 48 .loc 1 86 1 view -0
  135. 49 .cfi_startproc
  136. 50 @ Volatile: function does not return.
  137. 51 @ args = 0, pretend = 0, frame = 0
  138. 52 @ frame_needed = 0, uses_anonymous_args = 0
  139. 53 @ link register save eliminated.
  140. 54 .L3:
  141. 87:Src/stm32f4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
  142. 88:Src/stm32f4xx_it.c ****
  143. 89:Src/stm32f4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
  144. 90:Src/stm32f4xx_it.c **** while (1)
  145. 55 .loc 1 90 3 discriminator 1 view .LVU3
  146. 91:Src/stm32f4xx_it.c **** {
  147. 92:Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  148. 93:Src/stm32f4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
  149. 94:Src/stm32f4xx_it.c **** }
  150. 56 .loc 1 94 3 discriminator 1 view .LVU4
  151. 90:Src/stm32f4xx_it.c **** {
  152. 57 .loc 1 90 9 discriminator 1 view .LVU5
  153. 58 0000 FEE7 b .L3
  154. 59 .cfi_endproc
  155. 60 .LFE131:
  156. 62 .section .text.MemManage_Handler,"ax",%progbits
  157. 63 .align 1
  158. 64 .global MemManage_Handler
  159. 65 .syntax unified
  160. 66 .thumb
  161. 67 .thumb_func
  162. 69 MemManage_Handler:
  163. 70 .LFB132:
  164. 95:Src/stm32f4xx_it.c **** }
  165. 96:Src/stm32f4xx_it.c ****
  166. 97:Src/stm32f4xx_it.c **** /**
  167. 98:Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault.
  168. 99:Src/stm32f4xx_it.c **** */
  169. 100:Src/stm32f4xx_it.c **** void MemManage_Handler(void)
  170. 101:Src/stm32f4xx_it.c **** {
  171. 71 .loc 1 101 1 view -0
  172. 72 .cfi_startproc
  173. 73 @ Volatile: function does not return.
  174. 74 @ args = 0, pretend = 0, frame = 0
  175. ARM GAS /tmp/cc9QsDpS.s page 4
  176. 75 @ frame_needed = 0, uses_anonymous_args = 0
  177. 76 @ link register save eliminated.
  178. 77 .L5:
  179. 102:Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  180. 103:Src/stm32f4xx_it.c ****
  181. 104:Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
  182. 105:Src/stm32f4xx_it.c **** while (1)
  183. 78 .loc 1 105 3 discriminator 1 view .LVU7
  184. 106:Src/stm32f4xx_it.c **** {
  185. 107:Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  186. 108:Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
  187. 109:Src/stm32f4xx_it.c **** }
  188. 79 .loc 1 109 3 discriminator 1 view .LVU8
  189. 105:Src/stm32f4xx_it.c **** {
  190. 80 .loc 1 105 9 discriminator 1 view .LVU9
  191. 81 0000 FEE7 b .L5
  192. 82 .cfi_endproc
  193. 83 .LFE132:
  194. 85 .section .text.BusFault_Handler,"ax",%progbits
  195. 86 .align 1
  196. 87 .global BusFault_Handler
  197. 88 .syntax unified
  198. 89 .thumb
  199. 90 .thumb_func
  200. 92 BusFault_Handler:
  201. 93 .LFB133:
  202. 110:Src/stm32f4xx_it.c **** }
  203. 111:Src/stm32f4xx_it.c ****
  204. 112:Src/stm32f4xx_it.c **** /**
  205. 113:Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
  206. 114:Src/stm32f4xx_it.c **** */
  207. 115:Src/stm32f4xx_it.c **** void BusFault_Handler(void)
  208. 116:Src/stm32f4xx_it.c **** {
  209. 94 .loc 1 116 1 view -0
  210. 95 .cfi_startproc
  211. 96 @ Volatile: function does not return.
  212. 97 @ args = 0, pretend = 0, frame = 0
  213. 98 @ frame_needed = 0, uses_anonymous_args = 0
  214. 99 @ link register save eliminated.
  215. 100 .L7:
  216. 117:Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
  217. 118:Src/stm32f4xx_it.c ****
  218. 119:Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
  219. 120:Src/stm32f4xx_it.c **** while (1)
  220. 101 .loc 1 120 3 discriminator 1 view .LVU11
  221. 121:Src/stm32f4xx_it.c **** {
  222. 122:Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  223. 123:Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
  224. 124:Src/stm32f4xx_it.c **** }
  225. 102 .loc 1 124 3 discriminator 1 view .LVU12
  226. 120:Src/stm32f4xx_it.c **** {
  227. 103 .loc 1 120 9 discriminator 1 view .LVU13
  228. 104 0000 FEE7 b .L7
  229. 105 .cfi_endproc
  230. 106 .LFE133:
  231. 108 .section .text.UsageFault_Handler,"ax",%progbits
  232. 109 .align 1
  233. ARM GAS /tmp/cc9QsDpS.s page 5
  234. 110 .global UsageFault_Handler
  235. 111 .syntax unified
  236. 112 .thumb
  237. 113 .thumb_func
  238. 115 UsageFault_Handler:
  239. 116 .LFB134:
  240. 125:Src/stm32f4xx_it.c **** }
  241. 126:Src/stm32f4xx_it.c ****
  242. 127:Src/stm32f4xx_it.c **** /**
  243. 128:Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
  244. 129:Src/stm32f4xx_it.c **** */
  245. 130:Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
  246. 131:Src/stm32f4xx_it.c **** {
  247. 117 .loc 1 131 1 view -0
  248. 118 .cfi_startproc
  249. 119 @ Volatile: function does not return.
  250. 120 @ args = 0, pretend = 0, frame = 0
  251. 121 @ frame_needed = 0, uses_anonymous_args = 0
  252. 122 @ link register save eliminated.
  253. 123 .L9:
  254. 132:Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
  255. 133:Src/stm32f4xx_it.c ****
  256. 134:Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
  257. 135:Src/stm32f4xx_it.c **** while (1)
  258. 124 .loc 1 135 3 discriminator 1 view .LVU15
  259. 136:Src/stm32f4xx_it.c **** {
  260. 137:Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  261. 138:Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
  262. 139:Src/stm32f4xx_it.c **** }
  263. 125 .loc 1 139 3 discriminator 1 view .LVU16
  264. 135:Src/stm32f4xx_it.c **** {
  265. 126 .loc 1 135 9 discriminator 1 view .LVU17
  266. 127 0000 FEE7 b .L9
  267. 128 .cfi_endproc
  268. 129 .LFE134:
  269. 131 .section .text.SVC_Handler,"ax",%progbits
  270. 132 .align 1
  271. 133 .global SVC_Handler
  272. 134 .syntax unified
  273. 135 .thumb
  274. 136 .thumb_func
  275. 138 SVC_Handler:
  276. 139 .LFB135:
  277. 140:Src/stm32f4xx_it.c **** }
  278. 141:Src/stm32f4xx_it.c ****
  279. 142:Src/stm32f4xx_it.c **** /**
  280. 143:Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction.
  281. 144:Src/stm32f4xx_it.c **** */
  282. 145:Src/stm32f4xx_it.c **** void SVC_Handler(void)
  283. 146:Src/stm32f4xx_it.c **** {
  284. 140 .loc 1 146 1 view -0
  285. 141 .cfi_startproc
  286. 142 @ args = 0, pretend = 0, frame = 0
  287. 143 @ frame_needed = 0, uses_anonymous_args = 0
  288. 144 @ link register save eliminated.
  289. 147:Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
  290. 148:Src/stm32f4xx_it.c ****
  291. ARM GAS /tmp/cc9QsDpS.s page 6
  292. 149:Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
  293. 150:Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
  294. 151:Src/stm32f4xx_it.c ****
  295. 152:Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
  296. 153:Src/stm32f4xx_it.c **** }
  297. 145 .loc 1 153 1 view .LVU19
  298. 146 0000 7047 bx lr
  299. 147 .cfi_endproc
  300. 148 .LFE135:
  301. 150 .section .text.DebugMon_Handler,"ax",%progbits
  302. 151 .align 1
  303. 152 .global DebugMon_Handler
  304. 153 .syntax unified
  305. 154 .thumb
  306. 155 .thumb_func
  307. 157 DebugMon_Handler:
  308. 158 .LFB136:
  309. 154:Src/stm32f4xx_it.c ****
  310. 155:Src/stm32f4xx_it.c **** /**
  311. 156:Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor.
  312. 157:Src/stm32f4xx_it.c **** */
  313. 158:Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
  314. 159:Src/stm32f4xx_it.c **** {
  315. 159 .loc 1 159 1 view -0
  316. 160 .cfi_startproc
  317. 161 @ args = 0, pretend = 0, frame = 0
  318. 162 @ frame_needed = 0, uses_anonymous_args = 0
  319. 163 @ link register save eliminated.
  320. 160:Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  321. 161:Src/stm32f4xx_it.c ****
  322. 162:Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
  323. 163:Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  324. 164:Src/stm32f4xx_it.c ****
  325. 165:Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
  326. 166:Src/stm32f4xx_it.c **** }
  327. 164 .loc 1 166 1 view .LVU21
  328. 165 0000 7047 bx lr
  329. 166 .cfi_endproc
  330. 167 .LFE136:
  331. 169 .section .text.PendSV_Handler,"ax",%progbits
  332. 170 .align 1
  333. 171 .global PendSV_Handler
  334. 172 .syntax unified
  335. 173 .thumb
  336. 174 .thumb_func
  337. 176 PendSV_Handler:
  338. 177 .LFB137:
  339. 167:Src/stm32f4xx_it.c ****
  340. 168:Src/stm32f4xx_it.c **** /**
  341. 169:Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service.
  342. 170:Src/stm32f4xx_it.c **** */
  343. 171:Src/stm32f4xx_it.c **** void PendSV_Handler(void)
  344. 172:Src/stm32f4xx_it.c **** {
  345. 178 .loc 1 172 1 view -0
  346. 179 .cfi_startproc
  347. 180 @ args = 0, pretend = 0, frame = 0
  348. 181 @ frame_needed = 0, uses_anonymous_args = 0
  349. ARM GAS /tmp/cc9QsDpS.s page 7
  350. 182 @ link register save eliminated.
  351. 173:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
  352. 174:Src/stm32f4xx_it.c ****
  353. 175:Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
  354. 176:Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
  355. 177:Src/stm32f4xx_it.c ****
  356. 178:Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
  357. 179:Src/stm32f4xx_it.c **** }
  358. 183 .loc 1 179 1 view .LVU23
  359. 184 0000 7047 bx lr
  360. 185 .cfi_endproc
  361. 186 .LFE137:
  362. 188 .section .text.SysTick_Handler,"ax",%progbits
  363. 189 .align 1
  364. 190 .global SysTick_Handler
  365. 191 .syntax unified
  366. 192 .thumb
  367. 193 .thumb_func
  368. 195 SysTick_Handler:
  369. 196 .LFB138:
  370. 180:Src/stm32f4xx_it.c ****
  371. 181:Src/stm32f4xx_it.c **** /**
  372. 182:Src/stm32f4xx_it.c **** * @brief This function handles System tick timer.
  373. 183:Src/stm32f4xx_it.c **** */
  374. 184:Src/stm32f4xx_it.c **** void SysTick_Handler(void)
  375. 185:Src/stm32f4xx_it.c **** {
  376. 197 .loc 1 185 1 view -0
  377. 198 .cfi_startproc
  378. 199 @ args = 0, pretend = 0, frame = 0
  379. 200 @ frame_needed = 0, uses_anonymous_args = 0
  380. 201 0000 08B5 push {r3, lr}
  381. 202 .LCFI0:
  382. 203 .cfi_def_cfa_offset 8
  383. 204 .cfi_offset 3, -8
  384. 205 .cfi_offset 14, -4
  385. 186:Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
  386. 187:Src/stm32f4xx_it.c ****
  387. 188:Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
  388. 189:Src/stm32f4xx_it.c **** HAL_IncTick();
  389. 206 .loc 1 189 3 view .LVU25
  390. 207 0002 FFF7FEFF bl HAL_IncTick
  391. 208 .LVL0:
  392. 190:Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
  393. 191:Src/stm32f4xx_it.c ****
  394. 192:Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
  395. 193:Src/stm32f4xx_it.c **** }
  396. 209 .loc 1 193 1 is_stmt 0 view .LVU26
  397. 210 0006 08BD pop {r3, pc}
  398. 211 .cfi_endproc
  399. 212 .LFE138:
  400. 214 .section .text.USART1_IRQHandler,"ax",%progbits
  401. 215 .align 1
  402. 216 .global USART1_IRQHandler
  403. 217 .syntax unified
  404. 218 .thumb
  405. 219 .thumb_func
  406. 221 USART1_IRQHandler:
  407. ARM GAS /tmp/cc9QsDpS.s page 8
  408. 222 .LFB139:
  409. 194:Src/stm32f4xx_it.c ****
  410. 195:Src/stm32f4xx_it.c **** /******************************************************************************/
  411. 196:Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */
  412. 197:Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
  413. 198:Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */
  414. 199:Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */
  415. 200:Src/stm32f4xx_it.c **** /******************************************************************************/
  416. 201:Src/stm32f4xx_it.c ****
  417. 202:Src/stm32f4xx_it.c **** /**
  418. 203:Src/stm32f4xx_it.c **** * @brief This function handles USART1 global interrupt.
  419. 204:Src/stm32f4xx_it.c **** */
  420. 205:Src/stm32f4xx_it.c **** void USART1_IRQHandler(void)
  421. 206:Src/stm32f4xx_it.c **** {
  422. 223 .loc 1 206 1 is_stmt 1 view -0
  423. 224 .cfi_startproc
  424. 225 @ args = 0, pretend = 0, frame = 0
  425. 226 @ frame_needed = 0, uses_anonymous_args = 0
  426. 227 0000 08B5 push {r3, lr}
  427. 228 .LCFI1:
  428. 229 .cfi_def_cfa_offset 8
  429. 230 .cfi_offset 3, -8
  430. 231 .cfi_offset 14, -4
  431. 207:Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
  432. 208:Src/stm32f4xx_it.c ****
  433. 209:Src/stm32f4xx_it.c **** /* USER CODE END USART1_IRQn 0 */
  434. 210:Src/stm32f4xx_it.c **** HAL_UART_IRQHandler(&huart1);
  435. 232 .loc 1 210 3 view .LVU28
  436. 233 0002 0248 ldr r0, .L17
  437. 234 0004 FFF7FEFF bl HAL_UART_IRQHandler
  438. 235 .LVL1:
  439. 211:Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
  440. 212:Src/stm32f4xx_it.c ****
  441. 213:Src/stm32f4xx_it.c **** /* USER CODE END USART1_IRQn 1 */
  442. 214:Src/stm32f4xx_it.c **** }
  443. 236 .loc 1 214 1 is_stmt 0 view .LVU29
  444. 237 0008 08BD pop {r3, pc}
  445. 238 .L18:
  446. 239 000a 00BF .align 2
  447. 240 .L17:
  448. 241 000c 00000000 .word huart1
  449. 242 .cfi_endproc
  450. 243 .LFE139:
  451. 245 .section .text.USART2_IRQHandler,"ax",%progbits
  452. 246 .align 1
  453. 247 .global USART2_IRQHandler
  454. 248 .syntax unified
  455. 249 .thumb
  456. 250 .thumb_func
  457. 252 USART2_IRQHandler:
  458. 253 .LFB140:
  459. 215:Src/stm32f4xx_it.c ****
  460. 216:Src/stm32f4xx_it.c **** /**
  461. 217:Src/stm32f4xx_it.c **** * @brief This function handles USART2 global interrupt.
  462. 218:Src/stm32f4xx_it.c **** */
  463. 219:Src/stm32f4xx_it.c **** void USART2_IRQHandler(void)
  464. 220:Src/stm32f4xx_it.c **** {
  465. ARM GAS /tmp/cc9QsDpS.s page 9
  466. 254 .loc 1 220 1 is_stmt 1 view -0
  467. 255 .cfi_startproc
  468. 256 @ args = 0, pretend = 0, frame = 0
  469. 257 @ frame_needed = 0, uses_anonymous_args = 0
  470. 258 0000 08B5 push {r3, lr}
  471. 259 .LCFI2:
  472. 260 .cfi_def_cfa_offset 8
  473. 261 .cfi_offset 3, -8
  474. 262 .cfi_offset 14, -4
  475. 221:Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART2_IRQn 0 */
  476. 222:Src/stm32f4xx_it.c ****
  477. 223:Src/stm32f4xx_it.c **** /* USER CODE END USART2_IRQn 0 */
  478. 224:Src/stm32f4xx_it.c **** HAL_UART_IRQHandler(&huart2);
  479. 263 .loc 1 224 3 view .LVU31
  480. 264 0002 0248 ldr r0, .L21
  481. 265 0004 FFF7FEFF bl HAL_UART_IRQHandler
  482. 266 .LVL2:
  483. 225:Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART2_IRQn 1 */
  484. 226:Src/stm32f4xx_it.c ****
  485. 227:Src/stm32f4xx_it.c **** /* USER CODE END USART2_IRQn 1 */
  486. 228:Src/stm32f4xx_it.c **** }
  487. 267 .loc 1 228 1 is_stmt 0 view .LVU32
  488. 268 0008 08BD pop {r3, pc}
  489. 269 .L22:
  490. 270 000a 00BF .align 2
  491. 271 .L21:
  492. 272 000c 00000000 .word huart2
  493. 273 .cfi_endproc
  494. 274 .LFE140:
  495. 276 .section .text.UART4_IRQHandler,"ax",%progbits
  496. 277 .align 1
  497. 278 .global UART4_IRQHandler
  498. 279 .syntax unified
  499. 280 .thumb
  500. 281 .thumb_func
  501. 283 UART4_IRQHandler:
  502. 284 .LFB141:
  503. 229:Src/stm32f4xx_it.c ****
  504. 230:Src/stm32f4xx_it.c **** /**
  505. 231:Src/stm32f4xx_it.c **** * @brief This function handles UART4 global interrupt.
  506. 232:Src/stm32f4xx_it.c **** */
  507. 233:Src/stm32f4xx_it.c **** void UART4_IRQHandler(void)
  508. 234:Src/stm32f4xx_it.c **** {
  509. 285 .loc 1 234 1 is_stmt 1 view -0
  510. 286 .cfi_startproc
  511. 287 @ args = 0, pretend = 0, frame = 0
  512. 288 @ frame_needed = 0, uses_anonymous_args = 0
  513. 289 0000 08B5 push {r3, lr}
  514. 290 .LCFI3:
  515. 291 .cfi_def_cfa_offset 8
  516. 292 .cfi_offset 3, -8
  517. 293 .cfi_offset 14, -4
  518. 235:Src/stm32f4xx_it.c **** /* USER CODE BEGIN UART4_IRQn 0 */
  519. 236:Src/stm32f4xx_it.c ****
  520. 237:Src/stm32f4xx_it.c **** /* USER CODE END UART4_IRQn 0 */
  521. 238:Src/stm32f4xx_it.c **** HAL_UART_IRQHandler(&huart4);
  522. 294 .loc 1 238 3 view .LVU34
  523. ARM GAS /tmp/cc9QsDpS.s page 10
  524. 295 0002 0248 ldr r0, .L25
  525. 296 0004 FFF7FEFF bl HAL_UART_IRQHandler
  526. 297 .LVL3:
  527. 239:Src/stm32f4xx_it.c **** /* USER CODE BEGIN UART4_IRQn 1 */
  528. 240:Src/stm32f4xx_it.c ****
  529. 241:Src/stm32f4xx_it.c **** /* USER CODE END UART4_IRQn 1 */
  530. 242:Src/stm32f4xx_it.c **** }
  531. 298 .loc 1 242 1 is_stmt 0 view .LVU35
  532. 299 0008 08BD pop {r3, pc}
  533. 300 .L26:
  534. 301 000a 00BF .align 2
  535. 302 .L25:
  536. 303 000c 00000000 .word huart4
  537. 304 .cfi_endproc
  538. 305 .LFE141:
  539. 307 .text
  540. 308 .Letext0:
  541. 309 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  542. 310 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  543. 311 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
  544. 312 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  545. 313 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
  546. 314 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
  547. 315 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
  548. ARM GAS /tmp/cc9QsDpS.s page 11
  549. DEFINED SYMBOLS
  550. *ABS*:0000000000000000 stm32f4xx_it.c
  551. /tmp/cc9QsDpS.s:20 .text.NMI_Handler:0000000000000000 $t
  552. /tmp/cc9QsDpS.s:26 .text.NMI_Handler:0000000000000000 NMI_Handler
  553. /tmp/cc9QsDpS.s:40 .text.HardFault_Handler:0000000000000000 $t
  554. /tmp/cc9QsDpS.s:46 .text.HardFault_Handler:0000000000000000 HardFault_Handler
  555. /tmp/cc9QsDpS.s:63 .text.MemManage_Handler:0000000000000000 $t
  556. /tmp/cc9QsDpS.s:69 .text.MemManage_Handler:0000000000000000 MemManage_Handler
  557. /tmp/cc9QsDpS.s:86 .text.BusFault_Handler:0000000000000000 $t
  558. /tmp/cc9QsDpS.s:92 .text.BusFault_Handler:0000000000000000 BusFault_Handler
  559. /tmp/cc9QsDpS.s:109 .text.UsageFault_Handler:0000000000000000 $t
  560. /tmp/cc9QsDpS.s:115 .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
  561. /tmp/cc9QsDpS.s:132 .text.SVC_Handler:0000000000000000 $t
  562. /tmp/cc9QsDpS.s:138 .text.SVC_Handler:0000000000000000 SVC_Handler
  563. /tmp/cc9QsDpS.s:151 .text.DebugMon_Handler:0000000000000000 $t
  564. /tmp/cc9QsDpS.s:157 .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
  565. /tmp/cc9QsDpS.s:170 .text.PendSV_Handler:0000000000000000 $t
  566. /tmp/cc9QsDpS.s:176 .text.PendSV_Handler:0000000000000000 PendSV_Handler
  567. /tmp/cc9QsDpS.s:189 .text.SysTick_Handler:0000000000000000 $t
  568. /tmp/cc9QsDpS.s:195 .text.SysTick_Handler:0000000000000000 SysTick_Handler
  569. /tmp/cc9QsDpS.s:215 .text.USART1_IRQHandler:0000000000000000 $t
  570. /tmp/cc9QsDpS.s:221 .text.USART1_IRQHandler:0000000000000000 USART1_IRQHandler
  571. /tmp/cc9QsDpS.s:241 .text.USART1_IRQHandler:000000000000000c $d
  572. /tmp/cc9QsDpS.s:246 .text.USART2_IRQHandler:0000000000000000 $t
  573. /tmp/cc9QsDpS.s:252 .text.USART2_IRQHandler:0000000000000000 USART2_IRQHandler
  574. /tmp/cc9QsDpS.s:272 .text.USART2_IRQHandler:000000000000000c $d
  575. /tmp/cc9QsDpS.s:277 .text.UART4_IRQHandler:0000000000000000 $t
  576. /tmp/cc9QsDpS.s:283 .text.UART4_IRQHandler:0000000000000000 UART4_IRQHandler
  577. /tmp/cc9QsDpS.s:303 .text.UART4_IRQHandler:000000000000000c $d
  578. UNDEFINED SYMBOLS
  579. HAL_IncTick
  580. HAL_UART_IRQHandler
  581. huart1
  582. huart2
  583. huart4