stm32f4xx_hal_pwr_ex.lst 42 KB

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  1. ARM GAS /tmp/cce0GhQW.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 1
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "stm32f4xx_hal_pwr_ex.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.HAL_PWREx_EnableBkUpReg,"ax",%progbits
  21. 20 .align 1
  22. 21 .global HAL_PWREx_EnableBkUpReg
  23. 22 .syntax unified
  24. 23 .thumb
  25. 24 .thumb_func
  26. 26 HAL_PWREx_EnableBkUpReg:
  27. 27 .LFB130:
  28. 28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c"
  29. 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  30. 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
  31. 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @file stm32f4xx_hal_pwr_ex.c
  32. 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @author MCD Application Team
  33. 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
  34. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
  35. 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * functionalities of PWR extension peripheral:
  36. 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * + Peripheral Extended features functions
  37. 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
  38. 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
  39. 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @attention
  40. 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
  41. 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  42. 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * All rights reserved.</center></h2>
  43. 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
  44. 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
  45. 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the "License"; You may not use this file except in compliance with the
  46. 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * License. You may obtain a copy of the License at:
  47. 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * opensource.org/licenses/BSD-3-Clause
  48. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
  49. 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
  50. 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  51. 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  52. 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
  53. 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #include "stm32f4xx_hal.h"
  54. 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  55. 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup STM32F4xx_HAL_Driver
  56. 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
  57. 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  58. 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  59. ARM GAS /tmp/cce0GhQW.s page 2
  60. 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
  61. 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief PWR HAL module driver
  62. 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
  63. 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  64. 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  65. 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
  66. 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  67. 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
  68. 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
  69. 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants
  70. 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
  71. 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  72. 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
  73. 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
  74. 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE 1000U
  75. 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE 1000U
  76. 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  77. 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @}
  78. 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  79. 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  80. 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  81. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
  82. 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
  83. 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
  84. 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/
  85. 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
  86. 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
  87. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  88. 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  89. 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
  90. 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Peripheral Extended features functions
  91. 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
  92. 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @verbatim
  93. 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  94. 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ===============================================================================
  95. 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ##### Peripheral extended features functions #####
  96. 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ===============================================================================
  97. 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  98. 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Main and Backup Regulators configuration ***
  99. 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ================================================
  100. 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
  101. 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
  102. 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
  103. 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** retained even in Standby or VBAT mode when the low power backup regulator
  104. 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is enabled. It can be considered as an internal EEPROM when VBAT is
  105. 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** always present. You can use the HAL_PWREx_EnableBkUpReg() function to
  106. 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** enable the low power backup regulator.
  107. 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  108. 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
  109. 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to
  110. 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** save battery life.
  111. 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  112. 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read
  113. 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** protected to prevent confidential data, such as cryptographic private
  114. 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** key, from being accessed. The backup SRAM can be erased only through
  115. 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the Flash interface when a protection level change from level 1 to
  116. 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** level 0 is requested.
  117. ARM GAS /tmp/cce0GhQW.s page 3
  118. 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash
  119. 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** programming manual.
  120. 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  121. 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between
  122. 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** performance and power consumption when the device does not operate at
  123. 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
  124. 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** macro which configure VOS bit in PWR_CR register
  125. 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  126. 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the product datasheets for more details.
  127. 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  128. 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** FLASH Power Down configuration ****
  129. 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =======================================
  130. 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
  131. 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) By setting the FPDS bit in the PWR_CR register by using the
  132. 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
  133. 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** down mode when the device enters Stop mode. When the Flash memory
  134. 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is in power down mode, an additional startup delay is incurred when
  135. 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** waking up from Stop mode.
  136. 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  137. 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when
  138. 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is OFF and the HSI or HSE clock source is selected as system clock.
  139. 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** The new value programmed is active only when the PLL is ON.
  140. 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** When the PLL is OFF, the voltage scale 3 is automatically selected.
  141. 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the datasheets for more details.
  142. 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  143. 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Over-Drive and Under-Drive configuration ****
  144. 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =================================================
  145. 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
  146. 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
  147. 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 2 operating modes available:
  148. 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
  149. 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** voltage scaling (scale 1, scale 2 or scale 3)
  150. 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
  151. 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** higher frequency than the normal mode for a given voltage scaling (scale 1,
  152. 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function
  153. 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod
  154. 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the sequence described in Reference manual.
  155. 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  156. 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low
  157. 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** supplies a low power voltage to the 1.2V domain, thus preserving the content of register
  158. 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** and internal SRAM. 2 operating modes are available:
  159. 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
  160. 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is used in Scale 3 or
  161. 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** low voltage mode.
  162. 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is
  163. 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is in low voltage mode.
  164. 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  165. 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @endverbatim
  166. 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
  167. 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  168. 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  169. 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  170. 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Backup Regulator.
  171. 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status
  172. 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  173. 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
  174. 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  175. ARM GAS /tmp/cce0GhQW.s page 4
  176. 29 .loc 1 144 1 view -0
  177. 30 .cfi_startproc
  178. 31 @ args = 0, pretend = 0, frame = 0
  179. 32 @ frame_needed = 0, uses_anonymous_args = 0
  180. 33 0000 10B5 push {r4, lr}
  181. 34 .LCFI0:
  182. 35 .cfi_def_cfa_offset 8
  183. 36 .cfi_offset 4, -8
  184. 37 .cfi_offset 14, -4
  185. 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
  186. 38 .loc 1 145 3 view .LVU1
  187. 39 .LVL0:
  188. 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  189. 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
  190. 40 .loc 1 147 3 view .LVU2
  191. 41 .loc 1 147 33 is_stmt 0 view .LVU3
  192. 42 0002 0B4B ldr r3, .L8
  193. 43 0004 0122 movs r2, #1
  194. 44 0006 C3F8A420 str r2, [r3, #164]
  195. 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  196. 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */
  197. 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
  198. 45 .loc 1 150 3 is_stmt 1 view .LVU4
  199. 46 .loc 1 150 15 is_stmt 0 view .LVU5
  200. 47 000a FFF7FEFF bl HAL_GetTick
  201. 48 .LVL1:
  202. 49 000e 0446 mov r4, r0
  203. 50 .LVL2:
  204. 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  205. 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
  206. 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
  207. 51 .loc 1 153 3 is_stmt 1 view .LVU6
  208. 52 .L2:
  209. 53 .loc 1 153 8 view .LVU7
  210. 54 .loc 1 153 9 is_stmt 0 view .LVU8
  211. 55 0010 084B ldr r3, .L8+4
  212. 56 0012 5B68 ldr r3, [r3, #4]
  213. 57 .loc 1 153 8 view .LVU9
  214. 58 0014 13F0080F tst r3, #8
  215. 59 0018 07D1 bne .L7
  216. 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  217. 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
  218. 60 .loc 1 155 5 is_stmt 1 view .LVU10
  219. 61 .loc 1 155 9 is_stmt 0 view .LVU11
  220. 62 001a FFF7FEFF bl HAL_GetTick
  221. 63 .LVL3:
  222. 64 .loc 1 155 23 view .LVU12
  223. 65 001e 001B subs r0, r0, r4
  224. 66 .loc 1 155 7 view .LVU13
  225. 67 0020 B0F57A7F cmp r0, #1000
  226. 68 0024 F4D9 bls .L2
  227. 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  228. 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
  229. 69 .loc 1 157 14 view .LVU14
  230. 70 0026 0320 movs r0, #3
  231. 71 0028 00E0 b .L3
  232. 72 .L7:
  233. ARM GAS /tmp/cce0GhQW.s page 5
  234. 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  235. 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  236. 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
  237. 73 .loc 1 160 10 view .LVU15
  238. 74 002a 0020 movs r0, #0
  239. 75 .L3:
  240. 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  241. 76 .loc 1 161 1 view .LVU16
  242. 77 002c 10BD pop {r4, pc}
  243. 78 .LVL4:
  244. 79 .L9:
  245. 80 .loc 1 161 1 view .LVU17
  246. 81 002e 00BF .align 2
  247. 82 .L8:
  248. 83 0030 00000E42 .word 1108213760
  249. 84 0034 00700040 .word 1073770496
  250. 85 .cfi_endproc
  251. 86 .LFE130:
  252. 88 .section .text.HAL_PWREx_DisableBkUpReg,"ax",%progbits
  253. 89 .align 1
  254. 90 .global HAL_PWREx_DisableBkUpReg
  255. 91 .syntax unified
  256. 92 .thumb
  257. 93 .thumb_func
  258. 95 HAL_PWREx_DisableBkUpReg:
  259. 96 .LFB131:
  260. 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  261. 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  262. 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Backup Regulator.
  263. 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status
  264. 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  265. 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
  266. 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  267. 97 .loc 1 168 1 is_stmt 1 view -0
  268. 98 .cfi_startproc
  269. 99 @ args = 0, pretend = 0, frame = 0
  270. 100 @ frame_needed = 0, uses_anonymous_args = 0
  271. 101 0000 10B5 push {r4, lr}
  272. 102 .LCFI1:
  273. 103 .cfi_def_cfa_offset 8
  274. 104 .cfi_offset 4, -8
  275. 105 .cfi_offset 14, -4
  276. 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
  277. 106 .loc 1 169 3 view .LVU19
  278. 107 .LVL5:
  279. 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  280. 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
  281. 108 .loc 1 171 3 view .LVU20
  282. 109 .loc 1 171 33 is_stmt 0 view .LVU21
  283. 110 0002 0B4B ldr r3, .L17
  284. 111 0004 0022 movs r2, #0
  285. 112 0006 C3F8A420 str r2, [r3, #164]
  286. 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  287. 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */
  288. 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
  289. 113 .loc 1 174 3 is_stmt 1 view .LVU22
  290. 114 .loc 1 174 15 is_stmt 0 view .LVU23
  291. ARM GAS /tmp/cce0GhQW.s page 6
  292. 115 000a FFF7FEFF bl HAL_GetTick
  293. 116 .LVL6:
  294. 117 000e 0446 mov r4, r0
  295. 118 .LVL7:
  296. 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  297. 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
  298. 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
  299. 119 .loc 1 177 3 is_stmt 1 view .LVU24
  300. 120 .L11:
  301. 121 .loc 1 177 8 view .LVU25
  302. 122 .loc 1 177 9 is_stmt 0 view .LVU26
  303. 123 0010 084B ldr r3, .L17+4
  304. 124 0012 5B68 ldr r3, [r3, #4]
  305. 125 .loc 1 177 8 view .LVU27
  306. 126 0014 13F0080F tst r3, #8
  307. 127 0018 07D0 beq .L16
  308. 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  309. 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
  310. 128 .loc 1 179 5 is_stmt 1 view .LVU28
  311. 129 .loc 1 179 9 is_stmt 0 view .LVU29
  312. 130 001a FFF7FEFF bl HAL_GetTick
  313. 131 .LVL8:
  314. 132 .loc 1 179 23 view .LVU30
  315. 133 001e 001B subs r0, r0, r4
  316. 134 .loc 1 179 7 view .LVU31
  317. 135 0020 B0F57A7F cmp r0, #1000
  318. 136 0024 F4D9 bls .L11
  319. 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  320. 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
  321. 137 .loc 1 181 14 view .LVU32
  322. 138 0026 0320 movs r0, #3
  323. 139 0028 00E0 b .L12
  324. 140 .L16:
  325. 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  326. 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  327. 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
  328. 141 .loc 1 184 10 view .LVU33
  329. 142 002a 0020 movs r0, #0
  330. 143 .L12:
  331. 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  332. 144 .loc 1 185 1 view .LVU34
  333. 145 002c 10BD pop {r4, pc}
  334. 146 .LVL9:
  335. 147 .L18:
  336. 148 .loc 1 185 1 view .LVU35
  337. 149 002e 00BF .align 2
  338. 150 .L17:
  339. 151 0030 00000E42 .word 1108213760
  340. 152 0034 00700040 .word 1073770496
  341. 153 .cfi_endproc
  342. 154 .LFE131:
  343. 156 .section .text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits
  344. 157 .align 1
  345. 158 .global HAL_PWREx_EnableFlashPowerDown
  346. 159 .syntax unified
  347. 160 .thumb
  348. 161 .thumb_func
  349. ARM GAS /tmp/cce0GhQW.s page 7
  350. 163 HAL_PWREx_EnableFlashPowerDown:
  351. 164 .LFB132:
  352. 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  353. 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  354. 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Flash Power Down in Stop mode.
  355. 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None
  356. 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  357. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void)
  358. 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  359. 165 .loc 1 192 1 is_stmt 1 view -0
  360. 166 .cfi_startproc
  361. 167 @ args = 0, pretend = 0, frame = 0
  362. 168 @ frame_needed = 0, uses_anonymous_args = 0
  363. 169 @ link register save eliminated.
  364. 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
  365. 170 .loc 1 193 3 view .LVU37
  366. 171 .loc 1 193 33 is_stmt 0 view .LVU38
  367. 172 0000 014B ldr r3, .L20
  368. 173 0002 0122 movs r2, #1
  369. 174 0004 5A62 str r2, [r3, #36]
  370. 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  371. 175 .loc 1 194 1 view .LVU39
  372. 176 0006 7047 bx lr
  373. 177 .L21:
  374. 178 .align 2
  375. 179 .L20:
  376. 180 0008 00000E42 .word 1108213760
  377. 181 .cfi_endproc
  378. 182 .LFE132:
  379. 184 .section .text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits
  380. 185 .align 1
  381. 186 .global HAL_PWREx_DisableFlashPowerDown
  382. 187 .syntax unified
  383. 188 .thumb
  384. 189 .thumb_func
  385. 191 HAL_PWREx_DisableFlashPowerDown:
  386. 192 .LFB133:
  387. 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  388. 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  389. 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode.
  390. 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None
  391. 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  392. 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void)
  393. 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  394. 193 .loc 1 201 1 is_stmt 1 view -0
  395. 194 .cfi_startproc
  396. 195 @ args = 0, pretend = 0, frame = 0
  397. 196 @ frame_needed = 0, uses_anonymous_args = 0
  398. 197 @ link register save eliminated.
  399. 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
  400. 198 .loc 1 202 3 view .LVU41
  401. 199 .loc 1 202 33 is_stmt 0 view .LVU42
  402. 200 0000 014B ldr r3, .L23
  403. 201 0002 0022 movs r2, #0
  404. 202 0004 5A62 str r2, [r3, #36]
  405. 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  406. 203 .loc 1 203 1 view .LVU43
  407. ARM GAS /tmp/cce0GhQW.s page 8
  408. 204 0006 7047 bx lr
  409. 205 .L24:
  410. 206 .align 2
  411. 207 .L23:
  412. 208 0008 00000E42 .word 1108213760
  413. 209 .cfi_endproc
  414. 210 .LFE133:
  415. 212 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits
  416. 213 .align 1
  417. 214 .global HAL_PWREx_GetVoltageRange
  418. 215 .syntax unified
  419. 216 .thumb
  420. 217 .thumb_func
  421. 219 HAL_PWREx_GetVoltageRange:
  422. 220 .LFB134:
  423. 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  424. 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  425. 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Return Voltage Scaling Range.
  426. 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval The configured scale for the regulator voltage(VOS bit field).
  427. 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * The returned value can be one of the following:
  428. 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
  429. 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
  430. 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
  431. 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  432. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void)
  433. 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  434. 221 .loc 1 214 1 is_stmt 1 view -0
  435. 222 .cfi_startproc
  436. 223 @ args = 0, pretend = 0, frame = 0
  437. 224 @ frame_needed = 0, uses_anonymous_args = 0
  438. 225 @ link register save eliminated.
  439. 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return (PWR->CR & PWR_CR_VOS);
  440. 226 .loc 1 215 3 view .LVU45
  441. 227 .loc 1 215 14 is_stmt 0 view .LVU46
  442. 228 0000 024B ldr r3, .L26
  443. 229 0002 1868 ldr r0, [r3]
  444. 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  445. 230 .loc 1 216 1 view .LVU47
  446. 231 0004 00F48040 and r0, r0, #16384
  447. 232 0008 7047 bx lr
  448. 233 .L27:
  449. 234 000a 00BF .align 2
  450. 235 .L26:
  451. 236 000c 00700040 .word 1073770496
  452. 237 .cfi_endproc
  453. 238 .LFE134:
  454. 240 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits
  455. 241 .align 1
  456. 242 .global HAL_PWREx_ControlVoltageScaling
  457. 243 .syntax unified
  458. 244 .thumb
  459. 245 .thumb_func
  460. 247 HAL_PWREx_ControlVoltageScaling:
  461. 248 .LVL10:
  462. 249 .LFB135:
  463. 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  464. 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
  465. ARM GAS /tmp/cce0GhQW.s page 9
  466. 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
  467. 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage.
  468. 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve
  469. 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption.
  470. 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
  471. 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
  472. 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 168 MHz.
  473. 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
  474. 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 144 MHz.
  475. 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
  476. 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
  477. 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * When moving from Range 2 to Range 1, the system frequency can be increased to
  478. 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
  479. 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL Status
  480. 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
  481. 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
  482. 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  483. 250 .loc 1 235 1 is_stmt 1 view -0
  484. 251 .cfi_startproc
  485. 252 @ args = 0, pretend = 0, frame = 8
  486. 253 @ frame_needed = 0, uses_anonymous_args = 0
  487. 254 .loc 1 235 1 is_stmt 0 view .LVU49
  488. 255 0000 10B5 push {r4, lr}
  489. 256 .LCFI2:
  490. 257 .cfi_def_cfa_offset 8
  491. 258 .cfi_offset 4, -8
  492. 259 .cfi_offset 14, -4
  493. 260 0002 82B0 sub sp, sp, #8
  494. 261 .LCFI3:
  495. 262 .cfi_def_cfa_offset 16
  496. 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
  497. 263 .loc 1 236 3 is_stmt 1 view .LVU50
  498. 264 .LVL11:
  499. 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  500. 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
  501. 265 .loc 1 238 3 view .LVU51
  502. 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  503. 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable PWR RCC Clock Peripheral */
  504. 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
  505. 266 .loc 1 241 3 view .LVU52
  506. 267 .LBB2:
  507. 268 .loc 1 241 3 view .LVU53
  508. 269 0004 0024 movs r4, #0
  509. 270 0006 0094 str r4, [sp]
  510. 271 .loc 1 241 3 view .LVU54
  511. 272 0008 144A ldr r2, .L35
  512. 273 000a 116C ldr r1, [r2, #64]
  513. 274 000c 41F08051 orr r1, r1, #268435456
  514. 275 0010 1164 str r1, [r2, #64]
  515. 276 .loc 1 241 3 view .LVU55
  516. 277 0012 126C ldr r2, [r2, #64]
  517. 278 0014 02F08052 and r2, r2, #268435456
  518. 279 0018 0092 str r2, [sp]
  519. 280 .loc 1 241 3 view .LVU56
  520. 281 001a 009B ldr r3, [sp]
  521. 282 .LBE2:
  522. 283 .loc 1 241 3 view .LVU57
  523. ARM GAS /tmp/cce0GhQW.s page 10
  524. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  525. 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set Range */
  526. 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
  527. 284 .loc 1 244 3 view .LVU58
  528. 285 .LBB3:
  529. 286 .loc 1 244 3 view .LVU59
  530. 287 001c 0194 str r4, [sp, #4]
  531. 288 .loc 1 244 3 view .LVU60
  532. 289 001e 104A ldr r2, .L35+4
  533. 290 0020 1368 ldr r3, [r2]
  534. 291 0022 23F48043 bic r3, r3, #16384
  535. 292 0026 0343 orrs r3, r3, r0
  536. 293 0028 1360 str r3, [r2]
  537. 294 .loc 1 244 3 view .LVU61
  538. 295 002a 1368 ldr r3, [r2]
  539. 296 002c 03F48043 and r3, r3, #16384
  540. 297 0030 0193 str r3, [sp, #4]
  541. 298 .loc 1 244 3 view .LVU62
  542. 299 0032 019B ldr r3, [sp, #4]
  543. 300 .LBE3:
  544. 301 .loc 1 244 3 view .LVU63
  545. 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  546. 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick*/
  547. 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
  548. 302 .loc 1 247 3 view .LVU64
  549. 303 .loc 1 247 15 is_stmt 0 view .LVU65
  550. 304 0034 FFF7FEFF bl HAL_GetTick
  551. 305 .LVL12:
  552. 306 .loc 1 247 15 view .LVU66
  553. 307 0038 0446 mov r4, r0
  554. 308 .LVL13:
  555. 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
  556. 309 .loc 1 248 3 is_stmt 1 view .LVU67
  557. 310 .L29:
  558. 311 .loc 1 248 8 view .LVU68
  559. 312 .loc 1 248 10 is_stmt 0 view .LVU69
  560. 313 003a 094B ldr r3, .L35+4
  561. 314 003c 5B68 ldr r3, [r3, #4]
  562. 315 .loc 1 248 8 view .LVU70
  563. 316 003e 13F4804F tst r3, #16384
  564. 317 0042 07D1 bne .L34
  565. 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  566. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
  567. 318 .loc 1 250 5 is_stmt 1 view .LVU71
  568. 319 .loc 1 250 9 is_stmt 0 view .LVU72
  569. 320 0044 FFF7FEFF bl HAL_GetTick
  570. 321 .LVL14:
  571. 322 .loc 1 250 23 view .LVU73
  572. 323 0048 001B subs r0, r0, r4
  573. 324 .loc 1 250 7 view .LVU74
  574. 325 004a B0F57A7F cmp r0, #1000
  575. 326 004e F4D9 bls .L29
  576. 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
  577. 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
  578. 327 .loc 1 252 14 view .LVU75
  579. 328 0050 0320 movs r0, #3
  580. 329 0052 00E0 b .L30
  581. ARM GAS /tmp/cce0GhQW.s page 11
  582. 330 .L34:
  583. 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  584. 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  585. 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
  586. 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
  587. 331 .loc 1 256 10 view .LVU76
  588. 332 0054 0020 movs r0, #0
  589. 333 .L30:
  590. 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
  591. 334 .loc 1 257 1 view .LVU77
  592. 335 0056 02B0 add sp, sp, #8
  593. 336 .LCFI4:
  594. 337 .cfi_def_cfa_offset 8
  595. 338 @ sp needed
  596. 339 0058 10BD pop {r4, pc}
  597. 340 .LVL15:
  598. 341 .L36:
  599. 342 .loc 1 257 1 view .LVU78
  600. 343 005a 00BF .align 2
  601. 344 .L35:
  602. 345 005c 00380240 .word 1073887232
  603. 346 0060 00700040 .word 1073770496
  604. 347 .cfi_endproc
  605. 348 .LFE135:
  606. 350 .text
  607. 351 .Letext0:
  608. 352 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  609. 353 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  610. 354 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
  611. 355 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
  612. 356 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  613. 357 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
  614. ARM GAS /tmp/cce0GhQW.s page 12
  615. DEFINED SYMBOLS
  616. *ABS*:0000000000000000 stm32f4xx_hal_pwr_ex.c
  617. /tmp/cce0GhQW.s:20 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 $t
  618. /tmp/cce0GhQW.s:26 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 HAL_PWREx_EnableBkUpReg
  619. /tmp/cce0GhQW.s:83 .text.HAL_PWREx_EnableBkUpReg:0000000000000030 $d
  620. /tmp/cce0GhQW.s:89 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 $t
  621. /tmp/cce0GhQW.s:95 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 HAL_PWREx_DisableBkUpReg
  622. /tmp/cce0GhQW.s:151 .text.HAL_PWREx_DisableBkUpReg:0000000000000030 $d
  623. /tmp/cce0GhQW.s:157 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 $t
  624. /tmp/cce0GhQW.s:163 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 HAL_PWREx_EnableFlashPowerDown
  625. /tmp/cce0GhQW.s:180 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000008 $d
  626. /tmp/cce0GhQW.s:185 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 $t
  627. /tmp/cce0GhQW.s:191 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 HAL_PWREx_DisableFlashPowerDown
  628. /tmp/cce0GhQW.s:208 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000008 $d
  629. /tmp/cce0GhQW.s:213 .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t
  630. /tmp/cce0GhQW.s:219 .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange
  631. /tmp/cce0GhQW.s:236 .text.HAL_PWREx_GetVoltageRange:000000000000000c $d
  632. /tmp/cce0GhQW.s:241 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t
  633. /tmp/cce0GhQW.s:247 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling
  634. /tmp/cce0GhQW.s:345 .text.HAL_PWREx_ControlVoltageScaling:000000000000005c $d
  635. UNDEFINED SYMBOLS
  636. HAL_GetTick