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main.lst 30 KB

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  1. ARM GAS /tmp/cclhzA2e.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 1
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "main.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.SystemClock_Config,"ax",%progbits
  21. 20 .align 1
  22. 21 .global SystemClock_Config
  23. 22 .syntax unified
  24. 23 .thumb
  25. 24 .thumb_func
  26. 26 SystemClock_Config:
  27. 27 .LFB131:
  28. 28 .file 1 "Src/main.c"
  29. 1:Src/main.c **** /* USER CODE BEGIN Header */
  30. 2:Src/main.c **** /**
  31. 3:Src/main.c **** ******************************************************************************
  32. 4:Src/main.c **** * @file : main.c
  33. 5:Src/main.c **** * @brief : Main program body
  34. 6:Src/main.c **** * @attention
  35. 7:Src/main.c **** *
  36. 8:Src/main.c **** * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  37. 9:Src/main.c **** * All rights reserved.</center></h2>
  38. 10:Src/main.c **** *
  39. 11:Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
  40. 12:Src/main.c **** * the License; You may not use this file except in compliance with the
  41. 13:Src/main.c **** * License. You may obtain a copy of the License at:
  42. 14:Src/main.c **** * www.st.com/SLA0044
  43. 15:Src/main.c **** *
  44. 16:Src/main.c **** ******************************************************************************
  45. 17:Src/main.c **** */
  46. 18:Src/main.c **** /* USER CODE END Header */
  47. 19:Src/main.c ****
  48. 20:Src/main.c **** /* Includes ------------------------------------------------------------------*/
  49. 21:Src/main.c **** #include"main.h"
  50. 22:Src/main.c **** #include "adc.h"
  51. 23:Src/main.c **** #include "usart.h"
  52. 24:Src/main.c **** #include "gpio.h"
  53. 25:Src/main.c ****
  54. 26:Src/main.c **** /* Private variables ---------------------------------------------------------*/
  55. 27:Src/main.c **** #define VECT_TAB_OFFSET 0x10000
  56. 28:Src/main.c **** int tankstatus = 0;
  57. 29:Src/main.c **** uint16_t M4_AD_Value = 0;
  58. 30:Src/main.c **** float M4_voltage_V =0;
  59. ARM GAS /tmp/cclhzA2e.s page 2
  60. 31:Src/main.c **** float M4_pH_mid = 1.500;
  61. 32:Src/main.c **** float M4_pH_low = 2.030;
  62. 33:Src/main.c **** float M4_pH_high =0.975;
  63. 34:Src/main.c **** float M4_PH=0;
  64. 35:Src/main.c **** /* USER CODE BEGIN PV */
  65. 36:Src/main.c **** typedef void (*pFunction)(void);
  66. 37:Src/main.c **** /* USER CODE END PV */
  67. 38:Src/main.c **** /* Private function prototypes -----------------------------------------------*/
  68. 39:Src/main.c **** void SystemClock_Config(void);
  69. 40:Src/main.c **** /* USER CODE BEGIN PFP */
  70. 41:Src/main.c **** /* USER CODE END PFP */
  71. 42:Src/main.c **** /* Private user code ---------------------------------------------------------*/
  72. 43:Src/main.c **** /* USER CODE BEGIN 0 */
  73. 44:Src/main.c **** /* USER CODE END 0 */
  74. 45:Src/main.c **** /**
  75. 46:Src/main.c **** * @brief The application entry point.
  76. 47:Src/main.c **** * @retval int
  77. 48:Src/main.c **** */
  78. 49:Src/main.c **** int main(void)
  79. 50:Src/main.c **** {
  80. 51:Src/main.c **** SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
  81. 52:Src/main.c **** HAL_Init();
  82. 53:Src/main.c **** SystemClock_Config();
  83. 54:Src/main.c **** MX_GPIO_Init();
  84. 55:Src/main.c **** MX_USART2_UART_Init();
  85. 56:Src/main.c **** MX_UART4_Init();
  86. 57:Src/main.c **** MX_USART1_UART_Init();
  87. 58:Src/main.c **** MX_ADC1_Init();
  88. 59:Src/main.c **** while (1)
  89. 60:Src/main.c **** {
  90. 61:Src/main.c **** HAL_ADC_Start(&hadc1);
  91. 62:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 50);
  92. 63:Src/main.c **** if(HAL_IS_BIT_SET(HAL_ADC_GetState(&hadc1), HAL_ADC_STATE_REG_EOC))
  93. 64:Src/main.c **** {
  94. 65:Src/main.c **** M4_AD_Value = HAL_ADC_GetValue(&hadc1);
  95. 66:Src/main.c **** M4_voltage_V = M4_AD_Value*3.3f/4096;
  96. 67:Src/main.c **** if (M4_voltage_V > M4_pH_mid)
  97. 68:Src/main.c **** {
  98. 69:Src/main.c **** M4_PH = 7.0 - 3.0 / (M4_pH_low - M4_pH_mid) * (M4_voltage_V - M4_pH_mid);
  99. 70:Src/main.c **** }
  100. 71:Src/main.c **** else
  101. 72:Src/main.c **** {
  102. 73:Src/main.c **** M4_PH = 7.0 - 3.0 / (M4_pH_mid - M4_pH_high) * (M4_voltage_V - M4_pH_mid);
  103. 74:Src/main.c **** }
  104. 75:Src/main.c **** }
  105. 76:Src/main.c **** HAL_UART_Transmit(&huart4,(unsigned char*)&M4_PH,4,10);
  106. 77:Src/main.c **** HAL_Delay(10000);
  107. 78:Src/main.c **** if(M4_PH<14 && tankstatus == 0)
  108. 79:Src/main.c **** {
  109. 80:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_15, GPIO_PIN_SET);
  110. 81:Src/main.c ****
  111. 82:Src/main.c **** HAL_Delay(30000);
  112. 83:Src/main.c ****
  113. 84:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_15, GPIO_PIN_RESET);
  114. 85:Src/main.c ****
  115. 86:Src/main.c **** }
  116. 87:Src/main.c **** }
  117. ARM GAS /tmp/cclhzA2e.s page 3
  118. 88:Src/main.c **** }
  119. 89:Src/main.c **** void SystemClock_Config(void)
  120. 90:Src/main.c **** {
  121. 29 .loc 1 90 1 view -0
  122. 30 .cfi_startproc
  123. 31 @ args = 0, pretend = 0, frame = 80
  124. 32 @ frame_needed = 0, uses_anonymous_args = 0
  125. 33 0000 30B5 push {r4, r5, lr}
  126. 34 .LCFI0:
  127. 35 .cfi_def_cfa_offset 12
  128. 36 .cfi_offset 4, -12
  129. 37 .cfi_offset 5, -8
  130. 38 .cfi_offset 14, -4
  131. 39 0002 95B0 sub sp, sp, #84
  132. 40 .LCFI1:
  133. 41 .cfi_def_cfa_offset 96
  134. 91:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  135. 42 .loc 1 91 3 view .LVU1
  136. 43 .loc 1 91 22 is_stmt 0 view .LVU2
  137. 44 0004 3022 movs r2, #48
  138. 45 0006 0021 movs r1, #0
  139. 46 0008 08A8 add r0, sp, #32
  140. 47 000a FFF7FEFF bl memset
  141. 48 .LVL0:
  142. 92:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  143. 49 .loc 1 92 3 is_stmt 1 view .LVU3
  144. 50 .loc 1 92 22 is_stmt 0 view .LVU4
  145. 51 000e 0024 movs r4, #0
  146. 52 0010 0394 str r4, [sp, #12]
  147. 53 0012 0494 str r4, [sp, #16]
  148. 54 0014 0594 str r4, [sp, #20]
  149. 55 0016 0694 str r4, [sp, #24]
  150. 56 0018 0794 str r4, [sp, #28]
  151. 93:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE();
  152. 57 .loc 1 93 3 is_stmt 1 view .LVU5
  153. 58 .LBB2:
  154. 59 .loc 1 93 3 view .LVU6
  155. 60 001a 0194 str r4, [sp, #4]
  156. 61 .loc 1 93 3 view .LVU7
  157. 62 001c 1A4B ldr r3, .L3
  158. 63 001e 1A6C ldr r2, [r3, #64]
  159. 64 0020 42F08052 orr r2, r2, #268435456
  160. 65 0024 1A64 str r2, [r3, #64]
  161. 66 .loc 1 93 3 view .LVU8
  162. 67 0026 1B6C ldr r3, [r3, #64]
  163. 68 0028 03F08053 and r3, r3, #268435456
  164. 69 002c 0193 str r3, [sp, #4]
  165. 70 .loc 1 93 3 view .LVU9
  166. 71 002e 019B ldr r3, [sp, #4]
  167. 72 .LBE2:
  168. 73 .loc 1 93 3 view .LVU10
  169. 94:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  170. 74 .loc 1 94 3 view .LVU11
  171. 75 .LBB3:
  172. 76 .loc 1 94 3 view .LVU12
  173. 77 0030 0294 str r4, [sp, #8]
  174. 78 .loc 1 94 3 view .LVU13
  175. ARM GAS /tmp/cclhzA2e.s page 4
  176. 79 0032 164B ldr r3, .L3+4
  177. 80 0034 1A68 ldr r2, [r3]
  178. 81 0036 42F48042 orr r2, r2, #16384
  179. 82 003a 1A60 str r2, [r3]
  180. 83 .loc 1 94 3 view .LVU14
  181. 84 003c 1B68 ldr r3, [r3]
  182. 85 003e 03F48043 and r3, r3, #16384
  183. 86 0042 0293 str r3, [sp, #8]
  184. 87 .loc 1 94 3 view .LVU15
  185. 88 0044 029B ldr r3, [sp, #8]
  186. 89 .LBE3:
  187. 90 .loc 1 94 3 view .LVU16
  188. 95:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  189. 91 .loc 1 95 3 view .LVU17
  190. 92 .loc 1 95 36 is_stmt 0 view .LVU18
  191. 93 0046 0225 movs r5, #2
  192. 94 0048 0895 str r5, [sp, #32]
  193. 96:Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  194. 95 .loc 1 96 3 is_stmt 1 view .LVU19
  195. 96 .loc 1 96 30 is_stmt 0 view .LVU20
  196. 97 004a 0123 movs r3, #1
  197. 98 004c 0B93 str r3, [sp, #44]
  198. 97:Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  199. 99 .loc 1 97 3 is_stmt 1 view .LVU21
  200. 100 .loc 1 97 41 is_stmt 0 view .LVU22
  201. 101 004e 1023 movs r3, #16
  202. 102 0050 0C93 str r3, [sp, #48]
  203. 98:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  204. 103 .loc 1 98 3 is_stmt 1 view .LVU23
  205. 104 .loc 1 98 34 is_stmt 0 view .LVU24
  206. 105 0052 0E95 str r5, [sp, #56]
  207. 99:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  208. 106 .loc 1 99 3 is_stmt 1 view .LVU25
  209. 107 .loc 1 99 35 is_stmt 0 view .LVU26
  210. 108 0054 0F94 str r4, [sp, #60]
  211. 100:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8;
  212. 109 .loc 1 100 3 is_stmt 1 view .LVU27
  213. 110 .loc 1 100 30 is_stmt 0 view .LVU28
  214. 111 0056 0823 movs r3, #8
  215. 112 0058 1093 str r3, [sp, #64]
  216. 101:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 72;
  217. 113 .loc 1 101 3 is_stmt 1 view .LVU29
  218. 114 .loc 1 101 30 is_stmt 0 view .LVU30
  219. 115 005a 4823 movs r3, #72
  220. 116 005c 1193 str r3, [sp, #68]
  221. 102:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  222. 117 .loc 1 102 3 is_stmt 1 view .LVU31
  223. 118 .loc 1 102 30 is_stmt 0 view .LVU32
  224. 119 005e 1295 str r5, [sp, #72]
  225. 103:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 3;
  226. 120 .loc 1 103 3 is_stmt 1 view .LVU33
  227. 121 .loc 1 103 30 is_stmt 0 view .LVU34
  228. 122 0060 0323 movs r3, #3
  229. 123 0062 1393 str r3, [sp, #76]
  230. 104:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  231. 124 .loc 1 104 3 is_stmt 1 view .LVU35
  232. 105:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  233. ARM GAS /tmp/cclhzA2e.s page 5
  234. 125 .loc 1 105 3 view .LVU36
  235. 126 .loc 1 105 7 is_stmt 0 view .LVU37
  236. 127 0064 08A8 add r0, sp, #32
  237. 128 0066 FFF7FEFF bl HAL_RCC_OscConfig
  238. 129 .LVL1:
  239. 106:Src/main.c **** {
  240. 107:Src/main.c **** Error_Handler();
  241. 108:Src/main.c **** }
  242. 109:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  243. 130 .loc 1 109 3 is_stmt 1 view .LVU38
  244. 131 .loc 1 109 31 is_stmt 0 view .LVU39
  245. 132 006a 0F23 movs r3, #15
  246. 133 006c 0393 str r3, [sp, #12]
  247. 110:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  248. 111:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  249. 134 .loc 1 111 3 is_stmt 1 view .LVU40
  250. 135 .loc 1 111 34 is_stmt 0 view .LVU41
  251. 136 006e 0495 str r5, [sp, #16]
  252. 112:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  253. 137 .loc 1 112 3 is_stmt 1 view .LVU42
  254. 138 .loc 1 112 35 is_stmt 0 view .LVU43
  255. 139 0070 0594 str r4, [sp, #20]
  256. 113:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  257. 140 .loc 1 113 3 is_stmt 1 view .LVU44
  258. 141 .loc 1 113 36 is_stmt 0 view .LVU45
  259. 142 0072 4FF48053 mov r3, #4096
  260. 143 0076 0693 str r3, [sp, #24]
  261. 114:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  262. 144 .loc 1 114 3 is_stmt 1 view .LVU46
  263. 145 .loc 1 114 36 is_stmt 0 view .LVU47
  264. 146 0078 0794 str r4, [sp, #28]
  265. 115:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  266. 147 .loc 1 115 3 is_stmt 1 view .LVU48
  267. 148 .loc 1 115 7 is_stmt 0 view .LVU49
  268. 149 007a 2946 mov r1, r5
  269. 150 007c 03A8 add r0, sp, #12
  270. 151 007e FFF7FEFF bl HAL_RCC_ClockConfig
  271. 152 .LVL2:
  272. 116:Src/main.c **** {
  273. 117:Src/main.c **** Error_Handler();
  274. 118:Src/main.c **** }
  275. 119:Src/main.c **** }
  276. 153 .loc 1 119 1 view .LVU50
  277. 154 0082 15B0 add sp, sp, #84
  278. 155 .LCFI2:
  279. 156 .cfi_def_cfa_offset 12
  280. 157 @ sp needed
  281. 158 0084 30BD pop {r4, r5, pc}
  282. 159 .L4:
  283. 160 0086 00BF .align 2
  284. 161 .L3:
  285. 162 0088 00380240 .word 1073887232
  286. 163 008c 00700040 .word 1073770496
  287. 164 .cfi_endproc
  288. 165 .LFE131:
  289. 167 .global __aeabi_f2d
  290. 168 .global __aeabi_ddiv
  291. ARM GAS /tmp/cclhzA2e.s page 6
  292. 169 .global __aeabi_dmul
  293. 170 .global __aeabi_dsub
  294. 171 .global __aeabi_d2f
  295. 172 .section .text.main,"ax",%progbits
  296. 173 .align 1
  297. 174 .global main
  298. 175 .syntax unified
  299. 176 .thumb
  300. 177 .thumb_func
  301. 179 main:
  302. 180 .LFB130:
  303. 50:Src/main.c **** SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
  304. 181 .loc 1 50 1 is_stmt 1 view -0
  305. 182 .cfi_startproc
  306. 183 @ Volatile: function does not return.
  307. 184 @ args = 0, pretend = 0, frame = 0
  308. 185 @ frame_needed = 0, uses_anonymous_args = 0
  309. 186 0000 08B5 push {r3, lr}
  310. 187 .LCFI3:
  311. 188 .cfi_def_cfa_offset 8
  312. 189 .cfi_offset 3, -8
  313. 190 .cfi_offset 14, -4
  314. 51:Src/main.c **** HAL_Init();
  315. 191 .loc 1 51 3 view .LVU52
  316. 51:Src/main.c **** HAL_Init();
  317. 192 .loc 1 51 13 is_stmt 0 view .LVU53
  318. 193 0002 5B4B ldr r3, .L17
  319. 194 0004 5B4A ldr r2, .L17+4
  320. 195 0006 9A60 str r2, [r3, #8]
  321. 52:Src/main.c **** SystemClock_Config();
  322. 196 .loc 1 52 3 is_stmt 1 view .LVU54
  323. 197 0008 FFF7FEFF bl HAL_Init
  324. 198 .LVL3:
  325. 53:Src/main.c **** MX_GPIO_Init();
  326. 199 .loc 1 53 3 view .LVU55
  327. 200 000c FFF7FEFF bl SystemClock_Config
  328. 201 .LVL4:
  329. 54:Src/main.c **** MX_USART2_UART_Init();
  330. 202 .loc 1 54 3 view .LVU56
  331. 203 0010 FFF7FEFF bl MX_GPIO_Init
  332. 204 .LVL5:
  333. 55:Src/main.c **** MX_UART4_Init();
  334. 205 .loc 1 55 3 view .LVU57
  335. 206 0014 FFF7FEFF bl MX_USART2_UART_Init
  336. 207 .LVL6:
  337. 56:Src/main.c **** MX_USART1_UART_Init();
  338. 208 .loc 1 56 3 view .LVU58
  339. 209 0018 FFF7FEFF bl MX_UART4_Init
  340. 210 .LVL7:
  341. 57:Src/main.c **** MX_ADC1_Init();
  342. 211 .loc 1 57 3 view .LVU59
  343. 212 001c FFF7FEFF bl MX_USART1_UART_Init
  344. 213 .LVL8:
  345. 58:Src/main.c **** while (1)
  346. 214 .loc 1 58 3 view .LVU60
  347. 215 0020 FFF7FEFF bl MX_ADC1_Init
  348. 216 .LVL9:
  349. ARM GAS /tmp/cclhzA2e.s page 7
  350. 217 .L6:
  351. 59:Src/main.c **** {
  352. 218 .loc 1 59 3 view .LVU61
  353. 61:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 50);
  354. 219 .loc 1 61 5 view .LVU62
  355. 220 0024 544C ldr r4, .L17+8
  356. 221 0026 2046 mov r0, r4
  357. 222 0028 FFF7FEFF bl HAL_ADC_Start
  358. 223 .LVL10:
  359. 62:Src/main.c **** if(HAL_IS_BIT_SET(HAL_ADC_GetState(&hadc1), HAL_ADC_STATE_REG_EOC))
  360. 224 .loc 1 62 5 view .LVU63
  361. 225 002c 3221 movs r1, #50
  362. 226 002e 2046 mov r0, r4
  363. 227 0030 FFF7FEFF bl HAL_ADC_PollForConversion
  364. 228 .LVL11:
  365. 63:Src/main.c **** {
  366. 229 .loc 1 63 5 view .LVU64
  367. 63:Src/main.c **** {
  368. 230 .loc 1 63 8 is_stmt 0 view .LVU65
  369. 231 0034 2046 mov r0, r4
  370. 232 0036 FFF7FEFF bl HAL_ADC_GetState
  371. 233 .LVL12:
  372. 63:Src/main.c **** {
  373. 234 .loc 1 63 7 view .LVU66
  374. 235 003a 10F4007F tst r0, #512
  375. 236 003e 29D1 bne .L16
  376. 237 .L7:
  377. 76:Src/main.c **** HAL_Delay(10000);
  378. 238 .loc 1 76 5 is_stmt 1 view .LVU67
  379. 239 0040 4E4C ldr r4, .L17+12
  380. 240 0042 0A23 movs r3, #10
  381. 241 0044 0422 movs r2, #4
  382. 242 0046 2146 mov r1, r4
  383. 243 0048 4D48 ldr r0, .L17+16
  384. 244 004a FFF7FEFF bl HAL_UART_Transmit
  385. 245 .LVL13:
  386. 77:Src/main.c **** if(M4_PH<14 && tankstatus == 0)
  387. 246 .loc 1 77 5 view .LVU68
  388. 247 004e 42F21070 movw r0, #10000
  389. 248 0052 FFF7FEFF bl HAL_Delay
  390. 249 .LVL14:
  391. 78:Src/main.c **** {
  392. 250 .loc 1 78 5 view .LVU69
  393. 78:Src/main.c **** {
  394. 251 .loc 1 78 13 is_stmt 0 view .LVU70
  395. 252 0056 94ED007A vldr.32 s14, [r4]
  396. 78:Src/main.c **** {
  397. 253 .loc 1 78 7 view .LVU71
  398. 254 005a F2EE0C7A vmov.f32 s15, #1.4e+1
  399. 255 005e B4EEE77A vcmpe.f32 s14, s15
  400. 256 0062 F1EE10FA vmrs APSR_nzcv, FPSCR
  401. 257 0066 DDD5 bpl .L6
  402. 78:Src/main.c **** {
  403. 258 .loc 1 78 31 discriminator 1 view .LVU72
  404. 259 0068 464B ldr r3, .L17+20
  405. 260 006a 1B68 ldr r3, [r3]
  406. 78:Src/main.c **** {
  407. ARM GAS /tmp/cclhzA2e.s page 8
  408. 261 .loc 1 78 17 discriminator 1 view .LVU73
  409. 262 006c 002B cmp r3, #0
  410. 263 006e D9D1 bne .L6
  411. 80:Src/main.c ****
  412. 264 .loc 1 80 10 is_stmt 1 view .LVU74
  413. 265 0070 454C ldr r4, .L17+24
  414. 266 0072 0122 movs r2, #1
  415. 267 0074 4FF40041 mov r1, #32768
  416. 268 0078 2046 mov r0, r4
  417. 269 007a FFF7FEFF bl HAL_GPIO_WritePin
  418. 270 .LVL15:
  419. 82:Src/main.c ****
  420. 271 .loc 1 82 10 view .LVU75
  421. 272 007e 47F23050 movw r0, #30000
  422. 273 0082 FFF7FEFF bl HAL_Delay
  423. 274 .LVL16:
  424. 84:Src/main.c ****
  425. 275 .loc 1 84 10 view .LVU76
  426. 276 0086 0022 movs r2, #0
  427. 277 0088 4FF40041 mov r1, #32768
  428. 278 008c 2046 mov r0, r4
  429. 279 008e FFF7FEFF bl HAL_GPIO_WritePin
  430. 280 .LVL17:
  431. 281 0092 C7E7 b .L6
  432. 282 .L16:
  433. 65:Src/main.c **** M4_voltage_V = M4_AD_Value*3.3f/4096;
  434. 283 .loc 1 65 11 view .LVU77
  435. 65:Src/main.c **** M4_voltage_V = M4_AD_Value*3.3f/4096;
  436. 284 .loc 1 65 25 is_stmt 0 view .LVU78
  437. 285 0094 2046 mov r0, r4
  438. 286 0096 FFF7FEFF bl HAL_ADC_GetValue
  439. 287 .LVL18:
  440. 65:Src/main.c **** M4_voltage_V = M4_AD_Value*3.3f/4096;
  441. 288 .loc 1 65 23 view .LVU79
  442. 289 009a 80B2 uxth r0, r0
  443. 290 009c 3B4B ldr r3, .L17+28
  444. 291 009e 1880 strh r0, [r3] @ movhi
  445. 66:Src/main.c **** if (M4_voltage_V > M4_pH_mid)
  446. 292 .loc 1 66 11 is_stmt 1 view .LVU80
  447. 66:Src/main.c **** if (M4_voltage_V > M4_pH_mid)
  448. 293 .loc 1 66 37 is_stmt 0 view .LVU81
  449. 294 00a0 07EE900A vmov s15, r0 @ int
  450. 295 00a4 B8EEE78A vcvt.f32.s32 s16, s15
  451. 296 00a8 DFED397A vldr.32 s15, .L17+32
  452. 297 00ac 28EE278A vmul.f32 s16, s16, s15
  453. 66:Src/main.c **** if (M4_voltage_V > M4_pH_mid)
  454. 298 .loc 1 66 42 view .LVU82
  455. 299 00b0 DFED387A vldr.32 s15, .L17+36
  456. 300 00b4 28EE278A vmul.f32 s16, s16, s15
  457. 66:Src/main.c **** if (M4_voltage_V > M4_pH_mid)
  458. 301 .loc 1 66 24 view .LVU83
  459. 302 00b8 374B ldr r3, .L17+40
  460. 303 00ba 83ED008A vstr.32 s16, [r3]
  461. 67:Src/main.c **** {
  462. 304 .loc 1 67 11 is_stmt 1 view .LVU84
  463. 67:Src/main.c **** {
  464. 305 .loc 1 67 28 is_stmt 0 view .LVU85
  465. ARM GAS /tmp/cclhzA2e.s page 9
  466. 306 00be 374B ldr r3, .L17+44
  467. 307 00c0 D3ED008A vldr.32 s17, [r3]
  468. 67:Src/main.c **** {
  469. 308 .loc 1 67 14 view .LVU86
  470. 309 00c4 B4EEE88A vcmpe.f32 s16, s17
  471. 310 00c8 F1EE10FA vmrs APSR_nzcv, FPSCR
  472. 311 00cc 27DD ble .L14
  473. 69:Src/main.c **** }
  474. 312 .loc 1 69 16 is_stmt 1 view .LVU87
  475. 69:Src/main.c **** }
  476. 313 .loc 1 69 47 is_stmt 0 view .LVU88
  477. 314 00ce 344B ldr r3, .L17+48
  478. 315 00d0 D3ED007A vldr.32 s15, [r3]
  479. 316 00d4 77EEE87A vsub.f32 s15, s15, s17
  480. 317 00d8 17EE900A vmov r0, s15
  481. 318 00dc FFF7FEFF bl __aeabi_f2d
  482. 319 .LVL19:
  483. 320 00e0 0246 mov r2, r0
  484. 321 00e2 0B46 mov r3, r1
  485. 69:Src/main.c **** }
  486. 322 .loc 1 69 34 view .LVU89
  487. 323 00e4 0020 movs r0, #0
  488. 324 00e6 2F49 ldr r1, .L17+52
  489. 325 00e8 FFF7FEFF bl __aeabi_ddiv
  490. 326 .LVL20:
  491. 327 00ec 0446 mov r4, r0
  492. 328 00ee 0D46 mov r5, r1
  493. 69:Src/main.c **** }
  494. 329 .loc 1 69 76 view .LVU90
  495. 330 00f0 78EE687A vsub.f32 s15, s16, s17
  496. 331 00f4 17EE900A vmov r0, s15
  497. 332 00f8 FFF7FEFF bl __aeabi_f2d
  498. 333 .LVL21:
  499. 334 00fc 0246 mov r2, r0
  500. 335 00fe 0B46 mov r3, r1
  501. 69:Src/main.c **** }
  502. 336 .loc 1 69 60 view .LVU91
  503. 337 0100 2046 mov r0, r4
  504. 338 0102 2946 mov r1, r5
  505. 339 0104 FFF7FEFF bl __aeabi_dmul
  506. 340 .LVL22:
  507. 341 0108 0246 mov r2, r0
  508. 342 010a 0B46 mov r3, r1
  509. 69:Src/main.c **** }
  510. 343 .loc 1 69 28 view .LVU92
  511. 344 010c 0020 movs r0, #0
  512. 345 010e 2649 ldr r1, .L17+56
  513. 346 0110 FFF7FEFF bl __aeabi_dsub
  514. 347 .LVL23:
  515. 348 0114 FFF7FEFF bl __aeabi_d2f
  516. 349 .LVL24:
  517. 69:Src/main.c **** }
  518. 350 .loc 1 69 22 view .LVU93
  519. 351 0118 184B ldr r3, .L17+12
  520. 352 011a 1860 str r0, [r3] @ float
  521. 353 011c 90E7 b .L7
  522. 354 .L14:
  523. ARM GAS /tmp/cclhzA2e.s page 10
  524. 73:Src/main.c **** }
  525. 355 .loc 1 73 16 is_stmt 1 view .LVU94
  526. 73:Src/main.c **** }
  527. 356 .loc 1 73 47 is_stmt 0 view .LVU95
  528. 357 011e 234B ldr r3, .L17+60
  529. 358 0120 D3ED007A vldr.32 s15, [r3]
  530. 359 0124 78EEE77A vsub.f32 s15, s17, s15
  531. 360 0128 17EE900A vmov r0, s15
  532. 361 012c FFF7FEFF bl __aeabi_f2d
  533. 362 .LVL25:
  534. 363 0130 0246 mov r2, r0
  535. 364 0132 0B46 mov r3, r1
  536. 73:Src/main.c **** }
  537. 365 .loc 1 73 34 view .LVU96
  538. 366 0134 0020 movs r0, #0
  539. 367 0136 1B49 ldr r1, .L17+52
  540. 368 0138 FFF7FEFF bl __aeabi_ddiv
  541. 369 .LVL26:
  542. 370 013c 0446 mov r4, r0
  543. 371 013e 0D46 mov r5, r1
  544. 73:Src/main.c **** }
  545. 372 .loc 1 73 77 view .LVU97
  546. 373 0140 78EE687A vsub.f32 s15, s16, s17
  547. 374 0144 17EE900A vmov r0, s15
  548. 375 0148 FFF7FEFF bl __aeabi_f2d
  549. 376 .LVL27:
  550. 377 014c 0246 mov r2, r0
  551. 378 014e 0B46 mov r3, r1
  552. 73:Src/main.c **** }
  553. 379 .loc 1 73 61 view .LVU98
  554. 380 0150 2046 mov r0, r4
  555. 381 0152 2946 mov r1, r5
  556. 382 0154 FFF7FEFF bl __aeabi_dmul
  557. 383 .LVL28:
  558. 384 0158 0246 mov r2, r0
  559. 385 015a 0B46 mov r3, r1
  560. 73:Src/main.c **** }
  561. 386 .loc 1 73 28 view .LVU99
  562. 387 015c 0020 movs r0, #0
  563. 388 015e 1249 ldr r1, .L17+56
  564. 389 0160 FFF7FEFF bl __aeabi_dsub
  565. 390 .LVL29:
  566. 391 0164 FFF7FEFF bl __aeabi_d2f
  567. 392 .LVL30:
  568. 73:Src/main.c **** }
  569. 393 .loc 1 73 22 view .LVU100
  570. 394 0168 044B ldr r3, .L17+12
  571. 395 016a 1860 str r0, [r3] @ float
  572. 396 016c 68E7 b .L7
  573. 397 .L18:
  574. 398 016e 00BF .align 2
  575. 399 .L17:
  576. 400 0170 00ED00E0 .word -536810240
  577. 401 0174 00000108 .word 134283264
  578. 402 0178 00000000 .word hadc1
  579. 403 017c 00000000 .word .LANCHOR4
  580. 404 0180 00000000 .word huart4
  581. ARM GAS /tmp/cclhzA2e.s page 11
  582. 405 0184 00000000 .word .LANCHOR6
  583. 406 0188 000C0240 .word 1073875968
  584. 407 018c 00000000 .word .LANCHOR0
  585. 408 0190 33335340 .word 1079194419
  586. 409 0194 00008039 .word 964689920
  587. 410 0198 00000000 .word .LANCHOR1
  588. 411 019c 00000000 .word .LANCHOR2
  589. 412 01a0 00000000 .word .LANCHOR3
  590. 413 01a4 00000840 .word 1074266112
  591. 414 01a8 00001C40 .word 1075576832
  592. 415 01ac 00000000 .word .LANCHOR5
  593. 416 .cfi_endproc
  594. 417 .LFE130:
  595. 419 .section .text.Error_Handler,"ax",%progbits
  596. 420 .align 1
  597. 421 .global Error_Handler
  598. 422 .syntax unified
  599. 423 .thumb
  600. 424 .thumb_func
  601. 426 Error_Handler:
  602. 427 .LFB132:
  603. 120:Src/main.c **** void Error_Handler(void)
  604. 121:Src/main.c **** {
  605. 428 .loc 1 121 1 is_stmt 1 view -0
  606. 429 .cfi_startproc
  607. 430 @ args = 0, pretend = 0, frame = 0
  608. 431 @ frame_needed = 0, uses_anonymous_args = 0
  609. 432 @ link register save eliminated.
  610. 122:Src/main.c **** }
  611. 433 .loc 1 122 1 view .LVU102
  612. 434 0000 7047 bx lr
  613. 435 .cfi_endproc
  614. 436 .LFE132:
  615. 438 .global M4_PH
  616. 439 .global M4_pH_high
  617. 440 .global M4_pH_low
  618. 441 .global M4_pH_mid
  619. 442 .global M4_voltage_V
  620. 443 .global M4_AD_Value
  621. 444 .global tankstatus
  622. 445 .section .bss.M4_AD_Value,"aw",%nobits
  623. 446 .align 1
  624. 447 .set .LANCHOR0,. + 0
  625. 450 M4_AD_Value:
  626. 451 0000 0000 .space 2
  627. 452 .section .bss.M4_PH,"aw",%nobits
  628. 453 .align 2
  629. 454 .set .LANCHOR4,. + 0
  630. 457 M4_PH:
  631. 458 0000 00000000 .space 4
  632. 459 .section .bss.M4_voltage_V,"aw",%nobits
  633. 460 .align 2
  634. 461 .set .LANCHOR1,. + 0
  635. 464 M4_voltage_V:
  636. 465 0000 00000000 .space 4
  637. 466 .section .bss.tankstatus,"aw",%nobits
  638. 467 .align 2
  639. ARM GAS /tmp/cclhzA2e.s page 12
  640. 468 .set .LANCHOR6,. + 0
  641. 471 tankstatus:
  642. 472 0000 00000000 .space 4
  643. 473 .section .data.M4_pH_high,"aw"
  644. 474 .align 2
  645. 475 .set .LANCHOR5,. + 0
  646. 478 M4_pH_high:
  647. 479 0000 9A99793F .word 1064933786
  648. 480 .section .data.M4_pH_low,"aw"
  649. 481 .align 2
  650. 482 .set .LANCHOR3,. + 0
  651. 485 M4_pH_low:
  652. 486 0000 85EB0140 .word 1073867653
  653. 487 .section .data.M4_pH_mid,"aw"
  654. 488 .align 2
  655. 489 .set .LANCHOR2,. + 0
  656. 492 M4_pH_mid:
  657. 493 0000 0000C03F .word 1069547520
  658. 494 .text
  659. 495 .Letext0:
  660. 496 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  661. 497 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  662. 498 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
  663. 499 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
  664. 500 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
  665. 501 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  666. 502 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
  667. 503 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
  668. 504 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
  669. 505 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
  670. 506 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
  671. 507 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
  672. 508 .file 14 "Inc/adc.h"
  673. 509 .file 15 "Inc/usart.h"
  674. 510 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
  675. 511 .file 17 "Inc/gpio.h"
  676. 512 .file 18 "<built-in>"
  677. ARM GAS /tmp/cclhzA2e.s page 13
  678. DEFINED SYMBOLS
  679. *ABS*:0000000000000000 main.c
  680. /tmp/cclhzA2e.s:20 .text.SystemClock_Config:0000000000000000 $t
  681. /tmp/cclhzA2e.s:26 .text.SystemClock_Config:0000000000000000 SystemClock_Config
  682. /tmp/cclhzA2e.s:162 .text.SystemClock_Config:0000000000000088 $d
  683. /tmp/cclhzA2e.s:173 .text.main:0000000000000000 $t
  684. /tmp/cclhzA2e.s:179 .text.main:0000000000000000 main
  685. /tmp/cclhzA2e.s:400 .text.main:0000000000000170 $d
  686. /tmp/cclhzA2e.s:420 .text.Error_Handler:0000000000000000 $t
  687. /tmp/cclhzA2e.s:426 .text.Error_Handler:0000000000000000 Error_Handler
  688. /tmp/cclhzA2e.s:457 .bss.M4_PH:0000000000000000 M4_PH
  689. /tmp/cclhzA2e.s:478 .data.M4_pH_high:0000000000000000 M4_pH_high
  690. /tmp/cclhzA2e.s:485 .data.M4_pH_low:0000000000000000 M4_pH_low
  691. /tmp/cclhzA2e.s:492 .data.M4_pH_mid:0000000000000000 M4_pH_mid
  692. /tmp/cclhzA2e.s:464 .bss.M4_voltage_V:0000000000000000 M4_voltage_V
  693. /tmp/cclhzA2e.s:450 .bss.M4_AD_Value:0000000000000000 M4_AD_Value
  694. /tmp/cclhzA2e.s:471 .bss.tankstatus:0000000000000000 tankstatus
  695. /tmp/cclhzA2e.s:446 .bss.M4_AD_Value:0000000000000000 $d
  696. /tmp/cclhzA2e.s:453 .bss.M4_PH:0000000000000000 $d
  697. /tmp/cclhzA2e.s:460 .bss.M4_voltage_V:0000000000000000 $d
  698. /tmp/cclhzA2e.s:467 .bss.tankstatus:0000000000000000 $d
  699. /tmp/cclhzA2e.s:474 .data.M4_pH_high:0000000000000000 $d
  700. /tmp/cclhzA2e.s:481 .data.M4_pH_low:0000000000000000 $d
  701. /tmp/cclhzA2e.s:488 .data.M4_pH_mid:0000000000000000 $d
  702. UNDEFINED SYMBOLS
  703. memset
  704. HAL_RCC_OscConfig
  705. HAL_RCC_ClockConfig
  706. __aeabi_f2d
  707. __aeabi_ddiv
  708. __aeabi_dmul
  709. __aeabi_dsub
  710. __aeabi_d2f
  711. HAL_Init
  712. MX_GPIO_Init
  713. MX_USART2_UART_Init
  714. MX_UART4_Init
  715. MX_USART1_UART_Init
  716. MX_ADC1_Init
  717. HAL_ADC_Start
  718. HAL_ADC_PollForConversion
  719. HAL_ADC_GetState
  720. HAL_UART_Transmit
  721. HAL_Delay
  722. HAL_GPIO_WritePin
  723. HAL_ADC_GetValue
  724. hadc1
  725. huart4