stm32f4xx_hal_rcc.lst 206 KB

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  1. ARM GAS /tmp/ccrUqvu4.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 1
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "stm32f4xx_hal_rcc.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.HAL_RCC_DeInit,"ax",%progbits
  21. 20 .align 1
  22. 21 .weak HAL_RCC_DeInit
  23. 22 .syntax unified
  24. 23 .thumb
  25. 24 .thumb_func
  26. 26 HAL_RCC_DeInit:
  27. 27 .LFB130:
  28. 28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c"
  29. 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  30. 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
  31. 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @file stm32f4xx_hal_rcc.c
  32. 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @author MCD Application Team
  33. 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver.
  34. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This file provides firmware functions to manage the following
  35. 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral:
  36. 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Initialization and de-initialization functions
  37. 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Peripheral Control functions
  38. 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  39. 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
  40. 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
  41. 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC specific features #####
  42. 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
  43. 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  44. 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator
  45. 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
  46. 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal
  47. 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SRAM, Flash and JTAG.
  48. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
  49. 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** all peripherals mapped on these busses are running at HSI speed.
  50. 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
  51. 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which
  52. 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** are assigned to be used for debug purpose.
  53. 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  54. 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  55. 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Once the device started from reset, the user application has to:
  56. 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock
  57. 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance)
  58. 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
  59. ARM GAS /tmp/ccrUqvu4.s page 2
  60. 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers
  61. 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used
  62. 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not
  63. 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
  64. 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  65. 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC Limitations #####
  66. 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ==============================================================================
  67. 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  68. 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral
  69. 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write
  70. 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from/to registers.
  71. 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping.
  72. 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
  73. 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register
  74. 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
  75. 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register
  76. 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  77. 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  78. 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Implemented Workaround:
  79. 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) For AHB & APB peripherals, a dummy read to the peripheral register has been
  80. 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
  81. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  82. 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
  83. 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
  84. 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @attention
  85. 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  86. 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  87. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * All rights reserved.</center></h2>
  88. 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  89. 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license,
  90. 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the
  91. 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * License. You may obtain a copy of the License at:
  92. 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause
  93. 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  94. 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ******************************************************************************
  95. 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  96. 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  97. 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
  98. 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h"
  99. 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  100. 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver
  101. 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  102. 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  103. 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  104. 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC
  105. 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver
  106. 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  107. 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  108. 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  109. 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
  110. 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  111. 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
  112. 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
  113. 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants
  114. 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  115. 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  116. 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  117. ARM GAS /tmp/ccrUqvu4.s page 3
  118. 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
  119. 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  120. 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
  121. 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8
  122. 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  123. 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  124. 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT GPIOC
  125. 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN GPIO_PIN_9
  126. 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  127. 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
  128. 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  129. 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  130. 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
  131. 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
  132. 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  133. 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  134. 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  135. 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
  136. 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  137. 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
  138. 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/
  139. 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  140. 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
  141. 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  142. 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  143. 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  144. 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
  145. 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initialization and Configuration functions
  146. 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  147. 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
  148. 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
  149. 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Initialization and de-initialization functions #####
  150. 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
  151. 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  152. 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators
  153. 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
  154. 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and APB2).
  155. 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  156. 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration
  157. 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
  158. 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the PLL as System clock source.
  159. 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  160. 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
  161. 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source.
  162. 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  163. 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
  164. 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source.
  165. 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  166. 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
  167. 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  168. 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
  169. 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 168 MHz)
  170. 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
  171. 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
  172. 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  173. 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
  174. 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
  175. ARM GAS /tmp/ccrUqvu4.s page 4
  176. 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt
  177. 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
  178. 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector.
  179. 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  180. 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
  181. 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PA8 pin.
  182. 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  183. 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
  184. 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PC9 pin.
  185. 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  186. 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] System, AHB and APB busses clocks configuration
  187. 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
  188. 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HSE and PLL.
  189. 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable
  190. 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped
  191. 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
  192. 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock
  193. 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the peripherals mapped on these busses. You can use
  194. 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
  195. 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  196. 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
  197. 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
  198. 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
  199. 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
  200. 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  201. 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices,
  202. 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz
  203. 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
  204. 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
  205. 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  206. 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
  207. 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 84 MHz and PCLK1 42 MHz.
  208. 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
  209. 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
  210. 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  211. 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz,
  212. 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 100 MHz and PCLK1 50 MHz.
  213. 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should
  214. 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details).
  215. 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  216. 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
  217. 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  218. 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  219. 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  220. 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  221. 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state.
  222. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below:
  223. 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSI ON and used as system clock source
  224. 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSE and PLL OFF
  225. 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1.
  226. 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - CSS, MCO1 and MCO2 OFF
  227. 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - All interrupts disabled
  228. 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the
  229. 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - Peripheral clocks
  230. 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks
  231. 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status
  232. 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  233. ARM GAS /tmp/ccrUqvu4.s page 5
  234. 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void)
  235. 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  236. 29 .loc 1 203 1 view -0
  237. 30 .cfi_startproc
  238. 31 @ args = 0, pretend = 0, frame = 0
  239. 32 @ frame_needed = 0, uses_anonymous_args = 0
  240. 33 @ link register save eliminated.
  241. 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
  242. 34 .loc 1 204 3 view .LVU1
  243. 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  244. 35 .loc 1 205 1 is_stmt 0 view .LVU2
  245. 36 0000 0020 movs r0, #0
  246. 37 0002 7047 bx lr
  247. 38 .cfi_endproc
  248. 39 .LFE130:
  249. 41 .section .text.HAL_RCC_OscConfig,"ax",%progbits
  250. 42 .align 1
  251. 43 .weak HAL_RCC_OscConfig
  252. 44 .syntax unified
  253. 45 .thumb
  254. 46 .thumb_func
  255. 48 HAL_RCC_OscConfig:
  256. 49 .LVL0:
  257. 50 .LFB131:
  258. 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  259. 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  260. 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the
  261. 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC_OscInitTypeDef.
  262. 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
  263. 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators.
  264. 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock.
  265. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
  266. 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to LSE Off
  267. 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass.
  268. 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
  269. 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to HSE Off
  270. 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass.
  271. 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status
  272. 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  273. 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
  274. 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  275. 51 .loc 1 222 1 is_stmt 1 view -0
  276. 52 .cfi_startproc
  277. 53 @ args = 0, pretend = 0, frame = 8
  278. 54 @ frame_needed = 0, uses_anonymous_args = 0
  279. 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
  280. 55 .loc 1 223 3 view .LVU4
  281. 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  282. 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */
  283. 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL)
  284. 56 .loc 1 226 3 view .LVU5
  285. 57 .loc 1 226 5 is_stmt 0 view .LVU6
  286. 58 0000 0028 cmp r0, #0
  287. 59 0002 00F0BA81 beq .L51
  288. 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
  289. 60 .loc 1 222 1 view .LVU7
  290. 61 0006 70B5 push {r4, r5, r6, lr}
  291. ARM GAS /tmp/ccrUqvu4.s page 6
  292. 62 .LCFI0:
  293. 63 .cfi_def_cfa_offset 16
  294. 64 .cfi_offset 4, -16
  295. 65 .cfi_offset 5, -12
  296. 66 .cfi_offset 6, -8
  297. 67 .cfi_offset 14, -4
  298. 68 0008 82B0 sub sp, sp, #8
  299. 69 .LCFI1:
  300. 70 .cfi_def_cfa_offset 24
  301. 71 000a 0446 mov r4, r0
  302. 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  303. 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  304. 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  305. 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  306. 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  307. 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  308. 72 .loc 1 232 3 is_stmt 1 view .LVU8
  309. 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/
  310. 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  311. 73 .loc 1 234 3 view .LVU9
  312. 74 .loc 1 234 25 is_stmt 0 view .LVU10
  313. 75 000c 0368 ldr r3, [r0]
  314. 76 .loc 1 234 5 view .LVU11
  315. 77 000e 13F0010F tst r3, #1
  316. 78 0012 3BD0 beq .L4
  317. 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  318. 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  319. 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
  320. 79 .loc 1 237 5 is_stmt 1 view .LVU12
  321. 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis
  322. 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
  323. 80 .loc 1 239 5 view .LVU13
  324. 81 .loc 1 239 9 is_stmt 0 view .LVU14
  325. 82 0014 9F4B ldr r3, .L87
  326. 83 0016 9B68 ldr r3, [r3, #8]
  327. 84 0018 03F00C03 and r3, r3, #12
  328. 85 .loc 1 239 7 view .LVU15
  329. 86 001c 042B cmp r3, #4
  330. 87 001e 2CD0 beq .L5
  331. 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC)
  332. 88 .loc 1 240 9 discriminator 1 view .LVU16
  333. 89 0020 9C4B ldr r3, .L87
  334. 90 0022 9B68 ldr r3, [r3, #8]
  335. 91 0024 03F00C03 and r3, r3, #12
  336. 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC)
  337. 92 .loc 1 239 60 discriminator 1 view .LVU17
  338. 93 0028 082B cmp r3, #8
  339. 94 002a 21D0 beq .L73
  340. 95 .L6:
  341. 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  342. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_
  343. 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  344. 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  345. 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  346. 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  347. 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  348. 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  349. ARM GAS /tmp/ccrUqvu4.s page 7
  350. 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/
  351. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  352. 96 .loc 1 250 7 is_stmt 1 view .LVU18
  353. 97 .loc 1 250 7 view .LVU19
  354. 98 002c 6368 ldr r3, [r4, #4]
  355. 99 002e B3F5803F cmp r3, #65536
  356. 100 0032 4FD0 beq .L74
  357. 101 .loc 1 250 7 discriminator 2 view .LVU20
  358. 102 0034 B3F5A02F cmp r3, #327680
  359. 103 0038 52D0 beq .L75
  360. 104 .loc 1 250 7 discriminator 5 view .LVU21
  361. 105 003a 964B ldr r3, .L87
  362. 106 003c 1A68 ldr r2, [r3]
  363. 107 003e 22F48032 bic r2, r2, #65536
  364. 108 0042 1A60 str r2, [r3]
  365. 109 .loc 1 250 7 discriminator 5 view .LVU22
  366. 110 0044 1A68 ldr r2, [r3]
  367. 111 0046 22F48022 bic r2, r2, #262144
  368. 112 004a 1A60 str r2, [r3]
  369. 113 .L8:
  370. 114 .loc 1 250 7 discriminator 7 view .LVU23
  371. 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  372. 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE State */
  373. 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
  374. 115 .loc 1 253 7 discriminator 7 view .LVU24
  375. 116 .loc 1 253 28 is_stmt 0 discriminator 7 view .LVU25
  376. 117 004c 6368 ldr r3, [r4, #4]
  377. 118 .loc 1 253 9 discriminator 7 view .LVU26
  378. 119 004e 002B cmp r3, #0
  379. 120 0050 50D0 beq .L10
  380. 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  381. 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  382. 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  383. 121 .loc 1 256 9 is_stmt 1 view .LVU27
  384. 122 .loc 1 256 21 is_stmt 0 view .LVU28
  385. 123 0052 FFF7FEFF bl HAL_GetTick
  386. 124 .LVL1:
  387. 125 .loc 1 256 21 view .LVU29
  388. 126 0056 0546 mov r5, r0
  389. 127 .LVL2:
  390. 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  391. 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is ready */
  392. 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  393. 128 .loc 1 259 9 is_stmt 1 view .LVU30
  394. 129 .L11:
  395. 130 .loc 1 259 14 view .LVU31
  396. 131 .loc 1 259 15 is_stmt 0 view .LVU32
  397. 132 0058 8E4B ldr r3, .L87
  398. 133 005a 1B68 ldr r3, [r3]
  399. 134 .loc 1 259 14 view .LVU33
  400. 135 005c 13F4003F tst r3, #131072
  401. 136 0060 14D1 bne .L4
  402. 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  403. 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  404. 137 .loc 1 261 11 is_stmt 1 view .LVU34
  405. 138 .loc 1 261 15 is_stmt 0 view .LVU35
  406. 139 0062 FFF7FEFF bl HAL_GetTick
  407. ARM GAS /tmp/ccrUqvu4.s page 8
  408. 140 .LVL3:
  409. 141 .loc 1 261 29 view .LVU36
  410. 142 0066 401B subs r0, r0, r5
  411. 143 .loc 1 261 13 view .LVU37
  412. 144 0068 6428 cmp r0, #100
  413. 145 006a F5D9 bls .L11
  414. 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  415. 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  416. 146 .loc 1 263 20 view .LVU38
  417. 147 006c 0320 movs r0, #3
  418. 148 006e 8BE1 b .L3
  419. 149 .LVL4:
  420. 150 .L73:
  421. 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  422. 151 .loc 1 240 68 view .LVU39
  423. 152 0070 884B ldr r3, .L87
  424. 153 0072 5B68 ldr r3, [r3, #4]
  425. 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  426. 154 .loc 1 240 60 view .LVU40
  427. 155 0074 13F4800F tst r3, #4194304
  428. 156 0078 D8D0 beq .L6
  429. 157 .L5:
  430. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  431. 158 .loc 1 242 7 is_stmt 1 view .LVU41
  432. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  433. 159 .loc 1 242 11 is_stmt 0 view .LVU42
  434. 160 007a 864B ldr r3, .L87
  435. 161 007c 1B68 ldr r3, [r3]
  436. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  437. 162 .loc 1 242 9 view .LVU43
  438. 163 007e 13F4003F tst r3, #131072
  439. 164 0082 03D0 beq .L4
  440. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  441. 165 .loc 1 242 78 discriminator 1 view .LVU44
  442. 166 0084 6368 ldr r3, [r4, #4]
  443. 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  444. 167 .loc 1 242 57 discriminator 1 view .LVU45
  445. 168 0086 002B cmp r3, #0
  446. 169 0088 00F07981 beq .L76
  447. 170 .LVL5:
  448. 171 .L4:
  449. 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  450. 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  451. 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  452. 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  453. 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  454. 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  455. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  456. 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  457. 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is bypassed or disabled */
  458. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
  459. 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  460. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  461. 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  462. 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  463. 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  464. 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  465. ARM GAS /tmp/ccrUqvu4.s page 9
  466. 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  467. 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  468. 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  469. 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/
  470. 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
  471. 172 .loc 1 284 3 is_stmt 1 view .LVU46
  472. 173 .loc 1 284 25 is_stmt 0 view .LVU47
  473. 174 008c 2368 ldr r3, [r4]
  474. 175 .loc 1 284 5 view .LVU48
  475. 176 008e 13F0020F tst r3, #2
  476. 177 0092 54D0 beq .L15
  477. 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  478. 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  479. 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
  480. 178 .loc 1 287 5 is_stmt 1 view .LVU49
  481. 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
  482. 179 .loc 1 288 5 view .LVU50
  483. 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  484. 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
  485. 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
  486. 180 .loc 1 291 5 view .LVU51
  487. 181 .loc 1 291 9 is_stmt 0 view .LVU52
  488. 182 0094 7F4B ldr r3, .L87
  489. 183 0096 9B68 ldr r3, [r3, #8]
  490. 184 .loc 1 291 7 view .LVU53
  491. 185 0098 13F00C0F tst r3, #12
  492. 186 009c 3ED0 beq .L16
  493. 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC)
  494. 187 .loc 1 292 9 discriminator 1 view .LVU54
  495. 188 009e 7D4B ldr r3, .L87
  496. 189 00a0 9B68 ldr r3, [r3, #8]
  497. 190 00a2 03F00C03 and r3, r3, #12
  498. 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC)
  499. 191 .loc 1 291 60 discriminator 1 view .LVU55
  500. 192 00a6 082B cmp r3, #8
  501. 193 00a8 33D0 beq .L77
  502. 194 .L17:
  503. 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  504. 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */
  505. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_
  506. 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  507. 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  508. 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  509. 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */
  510. 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  511. 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  512. 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
  513. 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  514. 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  515. 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  516. 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  517. 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  518. 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI State */
  519. 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
  520. 195 .loc 1 309 7 is_stmt 1 view .LVU56
  521. 196 .loc 1 309 28 is_stmt 0 view .LVU57
  522. 197 00aa E368 ldr r3, [r4, #12]
  523. ARM GAS /tmp/ccrUqvu4.s page 10
  524. 198 .loc 1 309 9 view .LVU58
  525. 199 00ac 002B cmp r3, #0
  526. 200 00ae 68D0 beq .L19
  527. 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  528. 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */
  529. 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE();
  530. 201 .loc 1 312 9 is_stmt 1 view .LVU59
  531. 202 00b0 794B ldr r3, .L87+4
  532. 203 00b2 0122 movs r2, #1
  533. 204 00b4 1A60 str r2, [r3]
  534. 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  535. 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
  536. 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  537. 205 .loc 1 315 9 view .LVU60
  538. 206 .loc 1 315 21 is_stmt 0 view .LVU61
  539. 207 00b6 FFF7FEFF bl HAL_GetTick
  540. 208 .LVL6:
  541. 209 00ba 0546 mov r5, r0
  542. 210 .LVL7:
  543. 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  544. 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */
  545. 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  546. 211 .loc 1 318 9 is_stmt 1 view .LVU62
  547. 212 .L20:
  548. 213 .loc 1 318 14 view .LVU63
  549. 214 .loc 1 318 15 is_stmt 0 view .LVU64
  550. 215 00bc 754B ldr r3, .L87
  551. 216 00be 1B68 ldr r3, [r3]
  552. 217 .loc 1 318 14 view .LVU65
  553. 218 00c0 13F0020F tst r3, #2
  554. 219 00c4 54D1 bne .L78
  555. 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  556. 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  557. 220 .loc 1 320 11 is_stmt 1 view .LVU66
  558. 221 .loc 1 320 15 is_stmt 0 view .LVU67
  559. 222 00c6 FFF7FEFF bl HAL_GetTick
  560. 223 .LVL8:
  561. 224 .loc 1 320 29 view .LVU68
  562. 225 00ca 401B subs r0, r0, r5
  563. 226 .loc 1 320 13 view .LVU69
  564. 227 00cc 0228 cmp r0, #2
  565. 228 00ce F5D9 bls .L20
  566. 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  567. 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  568. 229 .loc 1 322 20 view .LVU70
  569. 230 00d0 0320 movs r0, #3
  570. 231 00d2 59E1 b .L3
  571. 232 .LVL9:
  572. 233 .L74:
  573. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  574. 234 .loc 1 250 7 is_stmt 1 discriminator 1 view .LVU71
  575. 235 00d4 6F4A ldr r2, .L87
  576. 236 00d6 1368 ldr r3, [r2]
  577. 237 00d8 43F48033 orr r3, r3, #65536
  578. 238 00dc 1360 str r3, [r2]
  579. 239 00de B5E7 b .L8
  580. 240 .L75:
  581. ARM GAS /tmp/ccrUqvu4.s page 11
  582. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  583. 241 .loc 1 250 7 discriminator 4 view .LVU72
  584. 242 00e0 6C4B ldr r3, .L87
  585. 243 00e2 1A68 ldr r2, [r3]
  586. 244 00e4 42F48022 orr r2, r2, #262144
  587. 245 00e8 1A60 str r2, [r3]
  588. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  589. 246 .loc 1 250 7 discriminator 4 view .LVU73
  590. 247 00ea 1A68 ldr r2, [r3]
  591. 248 00ec 42F48032 orr r2, r2, #65536
  592. 249 00f0 1A60 str r2, [r3]
  593. 250 00f2 ABE7 b .L8
  594. 251 .L10:
  595. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  596. 252 .loc 1 270 9 view .LVU74
  597. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  598. 253 .loc 1 270 21 is_stmt 0 view .LVU75
  599. 254 00f4 FFF7FEFF bl HAL_GetTick
  600. 255 .LVL10:
  601. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  602. 256 .loc 1 270 21 view .LVU76
  603. 257 00f8 0546 mov r5, r0
  604. 258 .LVL11:
  605. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  606. 259 .loc 1 273 9 is_stmt 1 view .LVU77
  607. 260 .L13:
  608. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  609. 261 .loc 1 273 14 view .LVU78
  610. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  611. 262 .loc 1 273 15 is_stmt 0 view .LVU79
  612. 263 00fa 664B ldr r3, .L87
  613. 264 00fc 1B68 ldr r3, [r3]
  614. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  615. 265 .loc 1 273 14 view .LVU80
  616. 266 00fe 13F4003F tst r3, #131072
  617. 267 0102 C3D0 beq .L4
  618. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  619. 268 .loc 1 275 11 is_stmt 1 view .LVU81
  620. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  621. 269 .loc 1 275 15 is_stmt 0 view .LVU82
  622. 270 0104 FFF7FEFF bl HAL_GetTick
  623. 271 .LVL12:
  624. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  625. 272 .loc 1 275 29 view .LVU83
  626. 273 0108 401B subs r0, r0, r5
  627. 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  628. 274 .loc 1 275 13 view .LVU84
  629. 275 010a 6428 cmp r0, #100
  630. 276 010c F5D9 bls .L13
  631. 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  632. 277 .loc 1 277 20 view .LVU85
  633. 278 010e 0320 movs r0, #3
  634. 279 0110 3AE1 b .L3
  635. 280 .LVL13:
  636. 281 .L77:
  637. 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  638. 282 .loc 1 292 68 view .LVU86
  639. ARM GAS /tmp/ccrUqvu4.s page 12
  640. 283 0112 604B ldr r3, .L87
  641. 284 0114 5B68 ldr r3, [r3, #4]
  642. 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  643. 285 .loc 1 292 60 view .LVU87
  644. 286 0116 13F4800F tst r3, #4194304
  645. 287 011a C6D1 bne .L17
  646. 288 .L16:
  647. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  648. 289 .loc 1 295 7 is_stmt 1 view .LVU88
  649. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  650. 290 .loc 1 295 11 is_stmt 0 view .LVU89
  651. 291 011c 5D4B ldr r3, .L87
  652. 292 011e 1B68 ldr r3, [r3]
  653. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  654. 293 .loc 1 295 9 view .LVU90
  655. 294 0120 13F0020F tst r3, #2
  656. 295 0124 03D0 beq .L18
  657. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  658. 296 .loc 1 295 78 discriminator 1 view .LVU91
  659. 297 0126 E368 ldr r3, [r4, #12]
  660. 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  661. 298 .loc 1 295 57 discriminator 1 view .LVU92
  662. 299 0128 012B cmp r3, #1
  663. 300 012a 40F02A81 bne .L55
  664. 301 .L18:
  665. 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  666. 302 .loc 1 303 9 is_stmt 1 view .LVU93
  667. 303 012e 594A ldr r2, .L87
  668. 304 0130 1368 ldr r3, [r2]
  669. 305 0132 23F0F803 bic r3, r3, #248
  670. 306 0136 2169 ldr r1, [r4, #16]
  671. 307 0138 43EAC103 orr r3, r3, r1, lsl #3
  672. 308 013c 1360 str r3, [r2]
  673. 309 .L15:
  674. 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  675. 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  676. 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  677. 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
  678. 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  679. 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  680. 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  681. 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  682. 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */
  683. 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE();
  684. 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  685. 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
  686. 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  687. 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  688. 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */
  689. 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
  690. 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  691. 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  692. 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  693. 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  694. 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  695. 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  696. 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  697. ARM GAS /tmp/ccrUqvu4.s page 13
  698. 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  699. 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  700. 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/
  701. 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
  702. 310 .loc 1 349 3 view .LVU94
  703. 311 .loc 1 349 25 is_stmt 0 view .LVU95
  704. 312 013e 2368 ldr r3, [r4]
  705. 313 .loc 1 349 5 view .LVU96
  706. 314 0140 13F0080F tst r3, #8
  707. 315 0144 42D0 beq .L24
  708. 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  709. 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  710. 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
  711. 316 .loc 1 352 5 is_stmt 1 view .LVU97
  712. 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  713. 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSI State */
  714. 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
  715. 317 .loc 1 355 5 view .LVU98
  716. 318 .loc 1 355 26 is_stmt 0 view .LVU99
  717. 319 0146 6369 ldr r3, [r4, #20]
  718. 320 .loc 1 355 7 view .LVU100
  719. 321 0148 6BB3 cbz r3, .L25
  720. 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  721. 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */
  722. 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE();
  723. 322 .loc 1 358 7 is_stmt 1 view .LVU101
  724. 323 014a 534B ldr r3, .L87+4
  725. 324 014c 0122 movs r2, #1
  726. 325 014e C3F8802E str r2, [r3, #3712]
  727. 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  728. 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
  729. 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  730. 326 .loc 1 361 7 view .LVU102
  731. 327 .loc 1 361 19 is_stmt 0 view .LVU103
  732. 328 0152 FFF7FEFF bl HAL_GetTick
  733. 329 .LVL14:
  734. 330 0156 0546 mov r5, r0
  735. 331 .LVL15:
  736. 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  737. 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */
  738. 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
  739. 332 .loc 1 364 7 is_stmt 1 view .LVU104
  740. 333 .L26:
  741. 334 .loc 1 364 12 view .LVU105
  742. 335 .loc 1 364 13 is_stmt 0 view .LVU106
  743. 336 0158 4E4B ldr r3, .L87
  744. 337 015a 5B6F ldr r3, [r3, #116]
  745. 338 .loc 1 364 12 view .LVU107
  746. 339 015c 13F0020F tst r3, #2
  747. 340 0160 34D1 bne .L24
  748. 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  749. 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  750. 341 .loc 1 366 9 is_stmt 1 view .LVU108
  751. 342 .loc 1 366 13 is_stmt 0 view .LVU109
  752. 343 0162 FFF7FEFF bl HAL_GetTick
  753. 344 .LVL16:
  754. 345 .loc 1 366 27 view .LVU110
  755. ARM GAS /tmp/ccrUqvu4.s page 14
  756. 346 0166 401B subs r0, r0, r5
  757. 347 .loc 1 366 11 view .LVU111
  758. 348 0168 0228 cmp r0, #2
  759. 349 016a F5D9 bls .L26
  760. 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  761. 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  762. 350 .loc 1 368 18 view .LVU112
  763. 351 016c 0320 movs r0, #3
  764. 352 016e 0BE1 b .L3
  765. 353 .L78:
  766. 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  767. 354 .loc 1 327 9 is_stmt 1 view .LVU113
  768. 355 0170 484A ldr r2, .L87
  769. 356 0172 1368 ldr r3, [r2]
  770. 357 0174 23F0F803 bic r3, r3, #248
  771. 358 0178 2169 ldr r1, [r4, #16]
  772. 359 017a 43EAC103 orr r3, r3, r1, lsl #3
  773. 360 017e 1360 str r3, [r2]
  774. 361 0180 DDE7 b .L15
  775. 362 .LVL17:
  776. 363 .L19:
  777. 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  778. 364 .loc 1 332 9 view .LVU114
  779. 365 0182 454B ldr r3, .L87+4
  780. 366 0184 0022 movs r2, #0
  781. 367 0186 1A60 str r2, [r3]
  782. 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  783. 368 .loc 1 335 9 view .LVU115
  784. 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  785. 369 .loc 1 335 21 is_stmt 0 view .LVU116
  786. 370 0188 FFF7FEFF bl HAL_GetTick
  787. 371 .LVL18:
  788. 372 018c 0546 mov r5, r0
  789. 373 .LVL19:
  790. 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  791. 374 .loc 1 338 9 is_stmt 1 view .LVU117
  792. 375 .L22:
  793. 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  794. 376 .loc 1 338 14 view .LVU118
  795. 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  796. 377 .loc 1 338 15 is_stmt 0 view .LVU119
  797. 378 018e 414B ldr r3, .L87
  798. 379 0190 1B68 ldr r3, [r3]
  799. 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  800. 380 .loc 1 338 14 view .LVU120
  801. 381 0192 13F0020F tst r3, #2
  802. 382 0196 D2D0 beq .L15
  803. 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  804. 383 .loc 1 340 11 is_stmt 1 view .LVU121
  805. 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  806. 384 .loc 1 340 15 is_stmt 0 view .LVU122
  807. 385 0198 FFF7FEFF bl HAL_GetTick
  808. 386 .LVL20:
  809. 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  810. 387 .loc 1 340 29 view .LVU123
  811. 388 019c 401B subs r0, r0, r5
  812. 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  813. ARM GAS /tmp/ccrUqvu4.s page 15
  814. 389 .loc 1 340 13 view .LVU124
  815. 390 019e 0228 cmp r0, #2
  816. 391 01a0 F5D9 bls .L22
  817. 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  818. 392 .loc 1 342 20 view .LVU125
  819. 393 01a2 0320 movs r0, #3
  820. 394 01a4 F0E0 b .L3
  821. 395 .LVL21:
  822. 396 .L25:
  823. 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  824. 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  825. 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  826. 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  827. 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  828. 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */
  829. 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE();
  830. 397 .loc 1 375 7 is_stmt 1 view .LVU126
  831. 398 01a6 3C4B ldr r3, .L87+4
  832. 399 01a8 0022 movs r2, #0
  833. 400 01aa C3F8802E str r2, [r3, #3712]
  834. 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  835. 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  836. 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  837. 401 .loc 1 378 7 view .LVU127
  838. 402 .loc 1 378 19 is_stmt 0 view .LVU128
  839. 403 01ae FFF7FEFF bl HAL_GetTick
  840. 404 .LVL22:
  841. 405 01b2 0546 mov r5, r0
  842. 406 .LVL23:
  843. 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  844. 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */
  845. 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
  846. 407 .loc 1 381 7 is_stmt 1 view .LVU129
  847. 408 .L28:
  848. 409 .loc 1 381 12 view .LVU130
  849. 410 .loc 1 381 13 is_stmt 0 view .LVU131
  850. 411 01b4 374B ldr r3, .L87
  851. 412 01b6 5B6F ldr r3, [r3, #116]
  852. 413 .loc 1 381 12 view .LVU132
  853. 414 01b8 13F0020F tst r3, #2
  854. 415 01bc 06D0 beq .L24
  855. 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  856. 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  857. 416 .loc 1 383 9 is_stmt 1 view .LVU133
  858. 417 .loc 1 383 13 is_stmt 0 view .LVU134
  859. 418 01be FFF7FEFF bl HAL_GetTick
  860. 419 .LVL24:
  861. 420 .loc 1 383 27 view .LVU135
  862. 421 01c2 401B subs r0, r0, r5
  863. 422 .loc 1 383 11 view .LVU136
  864. 423 01c4 0228 cmp r0, #2
  865. 424 01c6 F5D9 bls .L28
  866. 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  867. 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  868. 425 .loc 1 385 18 view .LVU137
  869. 426 01c8 0320 movs r0, #3
  870. 427 01ca DDE0 b .L3
  871. ARM GAS /tmp/ccrUqvu4.s page 16
  872. 428 .LVL25:
  873. 429 .L24:
  874. 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  875. 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  876. 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  877. 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  878. 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/
  879. 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
  880. 430 .loc 1 391 3 is_stmt 1 view .LVU138
  881. 431 .loc 1 391 25 is_stmt 0 view .LVU139
  882. 432 01cc 2368 ldr r3, [r4]
  883. 433 .loc 1 391 5 view .LVU140
  884. 434 01ce 13F0040F tst r3, #4
  885. 435 01d2 77D0 beq .L30
  886. 436 .LBB2:
  887. 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  888. 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET;
  889. 437 .loc 1 393 5 is_stmt 1 view .LVU141
  890. 438 .LVL26:
  891. 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  892. 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  893. 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
  894. 439 .loc 1 396 5 view .LVU142
  895. 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  896. 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */
  897. 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */
  898. 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  899. 440 .loc 1 400 5 view .LVU143
  900. 441 .loc 1 400 8 is_stmt 0 view .LVU144
  901. 442 01d4 2F4B ldr r3, .L87
  902. 443 01d6 1B6C ldr r3, [r3, #64]
  903. 444 .loc 1 400 7 view .LVU145
  904. 445 01d8 13F0805F tst r3, #268435456
  905. 446 01dc 33D1 bne .L60
  906. 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  907. 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE();
  908. 447 .loc 1 402 7 is_stmt 1 view .LVU146
  909. 448 .LBB3:
  910. 449 .loc 1 402 7 view .LVU147
  911. 450 01de 0023 movs r3, #0
  912. 451 01e0 0193 str r3, [sp, #4]
  913. 452 .loc 1 402 7 view .LVU148
  914. 453 01e2 2C4B ldr r3, .L87
  915. 454 01e4 1A6C ldr r2, [r3, #64]
  916. 455 01e6 42F08052 orr r2, r2, #268435456
  917. 456 01ea 1A64 str r2, [r3, #64]
  918. 457 .loc 1 402 7 view .LVU149
  919. 458 01ec 1B6C ldr r3, [r3, #64]
  920. 459 01ee 03F08053 and r3, r3, #268435456
  921. 460 01f2 0193 str r3, [sp, #4]
  922. 461 .loc 1 402 7 view .LVU150
  923. 462 01f4 019B ldr r3, [sp, #4]
  924. 463 .LBE3:
  925. 464 .loc 1 402 7 view .LVU151
  926. 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pwrclkchanged = SET;
  927. 465 .loc 1 403 7 view .LVU152
  928. 466 .LVL27:
  929. ARM GAS /tmp/ccrUqvu4.s page 17
  930. 467 .loc 1 403 21 is_stmt 0 view .LVU153
  931. 468 01f6 0125 movs r5, #1
  932. 469 .LVL28:
  933. 470 .L31:
  934. 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  935. 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  936. 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  937. 471 .loc 1 406 5 is_stmt 1 view .LVU154
  938. 472 .loc 1 406 8 is_stmt 0 view .LVU155
  939. 473 01f8 284B ldr r3, .L87+8
  940. 474 01fa 1B68 ldr r3, [r3]
  941. 475 .loc 1 406 7 view .LVU156
  942. 476 01fc 13F4807F tst r3, #256
  943. 477 0200 23D0 beq .L79
  944. 478 .L32:
  945. 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  946. 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable write access to Backup domain */
  947. 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
  948. 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  949. 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */
  950. 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  951. 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  952. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  953. 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  954. 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
  955. 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  956. 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  957. 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  958. 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  959. 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  960. 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  961. 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/
  962. 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  963. 479 .loc 1 424 5 is_stmt 1 view .LVU157
  964. 480 .loc 1 424 5 view .LVU158
  965. 481 0202 A368 ldr r3, [r4, #8]
  966. 482 0204 012B cmp r3, #1
  967. 483 0206 34D0 beq .L80
  968. 484 .loc 1 424 5 discriminator 2 view .LVU159
  969. 485 0208 052B cmp r3, #5
  970. 486 020a 38D0 beq .L81
  971. 487 .loc 1 424 5 discriminator 5 view .LVU160
  972. 488 020c 214B ldr r3, .L87
  973. 489 020e 1A6F ldr r2, [r3, #112]
  974. 490 0210 22F00102 bic r2, r2, #1
  975. 491 0214 1A67 str r2, [r3, #112]
  976. 492 .loc 1 424 5 discriminator 5 view .LVU161
  977. 493 0216 1A6F ldr r2, [r3, #112]
  978. 494 0218 22F00402 bic r2, r2, #4
  979. 495 021c 1A67 str r2, [r3, #112]
  980. 496 .L36:
  981. 497 .loc 1 424 5 discriminator 7 view .LVU162
  982. 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
  983. 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
  984. 498 .loc 1 426 5 discriminator 7 view .LVU163
  985. 499 .loc 1 426 26 is_stmt 0 discriminator 7 view .LVU164
  986. 500 021e A368 ldr r3, [r4, #8]
  987. ARM GAS /tmp/ccrUqvu4.s page 18
  988. 501 .loc 1 426 7 discriminator 7 view .LVU165
  989. 502 0220 002B cmp r3, #0
  990. 503 0222 3DD0 beq .L38
  991. 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  992. 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/
  993. 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  994. 504 .loc 1 429 7 is_stmt 1 view .LVU166
  995. 505 .loc 1 429 19 is_stmt 0 view .LVU167
  996. 506 0224 FFF7FEFF bl HAL_GetTick
  997. 507 .LVL29:
  998. 508 0228 0646 mov r6, r0
  999. 509 .LVL30:
  1000. 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1001. 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */
  1002. 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
  1003. 510 .loc 1 432 7 is_stmt 1 view .LVU168
  1004. 511 .L39:
  1005. 512 .loc 1 432 12 view .LVU169
  1006. 513 .loc 1 432 13 is_stmt 0 view .LVU170
  1007. 514 022a 1A4B ldr r3, .L87
  1008. 515 022c 1B6F ldr r3, [r3, #112]
  1009. 516 .loc 1 432 12 view .LVU171
  1010. 517 022e 13F0020F tst r3, #2
  1011. 518 0232 46D1 bne .L41
  1012. 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1013. 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  1014. 519 .loc 1 434 9 is_stmt 1 view .LVU172
  1015. 520 .loc 1 434 13 is_stmt 0 view .LVU173
  1016. 521 0234 FFF7FEFF bl HAL_GetTick
  1017. 522 .LVL31:
  1018. 523 .loc 1 434 27 view .LVU174
  1019. 524 0238 801B subs r0, r0, r6
  1020. 525 .loc 1 434 11 view .LVU175
  1021. 526 023a 41F28833 movw r3, #5000
  1022. 527 023e 9842 cmp r0, r3
  1023. 528 0240 F3D9 bls .L39
  1024. 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1025. 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1026. 529 .loc 1 436 18 view .LVU176
  1027. 530 0242 0320 movs r0, #3
  1028. 531 0244 A0E0 b .L3
  1029. 532 .LVL32:
  1030. 533 .L60:
  1031. 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1032. 534 .loc 1 393 22 view .LVU177
  1033. 535 0246 0025 movs r5, #0
  1034. 536 0248 D6E7 b .L31
  1035. 537 .LVL33:
  1036. 538 .L79:
  1037. 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1038. 539 .loc 1 409 7 is_stmt 1 view .LVU178
  1039. 540 024a 144A ldr r2, .L87+8
  1040. 541 024c 1368 ldr r3, [r2]
  1041. 542 024e 43F48073 orr r3, r3, #256
  1042. 543 0252 1360 str r3, [r2]
  1043. 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1044. 544 .loc 1 412 7 view .LVU179
  1045. ARM GAS /tmp/ccrUqvu4.s page 19
  1046. 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1047. 545 .loc 1 412 19 is_stmt 0 view .LVU180
  1048. 546 0254 FFF7FEFF bl HAL_GetTick
  1049. 547 .LVL34:
  1050. 548 0258 0646 mov r6, r0
  1051. 549 .LVL35:
  1052. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1053. 550 .loc 1 414 7 is_stmt 1 view .LVU181
  1054. 551 .L33:
  1055. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1056. 552 .loc 1 414 12 view .LVU182
  1057. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1058. 553 .loc 1 414 13 is_stmt 0 view .LVU183
  1059. 554 025a 104B ldr r3, .L87+8
  1060. 555 025c 1B68 ldr r3, [r3]
  1061. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1062. 556 .loc 1 414 12 view .LVU184
  1063. 557 025e 13F4807F tst r3, #256
  1064. 558 0262 CED1 bne .L32
  1065. 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1066. 559 .loc 1 416 9 is_stmt 1 view .LVU185
  1067. 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1068. 560 .loc 1 416 13 is_stmt 0 view .LVU186
  1069. 561 0264 FFF7FEFF bl HAL_GetTick
  1070. 562 .LVL36:
  1071. 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1072. 563 .loc 1 416 27 view .LVU187
  1073. 564 0268 801B subs r0, r0, r6
  1074. 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1075. 565 .loc 1 416 11 view .LVU188
  1076. 566 026a 0228 cmp r0, #2
  1077. 567 026c F5D9 bls .L33
  1078. 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1079. 568 .loc 1 418 18 view .LVU189
  1080. 569 026e 0320 movs r0, #3
  1081. 570 0270 8AE0 b .L3
  1082. 571 .LVL37:
  1083. 572 .L80:
  1084. 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
  1085. 573 .loc 1 424 5 is_stmt 1 discriminator 1 view .LVU190
  1086. 574 0272 084A ldr r2, .L87
  1087. 575 0274 136F ldr r3, [r2, #112]
  1088. 576 0276 43F00103 orr r3, r3, #1
  1089. 577 027a 1367 str r3, [r2, #112]
  1090. 578 027c CFE7 b .L36
  1091. 579 .L81:
  1092. 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
  1093. 580 .loc 1 424 5 discriminator 4 view .LVU191
  1094. 581 027e 054B ldr r3, .L87
  1095. 582 0280 1A6F ldr r2, [r3, #112]
  1096. 583 0282 42F00402 orr r2, r2, #4
  1097. 584 0286 1A67 str r2, [r3, #112]
  1098. 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */
  1099. 585 .loc 1 424 5 discriminator 4 view .LVU192
  1100. 586 0288 1A6F ldr r2, [r3, #112]
  1101. 587 028a 42F00102 orr r2, r2, #1
  1102. 588 028e 1A67 str r2, [r3, #112]
  1103. ARM GAS /tmp/ccrUqvu4.s page 20
  1104. 589 0290 C5E7 b .L36
  1105. 590 .L88:
  1106. 591 0292 00BF .align 2
  1107. 592 .L87:
  1108. 593 0294 00380240 .word 1073887232
  1109. 594 0298 00004742 .word 1111949312
  1110. 595 029c 00700040 .word 1073770496
  1111. 596 .L38:
  1112. 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1113. 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1114. 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1115. 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  1116. 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1117. 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  1118. 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  1119. 597 .loc 1 443 7 view .LVU193
  1120. 598 .loc 1 443 19 is_stmt 0 view .LVU194
  1121. 599 02a0 FFF7FEFF bl HAL_GetTick
  1122. 600 .LVL38:
  1123. 601 02a4 0646 mov r6, r0
  1124. 602 .LVL39:
  1125. 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1126. 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */
  1127. 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
  1128. 603 .loc 1 446 7 is_stmt 1 view .LVU195
  1129. 604 .L42:
  1130. 605 .loc 1 446 12 view .LVU196
  1131. 606 .loc 1 446 13 is_stmt 0 view .LVU197
  1132. 607 02a6 3A4B ldr r3, .L89
  1133. 608 02a8 1B6F ldr r3, [r3, #112]
  1134. 609 .loc 1 446 12 view .LVU198
  1135. 610 02aa 13F0020F tst r3, #2
  1136. 611 02ae 08D0 beq .L41
  1137. 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1138. 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  1139. 612 .loc 1 448 9 is_stmt 1 view .LVU199
  1140. 613 .loc 1 448 13 is_stmt 0 view .LVU200
  1141. 614 02b0 FFF7FEFF bl HAL_GetTick
  1142. 615 .LVL40:
  1143. 616 .loc 1 448 27 view .LVU201
  1144. 617 02b4 801B subs r0, r0, r6
  1145. 618 .loc 1 448 11 view .LVU202
  1146. 619 02b6 41F28833 movw r3, #5000
  1147. 620 02ba 9842 cmp r0, r3
  1148. 621 02bc F3D9 bls .L42
  1149. 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1150. 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1151. 622 .loc 1 450 18 view .LVU203
  1152. 623 02be 0320 movs r0, #3
  1153. 624 02c0 62E0 b .L3
  1154. 625 .L41:
  1155. 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1156. 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1157. 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1158. 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1159. 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Restore clock configuration if changed */
  1160. 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(pwrclkchanged == SET)
  1161. ARM GAS /tmp/ccrUqvu4.s page 21
  1162. 626 .loc 1 456 5 is_stmt 1 view .LVU204
  1163. 627 .loc 1 456 7 is_stmt 0 view .LVU205
  1164. 628 02c2 E5B9 cbnz r5, .L82
  1165. 629 .LVL41:
  1166. 630 .L30:
  1167. 631 .loc 1 456 7 view .LVU206
  1168. 632 .LBE2:
  1169. 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1170. 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE();
  1171. 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1172. 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1173. 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/
  1174. 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  1175. 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  1176. 633 .loc 1 463 3 is_stmt 1 view .LVU207
  1177. 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
  1178. 634 .loc 1 464 3 view .LVU208
  1179. 635 .loc 1 464 30 is_stmt 0 view .LVU209
  1180. 636 02c4 A369 ldr r3, [r4, #24]
  1181. 637 .loc 1 464 6 view .LVU210
  1182. 638 02c6 002B cmp r3, #0
  1183. 639 02c8 5DD0 beq .L64
  1184. 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1185. 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */
  1186. 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
  1187. 640 .loc 1 467 5 is_stmt 1 view .LVU211
  1188. 641 .loc 1 467 8 is_stmt 0 view .LVU212
  1189. 642 02ca 314A ldr r2, .L89
  1190. 643 02cc 9268 ldr r2, [r2, #8]
  1191. 644 02ce 02F00C02 and r2, r2, #12
  1192. 645 .loc 1 467 7 view .LVU213
  1193. 646 02d2 082A cmp r2, #8
  1194. 647 02d4 5AD0 beq .L65
  1195. 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1196. 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  1197. 648 .loc 1 469 7 is_stmt 1 view .LVU214
  1198. 649 .loc 1 469 9 is_stmt 0 view .LVU215
  1199. 650 02d6 022B cmp r3, #2
  1200. 651 02d8 17D0 beq .L83
  1201. 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1202. 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  1203. 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
  1204. 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
  1205. 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
  1206. 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
  1207. 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
  1208. 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1209. 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */
  1210. 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
  1211. 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1212. 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  1213. 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  1214. 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1215. 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */
  1216. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  1217. 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1218. 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  1219. ARM GAS /tmp/ccrUqvu4.s page 22
  1220. 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1221. 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1222. 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1223. 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1224. 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1225. 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */
  1226. 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource
  1227. 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM
  1228. 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)
  1229. 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po
  1230. 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
  1231. 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the main PLL. */
  1232. 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE();
  1233. 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1234. 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  1235. 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  1236. 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1237. 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */
  1238. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  1239. 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1240. 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  1241. 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1242. 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1243. 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1244. 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1245. 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1246. 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  1247. 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1248. 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */
  1249. 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
  1250. 652 .loc 1 517 9 is_stmt 1 view .LVU216
  1251. 653 02da 2E4B ldr r3, .L89+4
  1252. 654 02dc 0022 movs r2, #0
  1253. 655 02de 1A66 str r2, [r3, #96]
  1254. 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1255. 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  1256. 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  1257. 656 .loc 1 520 9 view .LVU217
  1258. 657 .loc 1 520 21 is_stmt 0 view .LVU218
  1259. 658 02e0 FFF7FEFF bl HAL_GetTick
  1260. 659 .LVL42:
  1261. 660 02e4 0446 mov r4, r0
  1262. 661 .LVL43:
  1263. 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1264. 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */
  1265. 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  1266. 662 .loc 1 523 9 is_stmt 1 view .LVU219
  1267. 663 .L49:
  1268. 664 .loc 1 523 14 view .LVU220
  1269. 665 .loc 1 523 15 is_stmt 0 view .LVU221
  1270. 666 02e6 2A4B ldr r3, .L89
  1271. 667 02e8 1B68 ldr r3, [r3]
  1272. 668 .loc 1 523 14 view .LVU222
  1273. 669 02ea 13F0007F tst r3, #33554432
  1274. 670 02ee 42D0 beq .L84
  1275. 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1276. 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  1277. ARM GAS /tmp/ccrUqvu4.s page 23
  1278. 671 .loc 1 525 11 is_stmt 1 view .LVU223
  1279. 672 .loc 1 525 15 is_stmt 0 view .LVU224
  1280. 673 02f0 FFF7FEFF bl HAL_GetTick
  1281. 674 .LVL44:
  1282. 675 .loc 1 525 29 view .LVU225
  1283. 676 02f4 001B subs r0, r0, r4
  1284. 677 .loc 1 525 13 view .LVU226
  1285. 678 02f6 0228 cmp r0, #2
  1286. 679 02f8 F5D9 bls .L49
  1287. 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1288. 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1289. 680 .loc 1 527 20 view .LVU227
  1290. 681 02fa 0320 movs r0, #3
  1291. 682 02fc 44E0 b .L3
  1292. 683 .LVL45:
  1293. 684 .L82:
  1294. 685 .LBB4:
  1295. 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1296. 686 .loc 1 458 7 is_stmt 1 view .LVU228
  1297. 687 02fe 244A ldr r2, .L89
  1298. 688 0300 136C ldr r3, [r2, #64]
  1299. 689 0302 23F08053 bic r3, r3, #268435456
  1300. 690 0306 1364 str r3, [r2, #64]
  1301. 691 0308 DCE7 b .L30
  1302. 692 .LVL46:
  1303. 693 .L83:
  1304. 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1305. 694 .loc 1 458 7 is_stmt 0 view .LVU229
  1306. 695 .LBE4:
  1307. 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
  1308. 696 .loc 1 472 9 is_stmt 1 view .LVU230
  1309. 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
  1310. 697 .loc 1 473 9 view .LVU231
  1311. 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
  1312. 698 .loc 1 474 9 view .LVU232
  1313. 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
  1314. 699 .loc 1 475 9 view .LVU233
  1315. 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1316. 700 .loc 1 476 9 view .LVU234
  1317. 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1318. 701 .loc 1 479 9 view .LVU235
  1319. 702 030a 224B ldr r3, .L89+4
  1320. 703 030c 0022 movs r2, #0
  1321. 704 030e 1A66 str r2, [r3, #96]
  1322. 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1323. 705 .loc 1 482 9 view .LVU236
  1324. 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1325. 706 .loc 1 482 21 is_stmt 0 view .LVU237
  1326. 707 0310 FFF7FEFF bl HAL_GetTick
  1327. 708 .LVL47:
  1328. 709 0314 0546 mov r5, r0
  1329. 710 .LVL48:
  1330. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1331. 711 .loc 1 485 9 is_stmt 1 view .LVU238
  1332. 712 .L45:
  1333. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1334. 713 .loc 1 485 14 view .LVU239
  1335. ARM GAS /tmp/ccrUqvu4.s page 24
  1336. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1337. 714 .loc 1 485 15 is_stmt 0 view .LVU240
  1338. 715 0316 1E4B ldr r3, .L89
  1339. 716 0318 1B68 ldr r3, [r3]
  1340. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1341. 717 .loc 1 485 14 view .LVU241
  1342. 718 031a 13F0007F tst r3, #33554432
  1343. 719 031e 06D0 beq .L85
  1344. 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1345. 720 .loc 1 487 11 is_stmt 1 view .LVU242
  1346. 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1347. 721 .loc 1 487 15 is_stmt 0 view .LVU243
  1348. 722 0320 FFF7FEFF bl HAL_GetTick
  1349. 723 .LVL49:
  1350. 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1351. 724 .loc 1 487 29 view .LVU244
  1352. 725 0324 401B subs r0, r0, r5
  1353. 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1354. 726 .loc 1 487 13 view .LVU245
  1355. 727 0326 0228 cmp r0, #2
  1356. 728 0328 F5D9 bls .L45
  1357. 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1358. 729 .loc 1 489 20 view .LVU246
  1359. 730 032a 0320 movs r0, #3
  1360. 731 032c 2CE0 b .L3
  1361. 732 .L85:
  1362. 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM
  1363. 733 .loc 1 494 9 is_stmt 1 view .LVU247
  1364. 734 032e E369 ldr r3, [r4, #28]
  1365. 735 0330 226A ldr r2, [r4, #32]
  1366. 736 0332 1343 orrs r3, r3, r2
  1367. 737 0334 626A ldr r2, [r4, #36]
  1368. 738 0336 43EA8213 orr r3, r3, r2, lsl #6
  1369. 739 033a A26A ldr r2, [r4, #40]
  1370. 740 033c 5208 lsrs r2, r2, #1
  1371. 741 033e 013A subs r2, r2, #1
  1372. 742 0340 43EA0243 orr r3, r3, r2, lsl #16
  1373. 743 0344 E26A ldr r2, [r4, #44]
  1374. 744 0346 43EA0263 orr r3, r3, r2, lsl #24
  1375. 745 034a 114A ldr r2, .L89
  1376. 746 034c 5360 str r3, [r2, #4]
  1377. 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1378. 747 .loc 1 500 9 view .LVU248
  1379. 748 034e 114B ldr r3, .L89+4
  1380. 749 0350 0122 movs r2, #1
  1381. 750 0352 1A66 str r2, [r3, #96]
  1382. 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1383. 751 .loc 1 503 9 view .LVU249
  1384. 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1385. 752 .loc 1 503 21 is_stmt 0 view .LVU250
  1386. 753 0354 FFF7FEFF bl HAL_GetTick
  1387. 754 .LVL50:
  1388. 755 0358 0446 mov r4, r0
  1389. 756 .LVL51:
  1390. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1391. 757 .loc 1 506 9 is_stmt 1 view .LVU251
  1392. 758 .L47:
  1393. ARM GAS /tmp/ccrUqvu4.s page 25
  1394. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1395. 759 .loc 1 506 14 view .LVU252
  1396. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1397. 760 .loc 1 506 15 is_stmt 0 view .LVU253
  1398. 761 035a 0D4B ldr r3, .L89
  1399. 762 035c 1B68 ldr r3, [r3]
  1400. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1401. 763 .loc 1 506 14 view .LVU254
  1402. 764 035e 13F0007F tst r3, #33554432
  1403. 765 0362 06D1 bne .L86
  1404. 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1405. 766 .loc 1 508 11 is_stmt 1 view .LVU255
  1406. 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1407. 767 .loc 1 508 15 is_stmt 0 view .LVU256
  1408. 768 0364 FFF7FEFF bl HAL_GetTick
  1409. 769 .LVL52:
  1410. 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1411. 770 .loc 1 508 29 view .LVU257
  1412. 771 0368 001B subs r0, r0, r4
  1413. 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1414. 772 .loc 1 508 13 view .LVU258
  1415. 773 036a 0228 cmp r0, #2
  1416. 774 036c F5D9 bls .L47
  1417. 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1418. 775 .loc 1 510 20 view .LVU259
  1419. 776 036e 0320 movs r0, #3
  1420. 777 0370 0AE0 b .L3
  1421. 778 .L86:
  1422. 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1423. 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1424. 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1425. 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1426. 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  1427. 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1428. 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1429. 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1430. 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1431. 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
  1432. 779 .loc 1 537 10 view .LVU260
  1433. 780 0372 0020 movs r0, #0
  1434. 781 0374 08E0 b .L3
  1435. 782 .L84:
  1436. 783 .loc 1 537 10 view .LVU261
  1437. 784 0376 0020 movs r0, #0
  1438. 785 0378 06E0 b .L3
  1439. 786 .LVL53:
  1440. 787 .L51:
  1441. 788 .LCFI2:
  1442. 789 .cfi_def_cfa_offset 0
  1443. 790 .cfi_restore 4
  1444. 791 .cfi_restore 5
  1445. 792 .cfi_restore 6
  1446. 793 .cfi_restore 14
  1447. 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1448. 794 .loc 1 228 12 view .LVU262
  1449. 795 037a 0120 movs r0, #1
  1450. 796 .LVL54:
  1451. ARM GAS /tmp/ccrUqvu4.s page 26
  1452. 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1453. 797 .loc 1 538 1 view .LVU263
  1454. 798 037c 7047 bx lr
  1455. 799 .LVL55:
  1456. 800 .L76:
  1457. 801 .LCFI3:
  1458. 802 .cfi_def_cfa_offset 24
  1459. 803 .cfi_offset 4, -16
  1460. 804 .cfi_offset 5, -12
  1461. 805 .cfi_offset 6, -8
  1462. 806 .cfi_offset 14, -4
  1463. 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1464. 807 .loc 1 244 16 view .LVU264
  1465. 808 037e 0120 movs r0, #1
  1466. 809 .LVL56:
  1467. 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1468. 810 .loc 1 244 16 view .LVU265
  1469. 811 0380 02E0 b .L3
  1470. 812 .L55:
  1471. 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1472. 813 .loc 1 297 16 view .LVU266
  1473. 814 0382 0120 movs r0, #1
  1474. 815 0384 00E0 b .L3
  1475. 816 .L64:
  1476. 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1477. 817 .loc 1 537 10 view .LVU267
  1478. 818 0386 0020 movs r0, #0
  1479. 819 .LVL57:
  1480. 820 .L3:
  1481. 821 .loc 1 538 1 view .LVU268
  1482. 822 0388 02B0 add sp, sp, #8
  1483. 823 .LCFI4:
  1484. 824 .cfi_remember_state
  1485. 825 .cfi_def_cfa_offset 16
  1486. 826 @ sp needed
  1487. 827 038a 70BD pop {r4, r5, r6, pc}
  1488. 828 .LVL58:
  1489. 829 .L65:
  1490. 830 .LCFI5:
  1491. 831 .cfi_restore_state
  1492. 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1493. 832 .loc 1 534 14 view .LVU269
  1494. 833 038c 0120 movs r0, #1
  1495. 834 038e FBE7 b .L3
  1496. 835 .L90:
  1497. 836 .align 2
  1498. 837 .L89:
  1499. 838 0390 00380240 .word 1073887232
  1500. 839 0394 00004742 .word 1111949312
  1501. 840 .cfi_endproc
  1502. 841 .LFE131:
  1503. 843 .section .text.HAL_RCC_MCOConfig,"ax",%progbits
  1504. 844 .align 1
  1505. 845 .global HAL_RCC_MCOConfig
  1506. 846 .syntax unified
  1507. 847 .thumb
  1508. 848 .thumb_func
  1509. ARM GAS /tmp/ccrUqvu4.s page 27
  1510. 850 HAL_RCC_MCOConfig:
  1511. 851 .LVL59:
  1512. 852 .LFB133:
  1513. 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1514. 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  1515. 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
  1516. 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct.
  1517. 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
  1518. 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral.
  1519. 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param FLatency FLASH Latency, this parameter depend on device selected
  1520. 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  1521. 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
  1522. 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function
  1523. 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  1524. 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after
  1525. 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * startup from Reset, wake-up from STOP and STANDBY mode, or in case
  1526. 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock
  1527. 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled).
  1528. 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  1529. 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target
  1530. 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked).
  1531. 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will
  1532. 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * occur when the clock source will be ready.
  1533. 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  1534. 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly
  1535. 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
  1536. 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions")
  1537. 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  1538. 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  1539. 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
  1540. 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1541. 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
  1542. 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1543. 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */
  1544. 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL)
  1545. 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1546. 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1547. 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1548. 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1549. 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  1550. 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
  1551. 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
  1552. 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1553. 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
  1554. 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock
  1555. 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */
  1556. 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1557. 583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */
  1558. 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY())
  1559. 585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1560. 586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
  1561. 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
  1562. 588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1563. 589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
  1564. 590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
  1565. 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
  1566. 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1567. ARM GAS /tmp/ccrUqvu4.s page 28
  1568. 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1569. 594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1570. 595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1571. 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1572. 597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/
  1573. 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  1574. 599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1575. 600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the highest APBx dividers in order to ensure that we do not go through
  1576. 601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */
  1577. 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  1578. 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1579. 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
  1580. 605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1581. 606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1582. 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  1583. 608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1584. 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
  1585. 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1586. 611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1587. 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
  1588. 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
  1589. 614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1590. 615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1591. 616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/
  1592. 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
  1593. 618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1594. 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
  1595. 620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1596. 621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */
  1597. 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  1598. 623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1599. 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE ready flag */
  1600. 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  1601. 626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1602. 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1603. 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1604. 629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1605. 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */
  1606. 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
  1607. 632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
  1608. 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1609. 634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the PLL ready flag */
  1610. 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  1611. 636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1612. 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1613. 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1614. 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1615. 640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */
  1616. 641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  1617. 642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1618. 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */
  1619. 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  1620. 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1621. 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1622. 647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1623. 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1624. 649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1625. ARM GAS /tmp/ccrUqvu4.s page 29
  1626. 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  1627. 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1628. 652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */
  1629. 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick();
  1630. 654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1631. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
  1632. 656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1633. 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
  1634. 658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1635. 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT;
  1636. 660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1637. 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1638. 662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1639. 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1640. 664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */
  1641. 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY())
  1642. 666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1643. 667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
  1644. 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
  1645. 669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1646. 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
  1647. 671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
  1648. 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
  1649. 673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1650. 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
  1651. 675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1652. 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1653. 677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1654. 678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
  1655. 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  1656. 680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1657. 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
  1658. 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
  1659. 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1660. 684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1661. 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/
  1662. 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  1663. 687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1664. 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
  1665. 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
  1666. 690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1667. 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1668. 692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */
  1669. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF
  1670. 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1671. 695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings */
  1672. 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY);
  1673. 697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1674. 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
  1675. 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1676. 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1677. 701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  1678. 702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @}
  1679. 703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  1680. 704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1681. 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
  1682. 706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC clocks control functions
  1683. ARM GAS /tmp/ccrUqvu4.s page 30
  1684. 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  1685. 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
  1686. 709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
  1687. 710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Peripheral Control functions #####
  1688. 711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ===============================================================================
  1689. 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..]
  1690. 713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks
  1691. 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequencies.
  1692. 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1693. 716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
  1694. 717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{
  1695. 718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  1696. 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1697. 720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  1698. 721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
  1699. 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note PA8/PC9 should be configured in alternate function mode.
  1700. 723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
  1701. 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
  1702. 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
  1703. 726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
  1704. 727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
  1705. 728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
  1706. 729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
  1707. 730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
  1708. 731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
  1709. 732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
  1710. 733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
  1711. 734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a
  1712. 735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for
  1713. 736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
  1714. 737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
  1715. 738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler.
  1716. 739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values:
  1717. 740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_1: no division applied to MCOx clock
  1718. 741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
  1719. 742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
  1720. 743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
  1721. 744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
  1722. 745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have
  1723. 746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5).
  1724. 747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  1725. 748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  1726. 749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
  1727. 750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1728. 853 .loc 1 750 1 is_stmt 1 view -0
  1729. 854 .cfi_startproc
  1730. 855 @ args = 0, pretend = 0, frame = 32
  1731. 856 @ frame_needed = 0, uses_anonymous_args = 0
  1732. 857 .loc 1 750 1 is_stmt 0 view .LVU271
  1733. 858 0000 70B5 push {r4, r5, r6, lr}
  1734. 859 .LCFI6:
  1735. 860 .cfi_def_cfa_offset 16
  1736. 861 .cfi_offset 4, -16
  1737. 862 .cfi_offset 5, -12
  1738. 863 .cfi_offset 6, -8
  1739. 864 .cfi_offset 14, -4
  1740. 865 0002 88B0 sub sp, sp, #32
  1741. ARM GAS /tmp/ccrUqvu4.s page 31
  1742. 866 .LCFI7:
  1743. 867 .cfi_def_cfa_offset 48
  1744. 868 0004 0C46 mov r4, r1
  1745. 869 0006 1546 mov r5, r2
  1746. 751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct;
  1747. 870 .loc 1 751 3 is_stmt 1 view .LVU272
  1748. 752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */
  1749. 753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx));
  1750. 871 .loc 1 753 3 view .LVU273
  1751. 754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv));
  1752. 872 .loc 1 754 3 view .LVU274
  1753. 755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC_MCO1 */
  1754. 756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_MCOx == RCC_MCO1)
  1755. 873 .loc 1 756 3 view .LVU275
  1756. 874 .loc 1 756 5 is_stmt 0 view .LVU276
  1757. 875 0008 00BB cbnz r0, .L92
  1758. 757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1759. 758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
  1760. 876 .loc 1 758 5 is_stmt 1 view .LVU277
  1761. 759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1762. 760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO1 Clock Enable */
  1763. 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO1_CLK_ENABLE();
  1764. 877 .loc 1 761 5 view .LVU278
  1765. 878 .LBB5:
  1766. 879 .loc 1 761 5 view .LVU279
  1767. 880 000a 0023 movs r3, #0
  1768. 881 000c 0193 str r3, [sp, #4]
  1769. 882 .loc 1 761 5 view .LVU280
  1770. 883 000e 204E ldr r6, .L95
  1771. 884 0010 326B ldr r2, [r6, #48]
  1772. 885 .LVL60:
  1773. 886 .loc 1 761 5 is_stmt 0 view .LVU281
  1774. 887 0012 42F00102 orr r2, r2, #1
  1775. 888 0016 3263 str r2, [r6, #48]
  1776. 889 .loc 1 761 5 is_stmt 1 view .LVU282
  1777. 890 0018 326B ldr r2, [r6, #48]
  1778. 891 001a 02F00102 and r2, r2, #1
  1779. 892 001e 0192 str r2, [sp, #4]
  1780. 893 .loc 1 761 5 view .LVU283
  1781. 894 0020 019A ldr r2, [sp, #4]
  1782. 895 .LBE5:
  1783. 896 .loc 1 761 5 view .LVU284
  1784. 762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1785. 763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */
  1786. 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN;
  1787. 897 .loc 1 764 5 view .LVU285
  1788. 898 .loc 1 764 25 is_stmt 0 view .LVU286
  1789. 899 0022 4FF48072 mov r2, #256
  1790. 900 0026 0392 str r2, [sp, #12]
  1791. 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1792. 901 .loc 1 765 5 is_stmt 1 view .LVU287
  1793. 902 .loc 1 765 26 is_stmt 0 view .LVU288
  1794. 903 0028 0222 movs r2, #2
  1795. 904 002a 0492 str r2, [sp, #16]
  1796. 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  1797. 905 .loc 1 766 5 is_stmt 1 view .LVU289
  1798. 906 .loc 1 766 27 is_stmt 0 view .LVU290
  1799. ARM GAS /tmp/ccrUqvu4.s page 32
  1800. 907 002c 0322 movs r2, #3
  1801. 908 002e 0692 str r2, [sp, #24]
  1802. 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1803. 909 .loc 1 767 5 is_stmt 1 view .LVU291
  1804. 910 .loc 1 767 26 is_stmt 0 view .LVU292
  1805. 911 0030 0593 str r3, [sp, #20]
  1806. 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  1807. 912 .loc 1 768 5 is_stmt 1 view .LVU293
  1808. 913 .loc 1 768 31 is_stmt 0 view .LVU294
  1809. 914 0032 0793 str r3, [sp, #28]
  1810. 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
  1811. 915 .loc 1 769 5 is_stmt 1 view .LVU295
  1812. 916 0034 03A9 add r1, sp, #12
  1813. 917 .LVL61:
  1814. 918 .loc 1 769 5 is_stmt 0 view .LVU296
  1815. 919 0036 1748 ldr r0, .L95+4
  1816. 920 .LVL62:
  1817. 921 .loc 1 769 5 view .LVU297
  1818. 922 0038 FFF7FEFF bl HAL_GPIO_Init
  1819. 923 .LVL63:
  1820. 770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1821. 771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
  1822. 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
  1823. 924 .loc 1 772 5 is_stmt 1 view .LVU298
  1824. 925 003c B368 ldr r3, [r6, #8]
  1825. 926 003e 23F0EC63 bic r3, r3, #123731968
  1826. 927 0042 2543 orrs r5, r5, r4
  1827. 928 .LVL64:
  1828. 929 .loc 1 772 5 is_stmt 0 view .LVU299
  1829. 930 0044 1D43 orrs r5, r5, r3
  1830. 931 0046 B560 str r5, [r6, #8]
  1831. 932 .LVL65:
  1832. 933 .L91:
  1833. 773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1834. 774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO1 enable feature is available only on STM32F410xx devices */
  1835. 775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN)
  1836. 776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO1_ENABLE();
  1837. 777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */
  1838. 778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1839. 779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2)
  1840. 780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  1841. 781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1842. 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
  1843. 783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1844. 784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO2 Clock Enable */
  1845. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO2_CLK_ENABLE();
  1846. 786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1847. 787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO2 pin in alternate function mode */
  1848. 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN;
  1849. 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1850. 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  1851. 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1852. 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  1853. 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
  1854. 794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1855. 795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
  1856. 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U)))
  1857. ARM GAS /tmp/ccrUqvu4.s page 33
  1858. 797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1859. 798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */
  1860. 799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN)
  1861. 800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO2_ENABLE();
  1862. 801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */
  1863. 802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1864. 803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */
  1865. 804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  1866. 934 .loc 1 804 1 view .LVU300
  1867. 935 0048 08B0 add sp, sp, #32
  1868. 936 .LCFI8:
  1869. 937 .cfi_remember_state
  1870. 938 .cfi_def_cfa_offset 16
  1871. 939 @ sp needed
  1872. 940 004a 70BD pop {r4, r5, r6, pc}
  1873. 941 .LVL66:
  1874. 942 .L92:
  1875. 943 .LCFI9:
  1876. 944 .cfi_restore_state
  1877. 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1878. 945 .loc 1 782 5 is_stmt 1 view .LVU301
  1879. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1880. 946 .loc 1 785 5 view .LVU302
  1881. 947 .LBB6:
  1882. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1883. 948 .loc 1 785 5 view .LVU303
  1884. 949 004c 0023 movs r3, #0
  1885. 950 004e 0293 str r3, [sp, #8]
  1886. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1887. 951 .loc 1 785 5 view .LVU304
  1888. 952 0050 0F4E ldr r6, .L95
  1889. 953 0052 326B ldr r2, [r6, #48]
  1890. 954 .LVL67:
  1891. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1892. 955 .loc 1 785 5 is_stmt 0 view .LVU305
  1893. 956 0054 42F00402 orr r2, r2, #4
  1894. 957 0058 3263 str r2, [r6, #48]
  1895. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1896. 958 .loc 1 785 5 is_stmt 1 view .LVU306
  1897. 959 005a 326B ldr r2, [r6, #48]
  1898. 960 005c 02F00402 and r2, r2, #4
  1899. 961 0060 0292 str r2, [sp, #8]
  1900. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1901. 962 .loc 1 785 5 view .LVU307
  1902. 963 0062 029A ldr r2, [sp, #8]
  1903. 964 .LBE6:
  1904. 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1905. 965 .loc 1 785 5 view .LVU308
  1906. 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1907. 966 .loc 1 788 5 view .LVU309
  1908. 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1909. 967 .loc 1 788 25 is_stmt 0 view .LVU310
  1910. 968 0064 4FF40072 mov r2, #512
  1911. 969 0068 0392 str r2, [sp, #12]
  1912. 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  1913. 970 .loc 1 789 5 is_stmt 1 view .LVU311
  1914. 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  1915. ARM GAS /tmp/ccrUqvu4.s page 34
  1916. 971 .loc 1 789 26 is_stmt 0 view .LVU312
  1917. 972 006a 0222 movs r2, #2
  1918. 973 006c 0492 str r2, [sp, #16]
  1919. 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1920. 974 .loc 1 790 5 is_stmt 1 view .LVU313
  1921. 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1922. 975 .loc 1 790 27 is_stmt 0 view .LVU314
  1923. 976 006e 0322 movs r2, #3
  1924. 977 0070 0692 str r2, [sp, #24]
  1925. 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  1926. 978 .loc 1 791 5 is_stmt 1 view .LVU315
  1927. 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
  1928. 979 .loc 1 791 26 is_stmt 0 view .LVU316
  1929. 980 0072 0593 str r3, [sp, #20]
  1930. 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
  1931. 981 .loc 1 792 5 is_stmt 1 view .LVU317
  1932. 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
  1933. 982 .loc 1 792 31 is_stmt 0 view .LVU318
  1934. 983 0074 0793 str r3, [sp, #28]
  1935. 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1936. 984 .loc 1 793 5 is_stmt 1 view .LVU319
  1937. 985 0076 03A9 add r1, sp, #12
  1938. 986 .LVL68:
  1939. 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1940. 987 .loc 1 793 5 is_stmt 0 view .LVU320
  1941. 988 0078 0748 ldr r0, .L95+8
  1942. 989 .LVL69:
  1943. 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1944. 990 .loc 1 793 5 view .LVU321
  1945. 991 007a FFF7FEFF bl HAL_GPIO_Init
  1946. 992 .LVL70:
  1947. 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1948. 993 .loc 1 796 5 is_stmt 1 view .LVU322
  1949. 994 007e B368 ldr r3, [r6, #8]
  1950. 995 0080 23F07843 bic r3, r3, #-134217728
  1951. 996 0084 44EAC504 orr r4, r4, r5, lsl #3
  1952. 997 .LVL71:
  1953. 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1954. 998 .loc 1 796 5 is_stmt 0 view .LVU323
  1955. 999 0088 1C43 orrs r4, r4, r3
  1956. 1000 008a B460 str r4, [r6, #8]
  1957. 1001 .loc 1 804 1 view .LVU324
  1958. 1002 008c DCE7 b .L91
  1959. 1003 .L96:
  1960. 1004 008e 00BF .align 2
  1961. 1005 .L95:
  1962. 1006 0090 00380240 .word 1073887232
  1963. 1007 0094 00000240 .word 1073872896
  1964. 1008 0098 00080240 .word 1073874944
  1965. 1009 .cfi_endproc
  1966. 1010 .LFE133:
  1967. 1012 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
  1968. 1013 .align 1
  1969. 1014 .global HAL_RCC_EnableCSS
  1970. 1015 .syntax unified
  1971. 1016 .thumb
  1972. 1017 .thumb_func
  1973. ARM GAS /tmp/ccrUqvu4.s page 35
  1974. 1019 HAL_RCC_EnableCSS:
  1975. 1020 .LFB134:
  1976. 805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  1977. 806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  1978. 807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Enables the Clock Security System.
  1979. 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator
  1980. 809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the
  1981. 810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI),
  1982. 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to
  1983. 812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
  1984. 813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  1985. 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  1986. 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
  1987. 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  1988. 1021 .loc 1 816 1 is_stmt 1 view -0
  1989. 1022 .cfi_startproc
  1990. 1023 @ args = 0, pretend = 0, frame = 0
  1991. 1024 @ frame_needed = 0, uses_anonymous_args = 0
  1992. 1025 @ link register save eliminated.
  1993. 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
  1994. 1026 .loc 1 817 3 view .LVU326
  1995. 1027 .loc 1 817 38 is_stmt 0 view .LVU327
  1996. 1028 0000 014B ldr r3, .L98
  1997. 1029 0002 0122 movs r2, #1
  1998. 1030 0004 DA64 str r2, [r3, #76]
  1999. 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2000. 1031 .loc 1 818 1 view .LVU328
  2001. 1032 0006 7047 bx lr
  2002. 1033 .L99:
  2003. 1034 .align 2
  2004. 1035 .L98:
  2005. 1036 0008 00004742 .word 1111949312
  2006. 1037 .cfi_endproc
  2007. 1038 .LFE134:
  2008. 1040 .section .text.HAL_RCC_DisableCSS,"ax",%progbits
  2009. 1041 .align 1
  2010. 1042 .global HAL_RCC_DisableCSS
  2011. 1043 .syntax unified
  2012. 1044 .thumb
  2013. 1045 .thumb_func
  2014. 1047 HAL_RCC_DisableCSS:
  2015. 1048 .LFB135:
  2016. 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2017. 820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2018. 821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Disables the Clock Security System.
  2019. 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  2020. 823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2021. 824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
  2022. 825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2023. 1049 .loc 1 825 1 is_stmt 1 view -0
  2024. 1050 .cfi_startproc
  2025. 1051 @ args = 0, pretend = 0, frame = 0
  2026. 1052 @ frame_needed = 0, uses_anonymous_args = 0
  2027. 1053 @ link register save eliminated.
  2028. 826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
  2029. 1054 .loc 1 826 3 view .LVU330
  2030. 1055 .loc 1 826 38 is_stmt 0 view .LVU331
  2031. ARM GAS /tmp/ccrUqvu4.s page 36
  2032. 1056 0000 014B ldr r3, .L101
  2033. 1057 0002 0022 movs r2, #0
  2034. 1058 0004 DA64 str r2, [r3, #76]
  2035. 827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2036. 1059 .loc 1 827 1 view .LVU332
  2037. 1060 0006 7047 bx lr
  2038. 1061 .L102:
  2039. 1062 .align 2
  2040. 1063 .L101:
  2041. 1064 0008 00004742 .word 1111949312
  2042. 1065 .cfi_endproc
  2043. 1066 .LFE135:
  2044. 1068 .global __aeabi_uldivmod
  2045. 1069 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits
  2046. 1070 .align 1
  2047. 1071 .weak HAL_RCC_GetSysClockFreq
  2048. 1072 .syntax unified
  2049. 1073 .thumb
  2050. 1074 .thumb_func
  2051. 1076 HAL_RCC_GetSysClockFreq:
  2052. 1077 .LFB136:
  2053. 828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2054. 829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2055. 830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency
  2056. 831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2057. 832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real
  2058. 833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined
  2059. 834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * constant and the selected clock source:
  2060. 835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
  2061. 836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
  2062. 837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
  2063. 838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors.
  2064. 839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
  2065. 840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations
  2066. 841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * in voltage and temperature.
  2067. 842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
  2068. 843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 25 MHz), user has to ensure that HSE_VALUE is same as the real
  2069. 844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may
  2070. 845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * have wrong result.
  2071. 846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2072. 847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional
  2073. 848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * value for HSE crystal.
  2074. 849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2075. 850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the
  2076. 851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters.
  2077. 852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2078. 853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the
  2079. 854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre
  2080. 855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2081. 856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2082. 857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency
  2083. 858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2084. 859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void)
  2085. 860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2086. 1078 .loc 1 860 1 is_stmt 1 view -0
  2087. 1079 .cfi_startproc
  2088. 1080 @ args = 0, pretend = 0, frame = 0
  2089. ARM GAS /tmp/ccrUqvu4.s page 37
  2090. 1081 @ frame_needed = 0, uses_anonymous_args = 0
  2091. 1082 0000 08B5 push {r3, lr}
  2092. 1083 .LCFI10:
  2093. 1084 .cfi_def_cfa_offset 8
  2094. 1085 .cfi_offset 3, -8
  2095. 1086 .cfi_offset 14, -4
  2096. 861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
  2097. 1087 .loc 1 861 3 view .LVU334
  2098. 1088 .LVL72:
  2099. 862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t sysclockfreq = 0U;
  2100. 1089 .loc 1 862 3 view .LVU335
  2101. 863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2102. 864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/
  2103. 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** switch (RCC->CFGR & RCC_CFGR_SWS)
  2104. 1090 .loc 1 865 3 view .LVU336
  2105. 1091 .loc 1 865 14 is_stmt 0 view .LVU337
  2106. 1092 0002 254B ldr r3, .L110
  2107. 1093 0004 9B68 ldr r3, [r3, #8]
  2108. 1094 .loc 1 865 21 view .LVU338
  2109. 1095 0006 03F00C03 and r3, r3, #12
  2110. 1096 .loc 1 865 3 view .LVU339
  2111. 1097 000a 042B cmp r3, #4
  2112. 1098 000c 3FD0 beq .L107
  2113. 1099 000e 082B cmp r3, #8
  2114. 1100 0010 3FD1 bne .L108
  2115. 866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2116. 867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
  2117. 868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2118. 869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
  2119. 870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
  2120. 871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2121. 872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
  2122. 873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2123. 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE;
  2124. 875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
  2125. 876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2126. 877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
  2127. 878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2128. 879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
  2129. 880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLP */
  2130. 881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
  2131. 1101 .loc 1 881 7 is_stmt 1 view .LVU340
  2132. 1102 .loc 1 881 17 is_stmt 0 view .LVU341
  2133. 1103 0012 214B ldr r3, .L110
  2134. 1104 0014 5A68 ldr r2, [r3, #4]
  2135. 1105 .loc 1 881 12 view .LVU342
  2136. 1106 0016 02F03F02 and r2, r2, #63
  2137. 1107 .LVL73:
  2138. 882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
  2139. 1108 .loc 1 882 7 is_stmt 1 view .LVU343
  2140. 1109 .loc 1 882 10 is_stmt 0 view .LVU344
  2141. 1110 001a 5B68 ldr r3, [r3, #4]
  2142. 1111 .loc 1 882 9 view .LVU345
  2143. 1112 001c 13F4800F tst r3, #4194304
  2144. 1113 0020 12D0 beq .L105
  2145. 883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2146. 884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE used as PLL clock source */
  2147. ARM GAS /tmp/ccrUqvu4.s page 38
  2148. 885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN
  2149. 1114 .loc 1 885 9 is_stmt 1 view .LVU346
  2150. 1115 .loc 1 885 72 is_stmt 0 view .LVU347
  2151. 1116 0022 1D4B ldr r3, .L110
  2152. 1117 0024 5968 ldr r1, [r3, #4]
  2153. 1118 .loc 1 885 56 view .LVU348
  2154. 1119 0026 C1F38811 ubfx r1, r1, #6, #9
  2155. 1120 .loc 1 885 53 view .LVU349
  2156. 1121 002a 1C48 ldr r0, .L110+4
  2157. 1122 .loc 1 885 130 view .LVU350
  2158. 1123 002c 0023 movs r3, #0
  2159. 1124 002e A1FB0001 umull r0, r1, r1, r0
  2160. 1125 0032 FFF7FEFF bl __aeabi_uldivmod
  2161. 1126 .LVL74:
  2162. 1127 .L106:
  2163. 886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2164. 887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2165. 888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2166. 889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI used as PLL clock source */
  2167. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN
  2168. 891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2169. 892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
  2170. 1128 .loc 1 892 7 is_stmt 1 view .LVU351
  2171. 1129 .loc 1 892 21 is_stmt 0 view .LVU352
  2172. 1130 0036 184B ldr r3, .L110
  2173. 1131 0038 5B68 ldr r3, [r3, #4]
  2174. 1132 .loc 1 892 51 view .LVU353
  2175. 1133 003a C3F30143 ubfx r3, r3, #16, #2
  2176. 1134 .loc 1 892 76 view .LVU354
  2177. 1135 003e 0133 adds r3, r3, #1
  2178. 1136 .loc 1 892 12 view .LVU355
  2179. 1137 0040 5B00 lsls r3, r3, #1
  2180. 1138 .LVL75:
  2181. 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2182. 894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = pllvco/pllp;
  2183. 1139 .loc 1 894 7 is_stmt 1 view .LVU356
  2184. 1140 .loc 1 894 20 is_stmt 0 view .LVU357
  2185. 1141 0042 B0FBF3F0 udiv r0, r0, r3
  2186. 1142 .LVL76:
  2187. 895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
  2188. 1143 .loc 1 895 7 is_stmt 1 view .LVU358
  2189. 1144 0046 25E0 b .L103
  2190. 1145 .LVL77:
  2191. 1146 .L105:
  2192. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2193. 1147 .loc 1 890 9 view .LVU359
  2194. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2195. 1148 .loc 1 890 72 is_stmt 0 view .LVU360
  2196. 1149 0048 134B ldr r3, .L110
  2197. 1150 004a 5968 ldr r1, [r3, #4]
  2198. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2199. 1151 .loc 1 890 56 view .LVU361
  2200. 1152 004c C1F3881C ubfx ip, r1, #6, #9
  2201. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2202. 1153 .loc 1 890 53 view .LVU362
  2203. 1154 0050 4FEA4C11 lsl r1, ip, #5
  2204. 1155 0054 B1EB0C00 subs r0, r1, ip
  2205. ARM GAS /tmp/ccrUqvu4.s page 39
  2206. 1156 0058 6EEB0E0E sbc lr, lr, lr
  2207. 1157 005c 4FEA8E13 lsl r3, lr, #6
  2208. 1158 0060 43EA9063 orr r3, r3, r0, lsr #26
  2209. 1159 0064 8101 lsls r1, r0, #6
  2210. 1160 0066 091A subs r1, r1, r0
  2211. 1161 0068 63EB0E03 sbc r3, r3, lr
  2212. 1162 006c DB00 lsls r3, r3, #3
  2213. 1163 006e 43EA5173 orr r3, r3, r1, lsr #29
  2214. 1164 0072 C900 lsls r1, r1, #3
  2215. 1165 0074 11EB0C0C adds ip, r1, ip
  2216. 1166 0078 43F10003 adc r3, r3, #0
  2217. 1167 007c 9902 lsls r1, r3, #10
  2218. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2219. 1168 .loc 1 890 130 view .LVU363
  2220. 1169 007e 0023 movs r3, #0
  2221. 1170 0080 4FEA8C20 lsl r0, ip, #10
  2222. 1171 0084 41EA9C51 orr r1, r1, ip, lsr #22
  2223. 1172 0088 FFF7FEFF bl __aeabi_uldivmod
  2224. 1173 .LVL78:
  2225. 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2226. 1174 .loc 1 890 130 view .LVU364
  2227. 1175 008c D3E7 b .L106
  2228. 1176 .LVL79:
  2229. 1177 .L107:
  2230. 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
  2231. 1178 .loc 1 874 20 view .LVU365
  2232. 1179 008e 0348 ldr r0, .L110+4
  2233. 1180 0090 00E0 b .L103
  2234. 1181 .L108:
  2235. 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2236. 1182 .loc 1 865 3 view .LVU366
  2237. 1183 0092 0348 ldr r0, .L110+8
  2238. 1184 .LVL80:
  2239. 896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2240. 897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** default:
  2241. 898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2242. 899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
  2243. 900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break;
  2244. 901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2245. 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2246. 903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return sysclockfreq;
  2247. 1185 .loc 1 903 3 is_stmt 1 view .LVU367
  2248. 1186 .L103:
  2249. 904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2250. 1187 .loc 1 904 1 is_stmt 0 view .LVU368
  2251. 1188 0094 08BD pop {r3, pc}
  2252. 1189 .L111:
  2253. 1190 0096 00BF .align 2
  2254. 1191 .L110:
  2255. 1192 0098 00380240 .word 1073887232
  2256. 1193 009c 40787D01 .word 25000000
  2257. 1194 00a0 0024F400 .word 16000000
  2258. 1195 .cfi_endproc
  2259. 1196 .LFE136:
  2260. 1198 .section .text.HAL_RCC_ClockConfig,"ax",%progbits
  2261. 1199 .align 1
  2262. 1200 .global HAL_RCC_ClockConfig
  2263. ARM GAS /tmp/ccrUqvu4.s page 40
  2264. 1201 .syntax unified
  2265. 1202 .thumb
  2266. 1203 .thumb_func
  2267. 1205 HAL_RCC_ClockConfig:
  2268. 1206 .LVL81:
  2269. 1207 .LFB132:
  2270. 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
  2271. 1208 .loc 1 566 1 is_stmt 1 view -0
  2272. 1209 .cfi_startproc
  2273. 1210 @ args = 0, pretend = 0, frame = 0
  2274. 1211 @ frame_needed = 0, uses_anonymous_args = 0
  2275. 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2276. 1212 .loc 1 567 3 view .LVU370
  2277. 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2278. 1213 .loc 1 570 3 view .LVU371
  2279. 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2280. 1214 .loc 1 570 5 is_stmt 0 view .LVU372
  2281. 1215 0000 0028 cmp r0, #0
  2282. 1216 0002 00F09A80 beq .L127
  2283. 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart;
  2284. 1217 .loc 1 566 1 view .LVU373
  2285. 1218 0006 70B5 push {r4, r5, r6, lr}
  2286. 1219 .LCFI11:
  2287. 1220 .cfi_def_cfa_offset 16
  2288. 1221 .cfi_offset 4, -16
  2289. 1222 .cfi_offset 5, -12
  2290. 1223 .cfi_offset 6, -8
  2291. 1224 .cfi_offset 14, -4
  2292. 1225 0008 0D46 mov r5, r1
  2293. 1226 000a 0446 mov r4, r0
  2294. 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
  2295. 1227 .loc 1 576 3 is_stmt 1 view .LVU374
  2296. 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2297. 1228 .loc 1 577 3 view .LVU375
  2298. 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2299. 1229 .loc 1 584 3 view .LVU376
  2300. 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2301. 1230 .loc 1 584 17 is_stmt 0 view .LVU377
  2302. 1231 000c 4F4B ldr r3, .L140
  2303. 1232 000e 1B68 ldr r3, [r3]
  2304. 1233 0010 03F00F03 and r3, r3, #15
  2305. 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2306. 1234 .loc 1 584 5 view .LVU378
  2307. 1235 0014 8B42 cmp r3, r1
  2308. 1236 0016 08D2 bcs .L114
  2309. 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2310. 1237 .loc 1 587 5 is_stmt 1 view .LVU379
  2311. 1238 0018 CBB2 uxtb r3, r1
  2312. 1239 001a 4C4A ldr r2, .L140
  2313. 1240 001c 1370 strb r3, [r2]
  2314. 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2315. 1241 .loc 1 591 5 view .LVU380
  2316. 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2317. 1242 .loc 1 591 8 is_stmt 0 view .LVU381
  2318. 1243 001e 1368 ldr r3, [r2]
  2319. 1244 0020 03F00F03 and r3, r3, #15
  2320. 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2321. ARM GAS /tmp/ccrUqvu4.s page 41
  2322. 1245 .loc 1 591 7 view .LVU382
  2323. 1246 0024 8B42 cmp r3, r1
  2324. 1247 0026 40F08A80 bne .L128
  2325. 1248 .L114:
  2326. 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2327. 1249 .loc 1 598 3 is_stmt 1 view .LVU383
  2328. 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2329. 1250 .loc 1 598 25 is_stmt 0 view .LVU384
  2330. 1251 002a 2368 ldr r3, [r4]
  2331. 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2332. 1252 .loc 1 598 5 view .LVU385
  2333. 1253 002c 13F0020F tst r3, #2
  2334. 1254 0030 17D0 beq .L115
  2335. 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2336. 1255 .loc 1 602 5 is_stmt 1 view .LVU386
  2337. 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2338. 1256 .loc 1 602 7 is_stmt 0 view .LVU387
  2339. 1257 0032 13F0040F tst r3, #4
  2340. 1258 0036 04D0 beq .L116
  2341. 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2342. 1259 .loc 1 604 7 is_stmt 1 view .LVU388
  2343. 1260 0038 454A ldr r2, .L140+4
  2344. 1261 003a 9368 ldr r3, [r2, #8]
  2345. 1262 003c 43F4E053 orr r3, r3, #7168
  2346. 1263 0040 9360 str r3, [r2, #8]
  2347. 1264 .L116:
  2348. 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2349. 1265 .loc 1 607 5 view .LVU389
  2350. 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2351. 1266 .loc 1 607 27 is_stmt 0 view .LVU390
  2352. 1267 0042 2368 ldr r3, [r4]
  2353. 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2354. 1268 .loc 1 607 7 view .LVU391
  2355. 1269 0044 13F0080F tst r3, #8
  2356. 1270 0048 04D0 beq .L117
  2357. 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2358. 1271 .loc 1 609 7 is_stmt 1 view .LVU392
  2359. 1272 004a 414A ldr r2, .L140+4
  2360. 1273 004c 9368 ldr r3, [r2, #8]
  2361. 1274 004e 43F46043 orr r3, r3, #57344
  2362. 1275 0052 9360 str r3, [r2, #8]
  2363. 1276 .L117:
  2364. 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
  2365. 1277 .loc 1 612 5 view .LVU393
  2366. 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2367. 1278 .loc 1 613 5 view .LVU394
  2368. 1279 0054 3E4A ldr r2, .L140+4
  2369. 1280 0056 9368 ldr r3, [r2, #8]
  2370. 1281 0058 23F0F003 bic r3, r3, #240
  2371. 1282 005c A168 ldr r1, [r4, #8]
  2372. 1283 .LVL82:
  2373. 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2374. 1284 .loc 1 613 5 is_stmt 0 view .LVU395
  2375. 1285 005e 0B43 orrs r3, r3, r1
  2376. 1286 0060 9360 str r3, [r2, #8]
  2377. 1287 .L115:
  2378. 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2379. ARM GAS /tmp/ccrUqvu4.s page 42
  2380. 1288 .loc 1 617 3 is_stmt 1 view .LVU396
  2381. 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2382. 1289 .loc 1 617 25 is_stmt 0 view .LVU397
  2383. 1290 0062 2368 ldr r3, [r4]
  2384. 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2385. 1291 .loc 1 617 5 view .LVU398
  2386. 1292 0064 13F0010F tst r3, #1
  2387. 1293 0068 32D0 beq .L118
  2388. 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2389. 1294 .loc 1 619 5 is_stmt 1 view .LVU399
  2390. 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2391. 1295 .loc 1 622 5 view .LVU400
  2392. 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2393. 1296 .loc 1 622 25 is_stmt 0 view .LVU401
  2394. 1297 006a 6368 ldr r3, [r4, #4]
  2395. 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2396. 1298 .loc 1 622 7 view .LVU402
  2397. 1299 006c 012B cmp r3, #1
  2398. 1300 006e 21D0 beq .L138
  2399. 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
  2400. 1301 .loc 1 631 10 is_stmt 1 view .LVU403
  2401. 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
  2402. 1302 .loc 1 631 76 is_stmt 0 view .LVU404
  2403. 1303 0070 9A1E subs r2, r3, #2
  2404. 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
  2405. 1304 .loc 1 631 12 view .LVU405
  2406. 1305 0072 012A cmp r2, #1
  2407. 1306 0074 25D9 bls .L139
  2408. 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2409. 1307 .loc 1 644 7 is_stmt 1 view .LVU406
  2410. 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2411. 1308 .loc 1 644 10 is_stmt 0 view .LVU407
  2412. 1309 0076 364A ldr r2, .L140+4
  2413. 1310 0078 1268 ldr r2, [r2]
  2414. 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2415. 1311 .loc 1 644 9 view .LVU408
  2416. 1312 007a 12F0020F tst r2, #2
  2417. 1313 007e 60D0 beq .L131
  2418. 1314 .L120:
  2419. 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2420. 1315 .loc 1 650 5 is_stmt 1 view .LVU409
  2421. 1316 0080 3349 ldr r1, .L140+4
  2422. 1317 0082 8A68 ldr r2, [r1, #8]
  2423. 1318 0084 22F00302 bic r2, r2, #3
  2424. 1319 0088 1343 orrs r3, r3, r2
  2425. 1320 008a 8B60 str r3, [r1, #8]
  2426. 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2427. 1321 .loc 1 653 5 view .LVU410
  2428. 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2429. 1322 .loc 1 653 17 is_stmt 0 view .LVU411
  2430. 1323 008c FFF7FEFF bl HAL_GetTick
  2431. 1324 .LVL83:
  2432. 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2433. 1325 .loc 1 653 17 view .LVU412
  2434. 1326 0090 0646 mov r6, r0
  2435. 1327 .LVL84:
  2436. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2437. ARM GAS /tmp/ccrUqvu4.s page 43
  2438. 1328 .loc 1 655 5 is_stmt 1 view .LVU413
  2439. 1329 .L122:
  2440. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2441. 1330 .loc 1 655 11 view .LVU414
  2442. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2443. 1331 .loc 1 655 12 is_stmt 0 view .LVU415
  2444. 1332 0092 2F4B ldr r3, .L140+4
  2445. 1333 0094 9B68 ldr r3, [r3, #8]
  2446. 1334 0096 03F00C03 and r3, r3, #12
  2447. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2448. 1335 .loc 1 655 63 view .LVU416
  2449. 1336 009a 6268 ldr r2, [r4, #4]
  2450. 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2451. 1337 .loc 1 655 11 view .LVU417
  2452. 1338 009c B3EB820F cmp r3, r2, lsl #2
  2453. 1339 00a0 16D0 beq .L118
  2454. 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2455. 1340 .loc 1 657 7 is_stmt 1 view .LVU418
  2456. 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2457. 1341 .loc 1 657 12 is_stmt 0 view .LVU419
  2458. 1342 00a2 FFF7FEFF bl HAL_GetTick
  2459. 1343 .LVL85:
  2460. 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2461. 1344 .loc 1 657 26 view .LVU420
  2462. 1345 00a6 801B subs r0, r0, r6
  2463. 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2464. 1346 .loc 1 657 10 view .LVU421
  2465. 1347 00a8 41F28833 movw r3, #5000
  2466. 1348 00ac 9842 cmp r0, r3
  2467. 1349 00ae F0D9 bls .L122
  2468. 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2469. 1350 .loc 1 659 16 view .LVU422
  2470. 1351 00b0 0320 movs r0, #3
  2471. 1352 00b2 41E0 b .L113
  2472. 1353 .LVL86:
  2473. 1354 .L138:
  2474. 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2475. 1355 .loc 1 625 7 is_stmt 1 view .LVU423
  2476. 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2477. 1356 .loc 1 625 10 is_stmt 0 view .LVU424
  2478. 1357 00b4 264A ldr r2, .L140+4
  2479. 1358 00b6 1268 ldr r2, [r2]
  2480. 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2481. 1359 .loc 1 625 9 view .LVU425
  2482. 1360 00b8 12F4003F tst r2, #131072
  2483. 1361 00bc E0D1 bne .L120
  2484. 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2485. 1362 .loc 1 627 16 view .LVU426
  2486. 1363 00be 0120 movs r0, #1
  2487. 1364 .LVL87:
  2488. 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2489. 1365 .loc 1 627 16 view .LVU427
  2490. 1366 00c0 3AE0 b .L113
  2491. 1367 .LVL88:
  2492. 1368 .L139:
  2493. 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2494. 1369 .loc 1 635 7 is_stmt 1 view .LVU428
  2495. ARM GAS /tmp/ccrUqvu4.s page 44
  2496. 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2497. 1370 .loc 1 635 10 is_stmt 0 view .LVU429
  2498. 1371 00c2 234A ldr r2, .L140+4
  2499. 1372 00c4 1268 ldr r2, [r2]
  2500. 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2501. 1373 .loc 1 635 9 view .LVU430
  2502. 1374 00c6 12F0007F tst r2, #33554432
  2503. 1375 00ca D9D1 bne .L120
  2504. 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2505. 1376 .loc 1 637 16 view .LVU431
  2506. 1377 00cc 0120 movs r0, #1
  2507. 1378 .LVL89:
  2508. 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2509. 1379 .loc 1 637 16 view .LVU432
  2510. 1380 00ce 33E0 b .L113
  2511. 1381 .L118:
  2512. 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2513. 1382 .loc 1 665 3 is_stmt 1 view .LVU433
  2514. 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2515. 1383 .loc 1 665 17 is_stmt 0 view .LVU434
  2516. 1384 00d0 1E4B ldr r3, .L140
  2517. 1385 00d2 1B68 ldr r3, [r3]
  2518. 1386 00d4 03F00F03 and r3, r3, #15
  2519. 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2520. 1387 .loc 1 665 5 view .LVU435
  2521. 1388 00d8 AB42 cmp r3, r5
  2522. 1389 00da 07D9 bls .L124
  2523. 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2524. 1390 .loc 1 668 5 is_stmt 1 view .LVU436
  2525. 1391 00dc EAB2 uxtb r2, r5
  2526. 1392 00de 1B4B ldr r3, .L140
  2527. 1393 00e0 1A70 strb r2, [r3]
  2528. 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2529. 1394 .loc 1 672 5 view .LVU437
  2530. 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2531. 1395 .loc 1 672 8 is_stmt 0 view .LVU438
  2532. 1396 00e2 1B68 ldr r3, [r3]
  2533. 1397 00e4 03F00F03 and r3, r3, #15
  2534. 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2535. 1398 .loc 1 672 7 view .LVU439
  2536. 1399 00e8 AB42 cmp r3, r5
  2537. 1400 00ea 2CD1 bne .L133
  2538. 1401 .L124:
  2539. 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2540. 1402 .loc 1 679 3 is_stmt 1 view .LVU440
  2541. 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2542. 1403 .loc 1 679 25 is_stmt 0 view .LVU441
  2543. 1404 00ec 2368 ldr r3, [r4]
  2544. 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2545. 1405 .loc 1 679 5 view .LVU442
  2546. 1406 00ee 13F0040F tst r3, #4
  2547. 1407 00f2 06D0 beq .L125
  2548. 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
  2549. 1408 .loc 1 681 5 is_stmt 1 view .LVU443
  2550. 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2551. 1409 .loc 1 682 5 view .LVU444
  2552. 1410 00f4 164A ldr r2, .L140+4
  2553. ARM GAS /tmp/ccrUqvu4.s page 45
  2554. 1411 00f6 9368 ldr r3, [r2, #8]
  2555. 1412 00f8 23F4E053 bic r3, r3, #7168
  2556. 1413 00fc E168 ldr r1, [r4, #12]
  2557. 1414 00fe 0B43 orrs r3, r3, r1
  2558. 1415 0100 9360 str r3, [r2, #8]
  2559. 1416 .L125:
  2560. 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2561. 1417 .loc 1 686 3 view .LVU445
  2562. 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2563. 1418 .loc 1 686 25 is_stmt 0 view .LVU446
  2564. 1419 0102 2368 ldr r3, [r4]
  2565. 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2566. 1420 .loc 1 686 5 view .LVU447
  2567. 1421 0104 13F0080F tst r3, #8
  2568. 1422 0108 07D0 beq .L126
  2569. 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
  2570. 1423 .loc 1 688 5 is_stmt 1 view .LVU448
  2571. 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2572. 1424 .loc 1 689 5 view .LVU449
  2573. 1425 010a 114A ldr r2, .L140+4
  2574. 1426 010c 9368 ldr r3, [r2, #8]
  2575. 1427 010e 23F46043 bic r3, r3, #57344
  2576. 1428 0112 2169 ldr r1, [r4, #16]
  2577. 1429 0114 43EAC103 orr r3, r3, r1, lsl #3
  2578. 1430 0118 9360 str r3, [r2, #8]
  2579. 1431 .L126:
  2580. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2581. 1432 .loc 1 693 3 view .LVU450
  2582. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2583. 1433 .loc 1 693 21 is_stmt 0 view .LVU451
  2584. 1434 011a FFF7FEFF bl HAL_RCC_GetSysClockFreq
  2585. 1435 .LVL90:
  2586. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2587. 1436 .loc 1 693 68 view .LVU452
  2588. 1437 011e 0C4B ldr r3, .L140+4
  2589. 1438 0120 9B68 ldr r3, [r3, #8]
  2590. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2591. 1439 .loc 1 693 91 view .LVU453
  2592. 1440 0122 C3F30313 ubfx r3, r3, #4, #4
  2593. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2594. 1441 .loc 1 693 63 view .LVU454
  2595. 1442 0126 0B4A ldr r2, .L140+8
  2596. 1443 0128 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
  2597. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2598. 1444 .loc 1 693 47 view .LVU455
  2599. 1445 012a D840 lsrs r0, r0, r3
  2600. 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2601. 1446 .loc 1 693 19 view .LVU456
  2602. 1447 012c 0A4B ldr r3, .L140+12
  2603. 1448 012e 1860 str r0, [r3]
  2604. 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2605. 1449 .loc 1 696 3 is_stmt 1 view .LVU457
  2606. 1450 0130 0020 movs r0, #0
  2607. 1451 0132 FFF7FEFF bl HAL_InitTick
  2608. 1452 .LVL91:
  2609. 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2610. 1453 .loc 1 698 3 view .LVU458
  2611. ARM GAS /tmp/ccrUqvu4.s page 46
  2612. 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2613. 1454 .loc 1 698 10 is_stmt 0 view .LVU459
  2614. 1455 0136 0020 movs r0, #0
  2615. 1456 .L113:
  2616. 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2617. 1457 .loc 1 699 1 view .LVU460
  2618. 1458 0138 70BD pop {r4, r5, r6, pc}
  2619. 1459 .LVL92:
  2620. 1460 .L127:
  2621. 1461 .LCFI12:
  2622. 1462 .cfi_def_cfa_offset 0
  2623. 1463 .cfi_restore 4
  2624. 1464 .cfi_restore 5
  2625. 1465 .cfi_restore 6
  2626. 1466 .cfi_restore 14
  2627. 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2628. 1467 .loc 1 572 12 view .LVU461
  2629. 1468 013a 0120 movs r0, #1
  2630. 1469 .LVL93:
  2631. 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2632. 1470 .loc 1 699 1 view .LVU462
  2633. 1471 013c 7047 bx lr
  2634. 1472 .LVL94:
  2635. 1473 .L128:
  2636. 1474 .LCFI13:
  2637. 1475 .cfi_def_cfa_offset 16
  2638. 1476 .cfi_offset 4, -16
  2639. 1477 .cfi_offset 5, -12
  2640. 1478 .cfi_offset 6, -8
  2641. 1479 .cfi_offset 14, -4
  2642. 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2643. 1480 .loc 1 593 14 view .LVU463
  2644. 1481 013e 0120 movs r0, #1
  2645. 1482 .LVL95:
  2646. 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2647. 1483 .loc 1 593 14 view .LVU464
  2648. 1484 0140 FAE7 b .L113
  2649. 1485 .LVL96:
  2650. 1486 .L131:
  2651. 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2652. 1487 .loc 1 646 16 view .LVU465
  2653. 1488 0142 0120 movs r0, #1
  2654. 1489 .LVL97:
  2655. 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2656. 1490 .loc 1 646 16 view .LVU466
  2657. 1491 0144 F8E7 b .L113
  2658. 1492 .L133:
  2659. 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2660. 1493 .loc 1 674 14 view .LVU467
  2661. 1494 0146 0120 movs r0, #1
  2662. 1495 0148 F6E7 b .L113
  2663. 1496 .L141:
  2664. 1497 014a 00BF .align 2
  2665. 1498 .L140:
  2666. 1499 014c 003C0240 .word 1073888256
  2667. 1500 0150 00380240 .word 1073887232
  2668. 1501 0154 00000000 .word AHBPrescTable
  2669. ARM GAS /tmp/ccrUqvu4.s page 47
  2670. 1502 0158 00000000 .word SystemCoreClock
  2671. 1503 .cfi_endproc
  2672. 1504 .LFE132:
  2673. 1506 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits
  2674. 1507 .align 1
  2675. 1508 .global HAL_RCC_GetHCLKFreq
  2676. 1509 .syntax unified
  2677. 1510 .thumb
  2678. 1511 .thumb_func
  2679. 1513 HAL_RCC_GetHCLKFreq:
  2680. 1514 .LFB137:
  2681. 905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2682. 906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2683. 907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the HCLK frequency
  2684. 908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the
  2685. 909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect
  2686. 910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
  2687. 911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
  2688. 912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated within this function
  2689. 913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HCLK frequency
  2690. 914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2691. 915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
  2692. 916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2693. 1515 .loc 1 916 1 is_stmt 1 view -0
  2694. 1516 .cfi_startproc
  2695. 1517 @ args = 0, pretend = 0, frame = 0
  2696. 1518 @ frame_needed = 0, uses_anonymous_args = 0
  2697. 1519 @ link register save eliminated.
  2698. 917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock;
  2699. 1520 .loc 1 917 3 view .LVU469
  2700. 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2701. 1521 .loc 1 918 1 is_stmt 0 view .LVU470
  2702. 1522 0000 014B ldr r3, .L143
  2703. 1523 0002 1868 ldr r0, [r3]
  2704. 1524 0004 7047 bx lr
  2705. 1525 .L144:
  2706. 1526 0006 00BF .align 2
  2707. 1527 .L143:
  2708. 1528 0008 00000000 .word SystemCoreClock
  2709. 1529 .cfi_endproc
  2710. 1530 .LFE137:
  2711. 1532 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
  2712. 1533 .align 1
  2713. 1534 .global HAL_RCC_GetPCLK1Freq
  2714. 1535 .syntax unified
  2715. 1536 .thumb
  2716. 1537 .thumb_func
  2717. 1539 HAL_RCC_GetPCLK1Freq:
  2718. 1540 .LFB138:
  2719. 919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2720. 920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2721. 921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency
  2722. 922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the
  2723. 923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
  2724. 924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK1 frequency
  2725. 925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2726. 926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
  2727. ARM GAS /tmp/ccrUqvu4.s page 48
  2728. 927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2729. 1541 .loc 1 927 1 is_stmt 1 view -0
  2730. 1542 .cfi_startproc
  2731. 1543 @ args = 0, pretend = 0, frame = 0
  2732. 1544 @ frame_needed = 0, uses_anonymous_args = 0
  2733. 1545 0000 08B5 push {r3, lr}
  2734. 1546 .LCFI14:
  2735. 1547 .cfi_def_cfa_offset 8
  2736. 1548 .cfi_offset 3, -8
  2737. 1549 .cfi_offset 14, -4
  2738. 928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  2739. 929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]
  2740. 1550 .loc 1 929 3 view .LVU472
  2741. 1551 .loc 1 929 11 is_stmt 0 view .LVU473
  2742. 1552 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
  2743. 1553 .LVL98:
  2744. 1554 .loc 1 929 54 view .LVU474
  2745. 1555 0006 044B ldr r3, .L147
  2746. 1556 0008 9B68 ldr r3, [r3, #8]
  2747. 1557 .loc 1 929 78 view .LVU475
  2748. 1558 000a C3F38223 ubfx r3, r3, #10, #3
  2749. 1559 .loc 1 929 49 view .LVU476
  2750. 1560 000e 034A ldr r2, .L147+4
  2751. 1561 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
  2752. 930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2753. 1562 .loc 1 930 1 view .LVU477
  2754. 1563 0012 D840 lsrs r0, r0, r3
  2755. 1564 0014 08BD pop {r3, pc}
  2756. 1565 .L148:
  2757. 1566 0016 00BF .align 2
  2758. 1567 .L147:
  2759. 1568 0018 00380240 .word 1073887232
  2760. 1569 001c 00000000 .word APBPrescTable
  2761. 1570 .cfi_endproc
  2762. 1571 .LFE138:
  2763. 1573 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits
  2764. 1574 .align 1
  2765. 1575 .global HAL_RCC_GetPCLK2Freq
  2766. 1576 .syntax unified
  2767. 1577 .thumb
  2768. 1578 .thumb_func
  2769. 1580 HAL_RCC_GetPCLK2Freq:
  2770. 1581 .LFB139:
  2771. 931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2772. 932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2773. 933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency
  2774. 934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the
  2775. 935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
  2776. 936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK2 frequency
  2777. 937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2778. 938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void)
  2779. 939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2780. 1582 .loc 1 939 1 is_stmt 1 view -0
  2781. 1583 .cfi_startproc
  2782. 1584 @ args = 0, pretend = 0, frame = 0
  2783. 1585 @ frame_needed = 0, uses_anonymous_args = 0
  2784. 1586 0000 08B5 push {r3, lr}
  2785. ARM GAS /tmp/ccrUqvu4.s page 49
  2786. 1587 .LCFI15:
  2787. 1588 .cfi_def_cfa_offset 8
  2788. 1589 .cfi_offset 3, -8
  2789. 1590 .cfi_offset 14, -4
  2790. 940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
  2791. 941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos])
  2792. 1591 .loc 1 941 3 view .LVU479
  2793. 1592 .loc 1 941 11 is_stmt 0 view .LVU480
  2794. 1593 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
  2795. 1594 .LVL99:
  2796. 1595 .loc 1 941 53 view .LVU481
  2797. 1596 0006 044B ldr r3, .L151
  2798. 1597 0008 9B68 ldr r3, [r3, #8]
  2799. 1598 .loc 1 941 77 view .LVU482
  2800. 1599 000a C3F34233 ubfx r3, r3, #13, #3
  2801. 1600 .loc 1 941 48 view .LVU483
  2802. 1601 000e 034A ldr r2, .L151+4
  2803. 1602 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2
  2804. 942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2805. 1603 .loc 1 942 1 view .LVU484
  2806. 1604 0012 D840 lsrs r0, r0, r3
  2807. 1605 0014 08BD pop {r3, pc}
  2808. 1606 .L152:
  2809. 1607 0016 00BF .align 2
  2810. 1608 .L151:
  2811. 1609 0018 00380240 .word 1073887232
  2812. 1610 001c 00000000 .word APBPrescTable
  2813. 1611 .cfi_endproc
  2814. 1612 .LFE139:
  2815. 1614 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits
  2816. 1615 .align 1
  2817. 1616 .weak HAL_RCC_GetOscConfig
  2818. 1617 .syntax unified
  2819. 1618 .thumb
  2820. 1619 .thumb_func
  2821. 1621 HAL_RCC_GetOscConfig:
  2822. 1622 .LVL100:
  2823. 1623 .LFB140:
  2824. 943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2825. 944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  2826. 945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal
  2827. 946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers.
  2828. 947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
  2829. 948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured.
  2830. 949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  2831. 950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  2832. 951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
  2833. 952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2834. 1624 .loc 1 952 1 is_stmt 1 view -0
  2835. 1625 .cfi_startproc
  2836. 1626 @ args = 0, pretend = 0, frame = 0
  2837. 1627 @ frame_needed = 0, uses_anonymous_args = 0
  2838. 1628 @ link register save eliminated.
  2839. 953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/
  2840. 954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA
  2841. 1629 .loc 1 954 3 view .LVU486
  2842. 1630 .loc 1 954 37 is_stmt 0 view .LVU487
  2843. ARM GAS /tmp/ccrUqvu4.s page 50
  2844. 1631 0000 0F23 movs r3, #15
  2845. 1632 0002 0360 str r3, [r0]
  2846. 955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2847. 956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/
  2848. 957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
  2849. 1633 .loc 1 957 3 is_stmt 1 view .LVU488
  2850. 1634 .loc 1 957 10 is_stmt 0 view .LVU489
  2851. 1635 0004 304B ldr r3, .L166
  2852. 1636 0006 1B68 ldr r3, [r3]
  2853. 1637 .loc 1 957 5 view .LVU490
  2854. 1638 0008 13F4802F tst r3, #262144
  2855. 1639 000c 3BD0 beq .L154
  2856. 958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2857. 959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
  2858. 1640 .loc 1 959 5 is_stmt 1 view .LVU491
  2859. 1641 .loc 1 959 33 is_stmt 0 view .LVU492
  2860. 1642 000e 4FF4A023 mov r3, #327680
  2861. 1643 0012 4360 str r3, [r0, #4]
  2862. 1644 .L155:
  2863. 960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2864. 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
  2865. 962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2866. 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON;
  2867. 964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2868. 965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2869. 966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2870. 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
  2871. 968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2872. 969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2873. 970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/
  2874. 971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
  2875. 1645 .loc 1 971 3 is_stmt 1 view .LVU493
  2876. 1646 .loc 1 971 10 is_stmt 0 view .LVU494
  2877. 1647 0014 2C4B ldr r3, .L166
  2878. 1648 0016 1B68 ldr r3, [r3]
  2879. 1649 .loc 1 971 5 view .LVU495
  2880. 1650 0018 13F0010F tst r3, #1
  2881. 1651 001c 3FD0 beq .L157
  2882. 972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2883. 973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON;
  2884. 1652 .loc 1 973 5 is_stmt 1 view .LVU496
  2885. 1653 .loc 1 973 33 is_stmt 0 view .LVU497
  2886. 1654 001e 0123 movs r3, #1
  2887. 1655 0020 C360 str r3, [r0, #12]
  2888. 1656 .L158:
  2889. 974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2890. 975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2891. 976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2892. 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
  2893. 978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2894. 979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2895. 980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_P
  2896. 1657 .loc 1 980 3 is_stmt 1 view .LVU498
  2897. 1658 .loc 1 980 59 is_stmt 0 view .LVU499
  2898. 1659 0022 294A ldr r2, .L166
  2899. 1660 0024 1368 ldr r3, [r2]
  2900. 1661 .loc 1 980 44 view .LVU500
  2901. ARM GAS /tmp/ccrUqvu4.s page 51
  2902. 1662 0026 C3F3C403 ubfx r3, r3, #3, #5
  2903. 1663 .loc 1 980 42 view .LVU501
  2904. 1664 002a 0361 str r3, [r0, #16]
  2905. 981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2906. 982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/
  2907. 983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
  2908. 1665 .loc 1 983 3 is_stmt 1 view .LVU502
  2909. 1666 .loc 1 983 10 is_stmt 0 view .LVU503
  2910. 1667 002c 136F ldr r3, [r2, #112]
  2911. 1668 .loc 1 983 5 view .LVU504
  2912. 1669 002e 13F0040F tst r3, #4
  2913. 1670 0032 37D0 beq .L159
  2914. 984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2915. 985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
  2916. 1671 .loc 1 985 5 is_stmt 1 view .LVU505
  2917. 1672 .loc 1 985 33 is_stmt 0 view .LVU506
  2918. 1673 0034 0523 movs r3, #5
  2919. 1674 0036 8360 str r3, [r0, #8]
  2920. 1675 .L160:
  2921. 986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2922. 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
  2923. 988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2924. 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON;
  2925. 990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2926. 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2927. 992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2928. 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
  2929. 994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2930. 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2931. 996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/
  2932. 997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
  2933. 1676 .loc 1 997 3 is_stmt 1 view .LVU507
  2934. 1677 .loc 1 997 10 is_stmt 0 view .LVU508
  2935. 1678 0038 234B ldr r3, .L166
  2936. 1679 003a 5B6F ldr r3, [r3, #116]
  2937. 1680 .loc 1 997 5 view .LVU509
  2938. 1681 003c 13F0010F tst r3, #1
  2939. 1682 0040 3BD0 beq .L162
  2940. 998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2941. 999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON;
  2942. 1683 .loc 1 999 5 is_stmt 1 view .LVU510
  2943. 1684 .loc 1 999 33 is_stmt 0 view .LVU511
  2944. 1685 0042 0123 movs r3, #1
  2945. 1686 0044 4361 str r3, [r0, #20]
  2946. 1687 .L163:
  2947. 1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2948. 1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2949. 1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2950. 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
  2951. 1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2952. 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  2953. 1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/
  2954. 1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
  2955. 1688 .loc 1 1007 3 is_stmt 1 view .LVU512
  2956. 1689 .loc 1 1007 10 is_stmt 0 view .LVU513
  2957. 1690 0046 204B ldr r3, .L166
  2958. 1691 0048 1B68 ldr r3, [r3]
  2959. ARM GAS /tmp/ccrUqvu4.s page 52
  2960. 1692 .loc 1 1007 5 view .LVU514
  2961. 1693 004a 13F0807F tst r3, #16777216
  2962. 1694 004e 37D0 beq .L164
  2963. 1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2964. 1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
  2965. 1695 .loc 1 1009 5 is_stmt 1 view .LVU515
  2966. 1696 .loc 1 1009 37 is_stmt 0 view .LVU516
  2967. 1697 0050 0223 movs r3, #2
  2968. 1698 0052 8361 str r3, [r0, #24]
  2969. 1699 .L165:
  2970. 1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2971. 1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
  2972. 1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  2973. 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
  2974. 1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  2975. 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
  2976. 1700 .loc 1 1015 3 is_stmt 1 view .LVU517
  2977. 1701 .loc 1 1015 52 is_stmt 0 view .LVU518
  2978. 1702 0054 1C4A ldr r2, .L166
  2979. 1703 0056 5368 ldr r3, [r2, #4]
  2980. 1704 .loc 1 1015 38 view .LVU519
  2981. 1705 0058 03F48003 and r3, r3, #4194304
  2982. 1706 .loc 1 1015 36 view .LVU520
  2983. 1707 005c C361 str r3, [r0, #28]
  2984. 1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
  2985. 1708 .loc 1 1016 3 is_stmt 1 view .LVU521
  2986. 1709 .loc 1 1016 47 is_stmt 0 view .LVU522
  2987. 1710 005e 5368 ldr r3, [r2, #4]
  2988. 1711 .loc 1 1016 33 view .LVU523
  2989. 1712 0060 03F03F03 and r3, r3, #63
  2990. 1713 .loc 1 1016 31 view .LVU524
  2991. 1714 0064 0362 str r3, [r0, #32]
  2992. 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po
  2993. 1715 .loc 1 1017 3 is_stmt 1 view .LVU525
  2994. 1716 .loc 1 1017 48 is_stmt 0 view .LVU526
  2995. 1717 0066 5368 ldr r3, [r2, #4]
  2996. 1718 .loc 1 1017 33 view .LVU527
  2997. 1719 0068 C3F38813 ubfx r3, r3, #6, #9
  2998. 1720 .loc 1 1017 31 view .LVU528
  2999. 1721 006c 4362 str r3, [r0, #36]
  3000. 1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0
  3001. 1722 .loc 1 1018 3 is_stmt 1 view .LVU529
  3002. 1723 .loc 1 1018 50 is_stmt 0 view .LVU530
  3003. 1724 006e 5368 ldr r3, [r2, #4]
  3004. 1725 .loc 1 1018 60 view .LVU531
  3005. 1726 0070 03F44033 and r3, r3, #196608
  3006. 1727 .loc 1 1018 80 view .LVU532
  3007. 1728 0074 03F58033 add r3, r3, #65536
  3008. 1729 .loc 1 1018 33 view .LVU533
  3009. 1730 0078 DB0B lsrs r3, r3, #15
  3010. 1731 .loc 1 1018 31 view .LVU534
  3011. 1732 007a 8362 str r3, [r0, #40]
  3012. 1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po
  3013. 1733 .loc 1 1019 3 is_stmt 1 view .LVU535
  3014. 1734 .loc 1 1019 48 is_stmt 0 view .LVU536
  3015. 1735 007c 5368 ldr r3, [r2, #4]
  3016. 1736 .loc 1 1019 33 view .LVU537
  3017. ARM GAS /tmp/ccrUqvu4.s page 53
  3018. 1737 007e C3F30363 ubfx r3, r3, #24, #4
  3019. 1738 .loc 1 1019 31 view .LVU538
  3020. 1739 0082 C362 str r3, [r0, #44]
  3021. 1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3022. 1740 .loc 1 1020 1 view .LVU539
  3023. 1741 0084 7047 bx lr
  3024. 1742 .L154:
  3025. 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3026. 1743 .loc 1 961 8 is_stmt 1 view .LVU540
  3027. 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3028. 1744 .loc 1 961 15 is_stmt 0 view .LVU541
  3029. 1745 0086 104B ldr r3, .L166
  3030. 1746 0088 1B68 ldr r3, [r3]
  3031. 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3032. 1747 .loc 1 961 10 view .LVU542
  3033. 1748 008a 13F4803F tst r3, #65536
  3034. 1749 008e 03D0 beq .L156
  3035. 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3036. 1750 .loc 1 963 5 is_stmt 1 view .LVU543
  3037. 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3038. 1751 .loc 1 963 33 is_stmt 0 view .LVU544
  3039. 1752 0090 4FF48033 mov r3, #65536
  3040. 1753 0094 4360 str r3, [r0, #4]
  3041. 1754 0096 BDE7 b .L155
  3042. 1755 .L156:
  3043. 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3044. 1756 .loc 1 967 5 is_stmt 1 view .LVU545
  3045. 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3046. 1757 .loc 1 967 33 is_stmt 0 view .LVU546
  3047. 1758 0098 0023 movs r3, #0
  3048. 1759 009a 4360 str r3, [r0, #4]
  3049. 1760 009c BAE7 b .L155
  3050. 1761 .L157:
  3051. 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3052. 1762 .loc 1 977 5 is_stmt 1 view .LVU547
  3053. 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3054. 1763 .loc 1 977 33 is_stmt 0 view .LVU548
  3055. 1764 009e 0023 movs r3, #0
  3056. 1765 00a0 C360 str r3, [r0, #12]
  3057. 1766 00a2 BEE7 b .L158
  3058. 1767 .L159:
  3059. 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3060. 1768 .loc 1 987 8 is_stmt 1 view .LVU549
  3061. 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3062. 1769 .loc 1 987 15 is_stmt 0 view .LVU550
  3063. 1770 00a4 084B ldr r3, .L166
  3064. 1771 00a6 1B6F ldr r3, [r3, #112]
  3065. 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3066. 1772 .loc 1 987 10 view .LVU551
  3067. 1773 00a8 13F0010F tst r3, #1
  3068. 1774 00ac 02D0 beq .L161
  3069. 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3070. 1775 .loc 1 989 5 is_stmt 1 view .LVU552
  3071. 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3072. 1776 .loc 1 989 33 is_stmt 0 view .LVU553
  3073. 1777 00ae 0123 movs r3, #1
  3074. 1778 00b0 8360 str r3, [r0, #8]
  3075. ARM GAS /tmp/ccrUqvu4.s page 54
  3076. 1779 00b2 C1E7 b .L160
  3077. 1780 .L161:
  3078. 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3079. 1781 .loc 1 993 5 is_stmt 1 view .LVU554
  3080. 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3081. 1782 .loc 1 993 33 is_stmt 0 view .LVU555
  3082. 1783 00b4 0023 movs r3, #0
  3083. 1784 00b6 8360 str r3, [r0, #8]
  3084. 1785 00b8 BEE7 b .L160
  3085. 1786 .L162:
  3086. 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3087. 1787 .loc 1 1003 5 is_stmt 1 view .LVU556
  3088. 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3089. 1788 .loc 1 1003 33 is_stmt 0 view .LVU557
  3090. 1789 00ba 0023 movs r3, #0
  3091. 1790 00bc 4361 str r3, [r0, #20]
  3092. 1791 00be C2E7 b .L163
  3093. 1792 .L164:
  3094. 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3095. 1793 .loc 1 1013 5 is_stmt 1 view .LVU558
  3096. 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3097. 1794 .loc 1 1013 37 is_stmt 0 view .LVU559
  3098. 1795 00c0 0123 movs r3, #1
  3099. 1796 00c2 8361 str r3, [r0, #24]
  3100. 1797 00c4 C6E7 b .L165
  3101. 1798 .L167:
  3102. 1799 00c6 00BF .align 2
  3103. 1800 .L166:
  3104. 1801 00c8 00380240 .word 1073887232
  3105. 1802 .cfi_endproc
  3106. 1803 .LFE140:
  3107. 1805 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits
  3108. 1806 .align 1
  3109. 1807 .global HAL_RCC_GetClockConfig
  3110. 1808 .syntax unified
  3111. 1809 .thumb
  3112. 1810 .thumb_func
  3113. 1812 HAL_RCC_GetClockConfig:
  3114. 1813 .LVL101:
  3115. 1814 .LFB141:
  3116. 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3117. 1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  3118. 1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_ClkInitStruct according to the internal
  3119. 1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers.
  3120. 1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
  3121. 1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured.
  3122. 1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency.
  3123. 1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  3124. 1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  3125. 1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
  3126. 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3127. 1815 .loc 1 1031 1 is_stmt 1 view -0
  3128. 1816 .cfi_startproc
  3129. 1817 @ args = 0, pretend = 0, frame = 0
  3130. 1818 @ frame_needed = 0, uses_anonymous_args = 0
  3131. 1819 @ link register save eliminated.
  3132. 1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/
  3133. ARM GAS /tmp/ccrUqvu4.s page 55
  3134. 1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 |
  3135. 1820 .loc 1 1033 3 view .LVU561
  3136. 1821 .loc 1 1033 32 is_stmt 0 view .LVU562
  3137. 1822 0000 0F23 movs r3, #15
  3138. 1823 0002 0360 str r3, [r0]
  3139. 1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3140. 1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/
  3141. 1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
  3142. 1824 .loc 1 1036 3 is_stmt 1 view .LVU563
  3143. 1825 .loc 1 1036 51 is_stmt 0 view .LVU564
  3144. 1826 0004 0B4B ldr r3, .L169
  3145. 1827 0006 9A68 ldr r2, [r3, #8]
  3146. 1828 .loc 1 1036 37 view .LVU565
  3147. 1829 0008 02F00302 and r2, r2, #3
  3148. 1830 .loc 1 1036 35 view .LVU566
  3149. 1831 000c 4260 str r2, [r0, #4]
  3150. 1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3151. 1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/
  3152. 1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
  3153. 1832 .loc 1 1039 3 is_stmt 1 view .LVU567
  3154. 1833 .loc 1 1039 52 is_stmt 0 view .LVU568
  3155. 1834 000e 9A68 ldr r2, [r3, #8]
  3156. 1835 .loc 1 1039 38 view .LVU569
  3157. 1836 0010 02F0F002 and r2, r2, #240
  3158. 1837 .loc 1 1039 36 view .LVU570
  3159. 1838 0014 8260 str r2, [r0, #8]
  3160. 1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3161. 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/
  3162. 1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
  3163. 1839 .loc 1 1042 3 is_stmt 1 view .LVU571
  3164. 1840 .loc 1 1042 53 is_stmt 0 view .LVU572
  3165. 1841 0016 9A68 ldr r2, [r3, #8]
  3166. 1842 .loc 1 1042 39 view .LVU573
  3167. 1843 0018 02F4E052 and r2, r2, #7168
  3168. 1844 .loc 1 1042 37 view .LVU574
  3169. 1845 001c C260 str r2, [r0, #12]
  3170. 1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3171. 1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/
  3172. 1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
  3173. 1846 .loc 1 1045 3 is_stmt 1 view .LVU575
  3174. 1847 .loc 1 1045 54 is_stmt 0 view .LVU576
  3175. 1848 001e 9B68 ldr r3, [r3, #8]
  3176. 1849 .loc 1 1045 39 view .LVU577
  3177. 1850 0020 DB08 lsrs r3, r3, #3
  3178. 1851 0022 03F4E053 and r3, r3, #7168
  3179. 1852 .loc 1 1045 37 view .LVU578
  3180. 1853 0026 0361 str r3, [r0, #16]
  3181. 1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3182. 1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/
  3183. 1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
  3184. 1854 .loc 1 1048 3 is_stmt 1 view .LVU579
  3185. 1855 .loc 1 1048 32 is_stmt 0 view .LVU580
  3186. 1856 0028 034B ldr r3, .L169+4
  3187. 1857 002a 1B68 ldr r3, [r3]
  3188. 1858 .loc 1 1048 16 view .LVU581
  3189. 1859 002c 03F00F03 and r3, r3, #15
  3190. 1860 .loc 1 1048 14 view .LVU582
  3191. ARM GAS /tmp/ccrUqvu4.s page 56
  3192. 1861 0030 0B60 str r3, [r1]
  3193. 1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3194. 1862 .loc 1 1049 1 view .LVU583
  3195. 1863 0032 7047 bx lr
  3196. 1864 .L170:
  3197. 1865 .align 2
  3198. 1866 .L169:
  3199. 1867 0034 00380240 .word 1073887232
  3200. 1868 0038 003C0240 .word 1073888256
  3201. 1869 .cfi_endproc
  3202. 1870 .LFE141:
  3203. 1872 .section .text.HAL_RCC_CSSCallback,"ax",%progbits
  3204. 1873 .align 1
  3205. 1874 .weak HAL_RCC_CSSCallback
  3206. 1875 .syntax unified
  3207. 1876 .thumb
  3208. 1877 .thumb_func
  3209. 1879 HAL_RCC_CSSCallback:
  3210. 1880 .LFB143:
  3211. 1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3212. 1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  3213. 1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request.
  3214. 1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler().
  3215. 1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  3216. 1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  3217. 1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
  3218. 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3219. 1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */
  3220. 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS))
  3221. 1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3222. 1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */
  3223. 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_RCC_CSSCallback();
  3224. 1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3225. 1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */
  3226. 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
  3227. 1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3228. 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3229. 1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3230. 1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  3231. 1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback
  3232. 1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None
  3233. 1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  3234. 1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
  3235. 1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3236. 1881 .loc 1 1074 1 is_stmt 1 view -0
  3237. 1882 .cfi_startproc
  3238. 1883 @ args = 0, pretend = 0, frame = 0
  3239. 1884 @ frame_needed = 0, uses_anonymous_args = 0
  3240. 1885 @ link register save eliminated.
  3241. 1075:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed,
  3242. 1076:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file
  3243. 1077:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
  3244. 1078:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3245. 1886 .loc 1 1078 1 view .LVU585
  3246. 1887 0000 7047 bx lr
  3247. 1888 .cfi_endproc
  3248. 1889 .LFE143:
  3249. ARM GAS /tmp/ccrUqvu4.s page 57
  3250. 1891 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
  3251. 1892 .align 1
  3252. 1893 .global HAL_RCC_NMI_IRQHandler
  3253. 1894 .syntax unified
  3254. 1895 .thumb
  3255. 1896 .thumb_func
  3256. 1898 HAL_RCC_NMI_IRQHandler:
  3257. 1899 .LFB142:
  3258. 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */
  3259. 1900 .loc 1 1057 1 view -0
  3260. 1901 .cfi_startproc
  3261. 1902 @ args = 0, pretend = 0, frame = 0
  3262. 1903 @ frame_needed = 0, uses_anonymous_args = 0
  3263. 1904 0000 08B5 push {r3, lr}
  3264. 1905 .LCFI16:
  3265. 1906 .cfi_def_cfa_offset 8
  3266. 1907 .cfi_offset 3, -8
  3267. 1908 .cfi_offset 14, -4
  3268. 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3269. 1909 .loc 1 1059 3 view .LVU587
  3270. 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3271. 1910 .loc 1 1059 6 is_stmt 0 view .LVU588
  3272. 1911 0002 064B ldr r3, .L176
  3273. 1912 0004 DB68 ldr r3, [r3, #12]
  3274. 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  3275. 1913 .loc 1 1059 5 view .LVU589
  3276. 1914 0006 13F0800F tst r3, #128
  3277. 1915 000a 00D1 bne .L175
  3278. 1916 .L172:
  3279. 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3280. 1917 .loc 1 1067 1 view .LVU590
  3281. 1918 000c 08BD pop {r3, pc}
  3282. 1919 .L175:
  3283. 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3284. 1920 .loc 1 1062 5 is_stmt 1 view .LVU591
  3285. 1921 000e FFF7FEFF bl HAL_RCC_CSSCallback
  3286. 1922 .LVL102:
  3287. 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  3288. 1923 .loc 1 1065 5 view .LVU592
  3289. 1924 0012 024B ldr r3, .L176
  3290. 1925 0014 8022 movs r2, #128
  3291. 1926 0016 9A73 strb r2, [r3, #14]
  3292. 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
  3293. 1927 .loc 1 1067 1 is_stmt 0 view .LVU593
  3294. 1928 0018 F8E7 b .L172
  3295. 1929 .L177:
  3296. 1930 001a 00BF .align 2
  3297. 1931 .L176:
  3298. 1932 001c 00380240 .word 1073887232
  3299. 1933 .cfi_endproc
  3300. 1934 .LFE142:
  3301. 1936 .text
  3302. 1937 .Letext0:
  3303. 1938 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  3304. 1939 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/
  3305. 1940 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
  3306. 1941 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
  3307. ARM GAS /tmp/ccrUqvu4.s page 58
  3308. 1942 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
  3309. 1943 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  3310. 1944 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
  3311. 1945 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
  3312. 1946 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
  3313. 1947 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
  3314. ARM GAS /tmp/ccrUqvu4.s page 59
  3315. DEFINED SYMBOLS
  3316. *ABS*:0000000000000000 stm32f4xx_hal_rcc.c
  3317. /tmp/ccrUqvu4.s:20 .text.HAL_RCC_DeInit:0000000000000000 $t
  3318. /tmp/ccrUqvu4.s:26 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit
  3319. /tmp/ccrUqvu4.s:42 .text.HAL_RCC_OscConfig:0000000000000000 $t
  3320. /tmp/ccrUqvu4.s:48 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig
  3321. /tmp/ccrUqvu4.s:593 .text.HAL_RCC_OscConfig:0000000000000294 $d
  3322. /tmp/ccrUqvu4.s:599 .text.HAL_RCC_OscConfig:00000000000002a0 $t
  3323. /tmp/ccrUqvu4.s:838 .text.HAL_RCC_OscConfig:0000000000000390 $d
  3324. /tmp/ccrUqvu4.s:844 .text.HAL_RCC_MCOConfig:0000000000000000 $t
  3325. /tmp/ccrUqvu4.s:850 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig
  3326. /tmp/ccrUqvu4.s:1006 .text.HAL_RCC_MCOConfig:0000000000000090 $d
  3327. /tmp/ccrUqvu4.s:1013 .text.HAL_RCC_EnableCSS:0000000000000000 $t
  3328. /tmp/ccrUqvu4.s:1019 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS
  3329. /tmp/ccrUqvu4.s:1036 .text.HAL_RCC_EnableCSS:0000000000000008 $d
  3330. /tmp/ccrUqvu4.s:1041 .text.HAL_RCC_DisableCSS:0000000000000000 $t
  3331. /tmp/ccrUqvu4.s:1047 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS
  3332. /tmp/ccrUqvu4.s:1064 .text.HAL_RCC_DisableCSS:0000000000000008 $d
  3333. /tmp/ccrUqvu4.s:1070 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t
  3334. /tmp/ccrUqvu4.s:1076 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq
  3335. /tmp/ccrUqvu4.s:1192 .text.HAL_RCC_GetSysClockFreq:0000000000000098 $d
  3336. /tmp/ccrUqvu4.s:1199 .text.HAL_RCC_ClockConfig:0000000000000000 $t
  3337. /tmp/ccrUqvu4.s:1205 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig
  3338. /tmp/ccrUqvu4.s:1499 .text.HAL_RCC_ClockConfig:000000000000014c $d
  3339. /tmp/ccrUqvu4.s:1507 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t
  3340. /tmp/ccrUqvu4.s:1513 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq
  3341. /tmp/ccrUqvu4.s:1528 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d
  3342. /tmp/ccrUqvu4.s:1533 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t
  3343. /tmp/ccrUqvu4.s:1539 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq
  3344. /tmp/ccrUqvu4.s:1568 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d
  3345. /tmp/ccrUqvu4.s:1574 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 $t
  3346. /tmp/ccrUqvu4.s:1580 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 HAL_RCC_GetPCLK2Freq
  3347. /tmp/ccrUqvu4.s:1609 .text.HAL_RCC_GetPCLK2Freq:0000000000000018 $d
  3348. /tmp/ccrUqvu4.s:1615 .text.HAL_RCC_GetOscConfig:0000000000000000 $t
  3349. /tmp/ccrUqvu4.s:1621 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig
  3350. /tmp/ccrUqvu4.s:1801 .text.HAL_RCC_GetOscConfig:00000000000000c8 $d
  3351. /tmp/ccrUqvu4.s:1806 .text.HAL_RCC_GetClockConfig:0000000000000000 $t
  3352. /tmp/ccrUqvu4.s:1812 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig
  3353. /tmp/ccrUqvu4.s:1867 .text.HAL_RCC_GetClockConfig:0000000000000034 $d
  3354. /tmp/ccrUqvu4.s:1873 .text.HAL_RCC_CSSCallback:0000000000000000 $t
  3355. /tmp/ccrUqvu4.s:1879 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback
  3356. /tmp/ccrUqvu4.s:1892 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t
  3357. /tmp/ccrUqvu4.s:1898 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler
  3358. /tmp/ccrUqvu4.s:1932 .text.HAL_RCC_NMI_IRQHandler:000000000000001c $d
  3359. UNDEFINED SYMBOLS
  3360. HAL_GetTick
  3361. HAL_GPIO_Init
  3362. __aeabi_uldivmod
  3363. HAL_InitTick
  3364. AHBPrescTable
  3365. SystemCoreClock
  3366. APBPrescTable