ARM GAS /tmp/ccrUqvu4.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_rcc.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_RCC_DeInit,"ax",%progbits 20 .align 1 21 .weak HAL_RCC_DeInit 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_RCC_DeInit: 27 .LFB130: 28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @file stm32f4xx_hal_rcc.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SRAM, Flash and JTAG. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses; 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** all peripherals mapped on these busses are running at HSI speed. 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** are assigned to be used for debug purpose. 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Once the device started from reset, the user application has to: 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance) 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings ARM GAS /tmp/ccrUqvu4.s page 2 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG) 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC Limitations ##### 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from/to registers. 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Implemented Workaround: 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) For AHB & APB peripherals, a dummy read to the peripheral register has been 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @attention 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *

© Copyright (c) 2017 STMicroelectronics. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * All rights reserved.

59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license, 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * License. You may obtain a copy of the License at: 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h" 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccrUqvu4.s page 3 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT GPIOC 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN GPIO_PIN_9 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/ 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initialization and Configuration functions 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and APB2). 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the PLL as System clock source. 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source. 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring two different output clocks: 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 168 MHz) 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz). 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System ARM GAS /tmp/ccrUqvu4.s page 4 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PA8 pin. 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PC9 pin. 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] System, AHB and APB busses clocks configuration 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HSE and PLL. 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the peripherals mapped on these busses. You can use 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz. 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices, 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz, 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 84 MHz and PCLK1 42 MHz. 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz, 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 100 MHz and PCLK1 50 MHz. 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSI ON and used as system clock source 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSE and PLL OFF 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - CSS, MCO1 and MCO2 OFF 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - All interrupts disabled 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - Peripheral clocks 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ ARM GAS /tmp/ccrUqvu4.s page 5 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void) 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 29 .loc 1 203 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 0 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 34 .loc 1 204 3 view .LVU1 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 35 .loc 1 205 1 is_stmt 0 view .LVU2 36 0000 0020 movs r0, #0 37 0002 7047 bx lr 38 .cfi_endproc 39 .LFE130: 41 .section .text.HAL_RCC_OscConfig,"ax",%progbits 42 .align 1 43 .weak HAL_RCC_OscConfig 44 .syntax unified 45 .thumb 46 .thumb_func 48 HAL_RCC_OscConfig: 49 .LVL0: 50 .LFB131: 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC_OscInitTypeDef. 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to LSE Off 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to HSE Off 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 51 .loc 1 222 1 is_stmt 1 view -0 52 .cfi_startproc 53 @ args = 0, pretend = 0, frame = 8 54 @ frame_needed = 0, uses_anonymous_args = 0 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 55 .loc 1 223 3 view .LVU4 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) 56 .loc 1 226 3 view .LVU5 57 .loc 1 226 5 is_stmt 0 view .LVU6 58 0000 0028 cmp r0, #0 59 0002 00F0BA81 beq .L51 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 60 .loc 1 222 1 view .LVU7 61 0006 70B5 push {r4, r5, r6, lr} ARM GAS /tmp/ccrUqvu4.s page 6 62 .LCFI0: 63 .cfi_def_cfa_offset 16 64 .cfi_offset 4, -16 65 .cfi_offset 5, -12 66 .cfi_offset 6, -8 67 .cfi_offset 14, -4 68 0008 82B0 sub sp, sp, #8 69 .LCFI1: 70 .cfi_def_cfa_offset 24 71 000a 0446 mov r4, r0 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 72 .loc 1 232 3 is_stmt 1 view .LVU8 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 73 .loc 1 234 3 view .LVU9 74 .loc 1 234 25 is_stmt 0 view .LVU10 75 000c 0368 ldr r3, [r0] 76 .loc 1 234 5 view .LVU11 77 000e 13F0010F tst r3, #1 78 0012 3BD0 beq .L4 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 79 .loc 1 237 5 is_stmt 1 view .LVU12 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 80 .loc 1 239 5 view .LVU13 81 .loc 1 239 9 is_stmt 0 view .LVU14 82 0014 9F4B ldr r3, .L87 83 0016 9B68 ldr r3, [r3, #8] 84 0018 03F00C03 and r3, r3, #12 85 .loc 1 239 7 view .LVU15 86 001c 042B cmp r3, #4 87 001e 2CD0 beq .L5 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 88 .loc 1 240 9 discriminator 1 view .LVU16 89 0020 9C4B ldr r3, .L87 90 0022 9B68 ldr r3, [r3, #8] 91 0024 03F00C03 and r3, r3, #12 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 92 .loc 1 239 60 discriminator 1 view .LVU17 93 0028 082B cmp r3, #8 94 002a 21D0 beq .L73 95 .L6: 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 7 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 96 .loc 1 250 7 is_stmt 1 view .LVU18 97 .loc 1 250 7 view .LVU19 98 002c 6368 ldr r3, [r4, #4] 99 002e B3F5803F cmp r3, #65536 100 0032 4FD0 beq .L74 101 .loc 1 250 7 discriminator 2 view .LVU20 102 0034 B3F5A02F cmp r3, #327680 103 0038 52D0 beq .L75 104 .loc 1 250 7 discriminator 5 view .LVU21 105 003a 964B ldr r3, .L87 106 003c 1A68 ldr r2, [r3] 107 003e 22F48032 bic r2, r2, #65536 108 0042 1A60 str r2, [r3] 109 .loc 1 250 7 discriminator 5 view .LVU22 110 0044 1A68 ldr r2, [r3] 111 0046 22F48022 bic r2, r2, #262144 112 004a 1A60 str r2, [r3] 113 .L8: 114 .loc 1 250 7 discriminator 7 view .LVU23 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE State */ 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 115 .loc 1 253 7 discriminator 7 view .LVU24 116 .loc 1 253 28 is_stmt 0 discriminator 7 view .LVU25 117 004c 6368 ldr r3, [r4, #4] 118 .loc 1 253 9 discriminator 7 view .LVU26 119 004e 002B cmp r3, #0 120 0050 50D0 beq .L10 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 121 .loc 1 256 9 is_stmt 1 view .LVU27 122 .loc 1 256 21 is_stmt 0 view .LVU28 123 0052 FFF7FEFF bl HAL_GetTick 124 .LVL1: 125 .loc 1 256 21 view .LVU29 126 0056 0546 mov r5, r0 127 .LVL2: 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is ready */ 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 128 .loc 1 259 9 is_stmt 1 view .LVU30 129 .L11: 130 .loc 1 259 14 view .LVU31 131 .loc 1 259 15 is_stmt 0 view .LVU32 132 0058 8E4B ldr r3, .L87 133 005a 1B68 ldr r3, [r3] 134 .loc 1 259 14 view .LVU33 135 005c 13F4003F tst r3, #131072 136 0060 14D1 bne .L4 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 137 .loc 1 261 11 is_stmt 1 view .LVU34 138 .loc 1 261 15 is_stmt 0 view .LVU35 139 0062 FFF7FEFF bl HAL_GetTick ARM GAS /tmp/ccrUqvu4.s page 8 140 .LVL3: 141 .loc 1 261 29 view .LVU36 142 0066 401B subs r0, r0, r5 143 .loc 1 261 13 view .LVU37 144 0068 6428 cmp r0, #100 145 006a F5D9 bls .L11 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 146 .loc 1 263 20 view .LVU38 147 006c 0320 movs r0, #3 148 006e 8BE1 b .L3 149 .LVL4: 150 .L73: 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 151 .loc 1 240 68 view .LVU39 152 0070 884B ldr r3, .L87 153 0072 5B68 ldr r3, [r3, #4] 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 154 .loc 1 240 60 view .LVU40 155 0074 13F4800F tst r3, #4194304 156 0078 D8D0 beq .L6 157 .L5: 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 158 .loc 1 242 7 is_stmt 1 view .LVU41 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 159 .loc 1 242 11 is_stmt 0 view .LVU42 160 007a 864B ldr r3, .L87 161 007c 1B68 ldr r3, [r3] 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 162 .loc 1 242 9 view .LVU43 163 007e 13F4003F tst r3, #131072 164 0082 03D0 beq .L4 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 165 .loc 1 242 78 discriminator 1 view .LVU44 166 0084 6368 ldr r3, [r4, #4] 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 167 .loc 1 242 57 discriminator 1 view .LVU45 168 0086 002B cmp r3, #0 169 0088 00F07981 beq .L76 170 .LVL5: 171 .L4: 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is bypassed or disabled */ 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } ARM GAS /tmp/ccrUqvu4.s page 9 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 172 .loc 1 284 3 is_stmt 1 view .LVU46 173 .loc 1 284 25 is_stmt 0 view .LVU47 174 008c 2368 ldr r3, [r4] 175 .loc 1 284 5 view .LVU48 176 008e 13F0020F tst r3, #2 177 0092 54D0 beq .L15 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 178 .loc 1 287 5 is_stmt 1 view .LVU49 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 179 .loc 1 288 5 view .LVU50 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 180 .loc 1 291 5 view .LVU51 181 .loc 1 291 9 is_stmt 0 view .LVU52 182 0094 7F4B ldr r3, .L87 183 0096 9B68 ldr r3, [r3, #8] 184 .loc 1 291 7 view .LVU53 185 0098 13F00C0F tst r3, #12 186 009c 3ED0 beq .L16 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 187 .loc 1 292 9 discriminator 1 view .LVU54 188 009e 7D4B ldr r3, .L87 189 00a0 9B68 ldr r3, [r3, #8] 190 00a2 03F00C03 and r3, r3, #12 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 191 .loc 1 291 60 discriminator 1 view .LVU55 192 00a6 082B cmp r3, #8 193 00a8 33D0 beq .L77 194 .L17: 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI State */ 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) 195 .loc 1 309 7 is_stmt 1 view .LVU56 196 .loc 1 309 28 is_stmt 0 view .LVU57 197 00aa E368 ldr r3, [r4, #12] ARM GAS /tmp/ccrUqvu4.s page 10 198 .loc 1 309 9 view .LVU58 199 00ac 002B cmp r3, #0 200 00ae 68D0 beq .L19 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 201 .loc 1 312 9 is_stmt 1 view .LVU59 202 00b0 794B ldr r3, .L87+4 203 00b2 0122 movs r2, #1 204 00b4 1A60 str r2, [r3] 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 205 .loc 1 315 9 view .LVU60 206 .loc 1 315 21 is_stmt 0 view .LVU61 207 00b6 FFF7FEFF bl HAL_GetTick 208 .LVL6: 209 00ba 0546 mov r5, r0 210 .LVL7: 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 211 .loc 1 318 9 is_stmt 1 view .LVU62 212 .L20: 213 .loc 1 318 14 view .LVU63 214 .loc 1 318 15 is_stmt 0 view .LVU64 215 00bc 754B ldr r3, .L87 216 00be 1B68 ldr r3, [r3] 217 .loc 1 318 14 view .LVU65 218 00c0 13F0020F tst r3, #2 219 00c4 54D1 bne .L78 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 220 .loc 1 320 11 is_stmt 1 view .LVU66 221 .loc 1 320 15 is_stmt 0 view .LVU67 222 00c6 FFF7FEFF bl HAL_GetTick 223 .LVL8: 224 .loc 1 320 29 view .LVU68 225 00ca 401B subs r0, r0, r5 226 .loc 1 320 13 view .LVU69 227 00cc 0228 cmp r0, #2 228 00ce F5D9 bls .L20 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 229 .loc 1 322 20 view .LVU70 230 00d0 0320 movs r0, #3 231 00d2 59E1 b .L3 232 .LVL9: 233 .L74: 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 234 .loc 1 250 7 is_stmt 1 discriminator 1 view .LVU71 235 00d4 6F4A ldr r2, .L87 236 00d6 1368 ldr r3, [r2] 237 00d8 43F48033 orr r3, r3, #65536 238 00dc 1360 str r3, [r2] 239 00de B5E7 b .L8 240 .L75: ARM GAS /tmp/ccrUqvu4.s page 11 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 241 .loc 1 250 7 discriminator 4 view .LVU72 242 00e0 6C4B ldr r3, .L87 243 00e2 1A68 ldr r2, [r3] 244 00e4 42F48022 orr r2, r2, #262144 245 00e8 1A60 str r2, [r3] 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 246 .loc 1 250 7 discriminator 4 view .LVU73 247 00ea 1A68 ldr r2, [r3] 248 00ec 42F48032 orr r2, r2, #65536 249 00f0 1A60 str r2, [r3] 250 00f2 ABE7 b .L8 251 .L10: 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 252 .loc 1 270 9 view .LVU74 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 253 .loc 1 270 21 is_stmt 0 view .LVU75 254 00f4 FFF7FEFF bl HAL_GetTick 255 .LVL10: 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 256 .loc 1 270 21 view .LVU76 257 00f8 0546 mov r5, r0 258 .LVL11: 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 259 .loc 1 273 9 is_stmt 1 view .LVU77 260 .L13: 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 261 .loc 1 273 14 view .LVU78 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 262 .loc 1 273 15 is_stmt 0 view .LVU79 263 00fa 664B ldr r3, .L87 264 00fc 1B68 ldr r3, [r3] 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 265 .loc 1 273 14 view .LVU80 266 00fe 13F4003F tst r3, #131072 267 0102 C3D0 beq .L4 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 268 .loc 1 275 11 is_stmt 1 view .LVU81 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 269 .loc 1 275 15 is_stmt 0 view .LVU82 270 0104 FFF7FEFF bl HAL_GetTick 271 .LVL12: 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 272 .loc 1 275 29 view .LVU83 273 0108 401B subs r0, r0, r5 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 274 .loc 1 275 13 view .LVU84 275 010a 6428 cmp r0, #100 276 010c F5D9 bls .L13 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 277 .loc 1 277 20 view .LVU85 278 010e 0320 movs r0, #3 279 0110 3AE1 b .L3 280 .LVL13: 281 .L77: 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 282 .loc 1 292 68 view .LVU86 ARM GAS /tmp/ccrUqvu4.s page 12 283 0112 604B ldr r3, .L87 284 0114 5B68 ldr r3, [r3, #4] 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 285 .loc 1 292 60 view .LVU87 286 0116 13F4800F tst r3, #4194304 287 011a C6D1 bne .L17 288 .L16: 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 289 .loc 1 295 7 is_stmt 1 view .LVU88 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 290 .loc 1 295 11 is_stmt 0 view .LVU89 291 011c 5D4B ldr r3, .L87 292 011e 1B68 ldr r3, [r3] 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 293 .loc 1 295 9 view .LVU90 294 0120 13F0020F tst r3, #2 295 0124 03D0 beq .L18 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 296 .loc 1 295 78 discriminator 1 view .LVU91 297 0126 E368 ldr r3, [r4, #12] 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 298 .loc 1 295 57 discriminator 1 view .LVU92 299 0128 012B cmp r3, #1 300 012a 40F02A81 bne .L55 301 .L18: 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 302 .loc 1 303 9 is_stmt 1 view .LVU93 303 012e 594A ldr r2, .L87 304 0130 1368 ldr r3, [r2] 305 0132 23F0F803 bic r3, r3, #248 306 0136 2169 ldr r1, [r4, #16] 307 0138 43EAC103 orr r3, r3, r1, lsl #3 308 013c 1360 str r3, [r2] 309 .L15: 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } ARM GAS /tmp/ccrUqvu4.s page 13 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 310 .loc 1 349 3 view .LVU94 311 .loc 1 349 25 is_stmt 0 view .LVU95 312 013e 2368 ldr r3, [r4] 313 .loc 1 349 5 view .LVU96 314 0140 13F0080F tst r3, #8 315 0144 42D0 beq .L24 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 316 .loc 1 352 5 is_stmt 1 view .LVU97 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSI State */ 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) 317 .loc 1 355 5 view .LVU98 318 .loc 1 355 26 is_stmt 0 view .LVU99 319 0146 6369 ldr r3, [r4, #20] 320 .loc 1 355 7 view .LVU100 321 0148 6BB3 cbz r3, .L25 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 322 .loc 1 358 7 is_stmt 1 view .LVU101 323 014a 534B ldr r3, .L87+4 324 014c 0122 movs r2, #1 325 014e C3F8802E str r2, [r3, #3712] 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 326 .loc 1 361 7 view .LVU102 327 .loc 1 361 19 is_stmt 0 view .LVU103 328 0152 FFF7FEFF bl HAL_GetTick 329 .LVL14: 330 0156 0546 mov r5, r0 331 .LVL15: 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 332 .loc 1 364 7 is_stmt 1 view .LVU104 333 .L26: 334 .loc 1 364 12 view .LVU105 335 .loc 1 364 13 is_stmt 0 view .LVU106 336 0158 4E4B ldr r3, .L87 337 015a 5B6F ldr r3, [r3, #116] 338 .loc 1 364 12 view .LVU107 339 015c 13F0020F tst r3, #2 340 0160 34D1 bne .L24 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 341 .loc 1 366 9 is_stmt 1 view .LVU108 342 .loc 1 366 13 is_stmt 0 view .LVU109 343 0162 FFF7FEFF bl HAL_GetTick 344 .LVL16: 345 .loc 1 366 27 view .LVU110 ARM GAS /tmp/ccrUqvu4.s page 14 346 0166 401B subs r0, r0, r5 347 .loc 1 366 11 view .LVU111 348 0168 0228 cmp r0, #2 349 016a F5D9 bls .L26 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 350 .loc 1 368 18 view .LVU112 351 016c 0320 movs r0, #3 352 016e 0BE1 b .L3 353 .L78: 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 354 .loc 1 327 9 is_stmt 1 view .LVU113 355 0170 484A ldr r2, .L87 356 0172 1368 ldr r3, [r2] 357 0174 23F0F803 bic r3, r3, #248 358 0178 2169 ldr r1, [r4, #16] 359 017a 43EAC103 orr r3, r3, r1, lsl #3 360 017e 1360 str r3, [r2] 361 0180 DDE7 b .L15 362 .LVL17: 363 .L19: 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 364 .loc 1 332 9 view .LVU114 365 0182 454B ldr r3, .L87+4 366 0184 0022 movs r2, #0 367 0186 1A60 str r2, [r3] 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 368 .loc 1 335 9 view .LVU115 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 369 .loc 1 335 21 is_stmt 0 view .LVU116 370 0188 FFF7FEFF bl HAL_GetTick 371 .LVL18: 372 018c 0546 mov r5, r0 373 .LVL19: 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 374 .loc 1 338 9 is_stmt 1 view .LVU117 375 .L22: 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 376 .loc 1 338 14 view .LVU118 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 377 .loc 1 338 15 is_stmt 0 view .LVU119 378 018e 414B ldr r3, .L87 379 0190 1B68 ldr r3, [r3] 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 380 .loc 1 338 14 view .LVU120 381 0192 13F0020F tst r3, #2 382 0196 D2D0 beq .L15 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 383 .loc 1 340 11 is_stmt 1 view .LVU121 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 384 .loc 1 340 15 is_stmt 0 view .LVU122 385 0198 FFF7FEFF bl HAL_GetTick 386 .LVL20: 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 387 .loc 1 340 29 view .LVU123 388 019c 401B subs r0, r0, r5 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 15 389 .loc 1 340 13 view .LVU124 390 019e 0228 cmp r0, #2 391 01a0 F5D9 bls .L22 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 392 .loc 1 342 20 view .LVU125 393 01a2 0320 movs r0, #3 394 01a4 F0E0 b .L3 395 .LVL21: 396 .L25: 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 397 .loc 1 375 7 is_stmt 1 view .LVU126 398 01a6 3C4B ldr r3, .L87+4 399 01a8 0022 movs r2, #0 400 01aa C3F8802E str r2, [r3, #3712] 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 401 .loc 1 378 7 view .LVU127 402 .loc 1 378 19 is_stmt 0 view .LVU128 403 01ae FFF7FEFF bl HAL_GetTick 404 .LVL22: 405 01b2 0546 mov r5, r0 406 .LVL23: 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 407 .loc 1 381 7 is_stmt 1 view .LVU129 408 .L28: 409 .loc 1 381 12 view .LVU130 410 .loc 1 381 13 is_stmt 0 view .LVU131 411 01b4 374B ldr r3, .L87 412 01b6 5B6F ldr r3, [r3, #116] 413 .loc 1 381 12 view .LVU132 414 01b8 13F0020F tst r3, #2 415 01bc 06D0 beq .L24 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 416 .loc 1 383 9 is_stmt 1 view .LVU133 417 .loc 1 383 13 is_stmt 0 view .LVU134 418 01be FFF7FEFF bl HAL_GetTick 419 .LVL24: 420 .loc 1 383 27 view .LVU135 421 01c2 401B subs r0, r0, r5 422 .loc 1 383 11 view .LVU136 423 01c4 0228 cmp r0, #2 424 01c6 F5D9 bls .L28 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 425 .loc 1 385 18 view .LVU137 426 01c8 0320 movs r0, #3 427 01ca DDE0 b .L3 ARM GAS /tmp/ccrUqvu4.s page 16 428 .LVL25: 429 .L24: 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 430 .loc 1 391 3 is_stmt 1 view .LVU138 431 .loc 1 391 25 is_stmt 0 view .LVU139 432 01cc 2368 ldr r3, [r4] 433 .loc 1 391 5 view .LVU140 434 01ce 13F0040F tst r3, #4 435 01d2 77D0 beq .L30 436 .LBB2: 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 437 .loc 1 393 5 is_stmt 1 view .LVU141 438 .LVL26: 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 439 .loc 1 396 5 view .LVU142 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 440 .loc 1 400 5 view .LVU143 441 .loc 1 400 8 is_stmt 0 view .LVU144 442 01d4 2F4B ldr r3, .L87 443 01d6 1B6C ldr r3, [r3, #64] 444 .loc 1 400 7 view .LVU145 445 01d8 13F0805F tst r3, #268435456 446 01dc 33D1 bne .L60 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 447 .loc 1 402 7 is_stmt 1 view .LVU146 448 .LBB3: 449 .loc 1 402 7 view .LVU147 450 01de 0023 movs r3, #0 451 01e0 0193 str r3, [sp, #4] 452 .loc 1 402 7 view .LVU148 453 01e2 2C4B ldr r3, .L87 454 01e4 1A6C ldr r2, [r3, #64] 455 01e6 42F08052 orr r2, r2, #268435456 456 01ea 1A64 str r2, [r3, #64] 457 .loc 1 402 7 view .LVU149 458 01ec 1B6C ldr r3, [r3, #64] 459 01ee 03F08053 and r3, r3, #268435456 460 01f2 0193 str r3, [sp, #4] 461 .loc 1 402 7 view .LVU150 462 01f4 019B ldr r3, [sp, #4] 463 .LBE3: 464 .loc 1 402 7 view .LVU151 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pwrclkchanged = SET; 465 .loc 1 403 7 view .LVU152 466 .LVL27: ARM GAS /tmp/ccrUqvu4.s page 17 467 .loc 1 403 21 is_stmt 0 view .LVU153 468 01f6 0125 movs r5, #1 469 .LVL28: 470 .L31: 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 471 .loc 1 406 5 is_stmt 1 view .LVU154 472 .loc 1 406 8 is_stmt 0 view .LVU155 473 01f8 284B ldr r3, .L87+8 474 01fa 1B68 ldr r3, [r3] 475 .loc 1 406 7 view .LVU156 476 01fc 13F4807F tst r3, #256 477 0200 23D0 beq .L79 478 .L32: 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable write access to Backup domain */ 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 479 .loc 1 424 5 is_stmt 1 view .LVU157 480 .loc 1 424 5 view .LVU158 481 0202 A368 ldr r3, [r4, #8] 482 0204 012B cmp r3, #1 483 0206 34D0 beq .L80 484 .loc 1 424 5 discriminator 2 view .LVU159 485 0208 052B cmp r3, #5 486 020a 38D0 beq .L81 487 .loc 1 424 5 discriminator 5 view .LVU160 488 020c 214B ldr r3, .L87 489 020e 1A6F ldr r2, [r3, #112] 490 0210 22F00102 bic r2, r2, #1 491 0214 1A67 str r2, [r3, #112] 492 .loc 1 424 5 discriminator 5 view .LVU161 493 0216 1A6F ldr r2, [r3, #112] 494 0218 22F00402 bic r2, r2, #4 495 021c 1A67 str r2, [r3, #112] 496 .L36: 497 .loc 1 424 5 discriminator 7 view .LVU162 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 498 .loc 1 426 5 discriminator 7 view .LVU163 499 .loc 1 426 26 is_stmt 0 discriminator 7 view .LVU164 500 021e A368 ldr r3, [r4, #8] ARM GAS /tmp/ccrUqvu4.s page 18 501 .loc 1 426 7 discriminator 7 view .LVU165 502 0220 002B cmp r3, #0 503 0222 3DD0 beq .L38 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 504 .loc 1 429 7 is_stmt 1 view .LVU166 505 .loc 1 429 19 is_stmt 0 view .LVU167 506 0224 FFF7FEFF bl HAL_GetTick 507 .LVL29: 508 0228 0646 mov r6, r0 509 .LVL30: 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 510 .loc 1 432 7 is_stmt 1 view .LVU168 511 .L39: 512 .loc 1 432 12 view .LVU169 513 .loc 1 432 13 is_stmt 0 view .LVU170 514 022a 1A4B ldr r3, .L87 515 022c 1B6F ldr r3, [r3, #112] 516 .loc 1 432 12 view .LVU171 517 022e 13F0020F tst r3, #2 518 0232 46D1 bne .L41 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 519 .loc 1 434 9 is_stmt 1 view .LVU172 520 .loc 1 434 13 is_stmt 0 view .LVU173 521 0234 FFF7FEFF bl HAL_GetTick 522 .LVL31: 523 .loc 1 434 27 view .LVU174 524 0238 801B subs r0, r0, r6 525 .loc 1 434 11 view .LVU175 526 023a 41F28833 movw r3, #5000 527 023e 9842 cmp r0, r3 528 0240 F3D9 bls .L39 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 529 .loc 1 436 18 view .LVU176 530 0242 0320 movs r0, #3 531 0244 A0E0 b .L3 532 .LVL32: 533 .L60: 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 534 .loc 1 393 22 view .LVU177 535 0246 0025 movs r5, #0 536 0248 D6E7 b .L31 537 .LVL33: 538 .L79: 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 539 .loc 1 409 7 is_stmt 1 view .LVU178 540 024a 144A ldr r2, .L87+8 541 024c 1368 ldr r3, [r2] 542 024e 43F48073 orr r3, r3, #256 543 0252 1360 str r3, [r2] 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 544 .loc 1 412 7 view .LVU179 ARM GAS /tmp/ccrUqvu4.s page 19 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 545 .loc 1 412 19 is_stmt 0 view .LVU180 546 0254 FFF7FEFF bl HAL_GetTick 547 .LVL34: 548 0258 0646 mov r6, r0 549 .LVL35: 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 550 .loc 1 414 7 is_stmt 1 view .LVU181 551 .L33: 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 552 .loc 1 414 12 view .LVU182 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 553 .loc 1 414 13 is_stmt 0 view .LVU183 554 025a 104B ldr r3, .L87+8 555 025c 1B68 ldr r3, [r3] 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 556 .loc 1 414 12 view .LVU184 557 025e 13F4807F tst r3, #256 558 0262 CED1 bne .L32 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 559 .loc 1 416 9 is_stmt 1 view .LVU185 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 560 .loc 1 416 13 is_stmt 0 view .LVU186 561 0264 FFF7FEFF bl HAL_GetTick 562 .LVL36: 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 563 .loc 1 416 27 view .LVU187 564 0268 801B subs r0, r0, r6 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 565 .loc 1 416 11 view .LVU188 566 026a 0228 cmp r0, #2 567 026c F5D9 bls .L33 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 568 .loc 1 418 18 view .LVU189 569 026e 0320 movs r0, #3 570 0270 8AE0 b .L3 571 .LVL37: 572 .L80: 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 573 .loc 1 424 5 is_stmt 1 discriminator 1 view .LVU190 574 0272 084A ldr r2, .L87 575 0274 136F ldr r3, [r2, #112] 576 0276 43F00103 orr r3, r3, #1 577 027a 1367 str r3, [r2, #112] 578 027c CFE7 b .L36 579 .L81: 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 580 .loc 1 424 5 discriminator 4 view .LVU191 581 027e 054B ldr r3, .L87 582 0280 1A6F ldr r2, [r3, #112] 583 0282 42F00402 orr r2, r2, #4 584 0286 1A67 str r2, [r3, #112] 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 585 .loc 1 424 5 discriminator 4 view .LVU192 586 0288 1A6F ldr r2, [r3, #112] 587 028a 42F00102 orr r2, r2, #1 588 028e 1A67 str r2, [r3, #112] ARM GAS /tmp/ccrUqvu4.s page 20 589 0290 C5E7 b .L36 590 .L88: 591 0292 00BF .align 2 592 .L87: 593 0294 00380240 .word 1073887232 594 0298 00004742 .word 1111949312 595 029c 00700040 .word 1073770496 596 .L38: 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 597 .loc 1 443 7 view .LVU193 598 .loc 1 443 19 is_stmt 0 view .LVU194 599 02a0 FFF7FEFF bl HAL_GetTick 600 .LVL38: 601 02a4 0646 mov r6, r0 602 .LVL39: 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 603 .loc 1 446 7 is_stmt 1 view .LVU195 604 .L42: 605 .loc 1 446 12 view .LVU196 606 .loc 1 446 13 is_stmt 0 view .LVU197 607 02a6 3A4B ldr r3, .L89 608 02a8 1B6F ldr r3, [r3, #112] 609 .loc 1 446 12 view .LVU198 610 02aa 13F0020F tst r3, #2 611 02ae 08D0 beq .L41 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 612 .loc 1 448 9 is_stmt 1 view .LVU199 613 .loc 1 448 13 is_stmt 0 view .LVU200 614 02b0 FFF7FEFF bl HAL_GetTick 615 .LVL40: 616 .loc 1 448 27 view .LVU201 617 02b4 801B subs r0, r0, r6 618 .loc 1 448 11 view .LVU202 619 02b6 41F28833 movw r3, #5000 620 02ba 9842 cmp r0, r3 621 02bc F3D9 bls .L42 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 622 .loc 1 450 18 view .LVU203 623 02be 0320 movs r0, #3 624 02c0 62E0 b .L3 625 .L41: 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Restore clock configuration if changed */ 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(pwrclkchanged == SET) ARM GAS /tmp/ccrUqvu4.s page 21 626 .loc 1 456 5 is_stmt 1 view .LVU204 627 .loc 1 456 7 is_stmt 0 view .LVU205 628 02c2 E5B9 cbnz r5, .L82 629 .LVL41: 630 .L30: 631 .loc 1 456 7 view .LVU206 632 .LBE2: 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 633 .loc 1 463 3 is_stmt 1 view .LVU207 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 634 .loc 1 464 3 view .LVU208 635 .loc 1 464 30 is_stmt 0 view .LVU209 636 02c4 A369 ldr r3, [r4, #24] 637 .loc 1 464 6 view .LVU210 638 02c6 002B cmp r3, #0 639 02c8 5DD0 beq .L64 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 640 .loc 1 467 5 is_stmt 1 view .LVU211 641 .loc 1 467 8 is_stmt 0 view .LVU212 642 02ca 314A ldr r2, .L89 643 02cc 9268 ldr r2, [r2, #8] 644 02ce 02F00C02 and r2, r2, #12 645 .loc 1 467 7 view .LVU213 646 02d2 082A cmp r2, #8 647 02d4 5AD0 beq .L65 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 648 .loc 1 469 7 is_stmt 1 view .LVU214 649 .loc 1 469 9 is_stmt 0 view .LVU215 650 02d6 022B cmp r3, #2 651 02d8 17D0 beq .L83 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) ARM GAS /tmp/ccrUqvu4.s page 22 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */ 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the main PLL. */ 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 652 .loc 1 517 9 is_stmt 1 view .LVU216 653 02da 2E4B ldr r3, .L89+4 654 02dc 0022 movs r2, #0 655 02de 1A66 str r2, [r3, #96] 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 656 .loc 1 520 9 view .LVU217 657 .loc 1 520 21 is_stmt 0 view .LVU218 658 02e0 FFF7FEFF bl HAL_GetTick 659 .LVL42: 660 02e4 0446 mov r4, r0 661 .LVL43: 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 662 .loc 1 523 9 is_stmt 1 view .LVU219 663 .L49: 664 .loc 1 523 14 view .LVU220 665 .loc 1 523 15 is_stmt 0 view .LVU221 666 02e6 2A4B ldr r3, .L89 667 02e8 1B68 ldr r3, [r3] 668 .loc 1 523 14 view .LVU222 669 02ea 13F0007F tst r3, #33554432 670 02ee 42D0 beq .L84 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) ARM GAS /tmp/ccrUqvu4.s page 23 671 .loc 1 525 11 is_stmt 1 view .LVU223 672 .loc 1 525 15 is_stmt 0 view .LVU224 673 02f0 FFF7FEFF bl HAL_GetTick 674 .LVL44: 675 .loc 1 525 29 view .LVU225 676 02f4 001B subs r0, r0, r4 677 .loc 1 525 13 view .LVU226 678 02f6 0228 cmp r0, #2 679 02f8 F5D9 bls .L49 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 680 .loc 1 527 20 view .LVU227 681 02fa 0320 movs r0, #3 682 02fc 44E0 b .L3 683 .LVL45: 684 .L82: 685 .LBB4: 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 686 .loc 1 458 7 is_stmt 1 view .LVU228 687 02fe 244A ldr r2, .L89 688 0300 136C ldr r3, [r2, #64] 689 0302 23F08053 bic r3, r3, #268435456 690 0306 1364 str r3, [r2, #64] 691 0308 DCE7 b .L30 692 .LVL46: 693 .L83: 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 694 .loc 1 458 7 is_stmt 0 view .LVU229 695 .LBE4: 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 696 .loc 1 472 9 is_stmt 1 view .LVU230 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 697 .loc 1 473 9 view .LVU231 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 698 .loc 1 474 9 view .LVU232 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 699 .loc 1 475 9 view .LVU233 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 700 .loc 1 476 9 view .LVU234 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 701 .loc 1 479 9 view .LVU235 702 030a 224B ldr r3, .L89+4 703 030c 0022 movs r2, #0 704 030e 1A66 str r2, [r3, #96] 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 705 .loc 1 482 9 view .LVU236 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 706 .loc 1 482 21 is_stmt 0 view .LVU237 707 0310 FFF7FEFF bl HAL_GetTick 708 .LVL47: 709 0314 0546 mov r5, r0 710 .LVL48: 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 711 .loc 1 485 9 is_stmt 1 view .LVU238 712 .L45: 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 713 .loc 1 485 14 view .LVU239 ARM GAS /tmp/ccrUqvu4.s page 24 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 714 .loc 1 485 15 is_stmt 0 view .LVU240 715 0316 1E4B ldr r3, .L89 716 0318 1B68 ldr r3, [r3] 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 717 .loc 1 485 14 view .LVU241 718 031a 13F0007F tst r3, #33554432 719 031e 06D0 beq .L85 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 720 .loc 1 487 11 is_stmt 1 view .LVU242 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 721 .loc 1 487 15 is_stmt 0 view .LVU243 722 0320 FFF7FEFF bl HAL_GetTick 723 .LVL49: 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 724 .loc 1 487 29 view .LVU244 725 0324 401B subs r0, r0, r5 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 726 .loc 1 487 13 view .LVU245 727 0326 0228 cmp r0, #2 728 0328 F5D9 bls .L45 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 729 .loc 1 489 20 view .LVU246 730 032a 0320 movs r0, #3 731 032c 2CE0 b .L3 732 .L85: 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 733 .loc 1 494 9 is_stmt 1 view .LVU247 734 032e E369 ldr r3, [r4, #28] 735 0330 226A ldr r2, [r4, #32] 736 0332 1343 orrs r3, r3, r2 737 0334 626A ldr r2, [r4, #36] 738 0336 43EA8213 orr r3, r3, r2, lsl #6 739 033a A26A ldr r2, [r4, #40] 740 033c 5208 lsrs r2, r2, #1 741 033e 013A subs r2, r2, #1 742 0340 43EA0243 orr r3, r3, r2, lsl #16 743 0344 E26A ldr r2, [r4, #44] 744 0346 43EA0263 orr r3, r3, r2, lsl #24 745 034a 114A ldr r2, .L89 746 034c 5360 str r3, [r2, #4] 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 747 .loc 1 500 9 view .LVU248 748 034e 114B ldr r3, .L89+4 749 0350 0122 movs r2, #1 750 0352 1A66 str r2, [r3, #96] 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 751 .loc 1 503 9 view .LVU249 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 752 .loc 1 503 21 is_stmt 0 view .LVU250 753 0354 FFF7FEFF bl HAL_GetTick 754 .LVL50: 755 0358 0446 mov r4, r0 756 .LVL51: 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 757 .loc 1 506 9 is_stmt 1 view .LVU251 758 .L47: ARM GAS /tmp/ccrUqvu4.s page 25 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 759 .loc 1 506 14 view .LVU252 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 760 .loc 1 506 15 is_stmt 0 view .LVU253 761 035a 0D4B ldr r3, .L89 762 035c 1B68 ldr r3, [r3] 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 763 .loc 1 506 14 view .LVU254 764 035e 13F0007F tst r3, #33554432 765 0362 06D1 bne .L86 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 766 .loc 1 508 11 is_stmt 1 view .LVU255 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 767 .loc 1 508 15 is_stmt 0 view .LVU256 768 0364 FFF7FEFF bl HAL_GetTick 769 .LVL52: 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 770 .loc 1 508 29 view .LVU257 771 0368 001B subs r0, r0, r4 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 772 .loc 1 508 13 view .LVU258 773 036a 0228 cmp r0, #2 774 036c F5D9 bls .L47 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 775 .loc 1 510 20 view .LVU259 776 036e 0320 movs r0, #3 777 0370 0AE0 b .L3 778 .L86: 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 779 .loc 1 537 10 view .LVU260 780 0372 0020 movs r0, #0 781 0374 08E0 b .L3 782 .L84: 783 .loc 1 537 10 view .LVU261 784 0376 0020 movs r0, #0 785 0378 06E0 b .L3 786 .LVL53: 787 .L51: 788 .LCFI2: 789 .cfi_def_cfa_offset 0 790 .cfi_restore 4 791 .cfi_restore 5 792 .cfi_restore 6 793 .cfi_restore 14 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 794 .loc 1 228 12 view .LVU262 795 037a 0120 movs r0, #1 796 .LVL54: ARM GAS /tmp/ccrUqvu4.s page 26 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 797 .loc 1 538 1 view .LVU263 798 037c 7047 bx lr 799 .LVL55: 800 .L76: 801 .LCFI3: 802 .cfi_def_cfa_offset 24 803 .cfi_offset 4, -16 804 .cfi_offset 5, -12 805 .cfi_offset 6, -8 806 .cfi_offset 14, -4 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 807 .loc 1 244 16 view .LVU264 808 037e 0120 movs r0, #1 809 .LVL56: 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 810 .loc 1 244 16 view .LVU265 811 0380 02E0 b .L3 812 .L55: 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 813 .loc 1 297 16 view .LVU266 814 0382 0120 movs r0, #1 815 0384 00E0 b .L3 816 .L64: 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 817 .loc 1 537 10 view .LVU267 818 0386 0020 movs r0, #0 819 .LVL57: 820 .L3: 821 .loc 1 538 1 view .LVU268 822 0388 02B0 add sp, sp, #8 823 .LCFI4: 824 .cfi_remember_state 825 .cfi_def_cfa_offset 16 826 @ sp needed 827 038a 70BD pop {r4, r5, r6, pc} 828 .LVL58: 829 .L65: 830 .LCFI5: 831 .cfi_restore_state 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 832 .loc 1 534 14 view .LVU269 833 038c 0120 movs r0, #1 834 038e FBE7 b .L3 835 .L90: 836 .align 2 837 .L89: 838 0390 00380240 .word 1073887232 839 0394 00004742 .word 1111949312 840 .cfi_endproc 841 .LFE131: 843 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 844 .align 1 845 .global HAL_RCC_MCOConfig 846 .syntax unified 847 .thumb 848 .thumb_func ARM GAS /tmp/ccrUqvu4.s page 27 850 HAL_RCC_MCOConfig: 851 .LVL59: 852 .LFB133: 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB busses clocks according to the specified 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param FLatency FLASH Latency, this parameter depend on device selected 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * startup from Reset, wake-up from STOP and STANDBY mode, or in case 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked). 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * occur when the clock source will be ready. 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions") 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */ 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) 585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 28 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the highest APBx dividers in order to ensure that we do not go through 601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); 620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE ready flag */ 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the PLL ready flag */ 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */ 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccrUqvu4.s page 29 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) 666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings */ 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY); 697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC clocks control functions ARM GAS /tmp/ccrUqvu4.s page 30 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Peripheral Control functions ##### 711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequencies. 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9). 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note PA8/PC9 should be configured in alternate function mode. 723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8). 726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9). 727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source 730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source 731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source 732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source 733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source 734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a 735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for 736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source 737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source 738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler. 739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_1: no division applied to MCOx clock 741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock 742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock 743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock 744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock 745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have 746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5). 747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 853 .loc 1 750 1 is_stmt 1 view -0 854 .cfi_startproc 855 @ args = 0, pretend = 0, frame = 32 856 @ frame_needed = 0, uses_anonymous_args = 0 857 .loc 1 750 1 is_stmt 0 view .LVU271 858 0000 70B5 push {r4, r5, r6, lr} 859 .LCFI6: 860 .cfi_def_cfa_offset 16 861 .cfi_offset 4, -16 862 .cfi_offset 5, -12 863 .cfi_offset 6, -8 864 .cfi_offset 14, -4 865 0002 88B0 sub sp, sp, #32 ARM GAS /tmp/ccrUqvu4.s page 31 866 .LCFI7: 867 .cfi_def_cfa_offset 48 868 0004 0C46 mov r4, r1 869 0006 1546 mov r5, r2 751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 870 .loc 1 751 3 is_stmt 1 view .LVU272 752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 871 .loc 1 753 3 view .LVU273 754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 872 .loc 1 754 3 view .LVU274 755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC_MCO1 */ 756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_MCOx == RCC_MCO1) 873 .loc 1 756 3 view .LVU275 874 .loc 1 756 5 is_stmt 0 view .LVU276 875 0008 00BB cbnz r0, .L92 757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 876 .loc 1 758 5 is_stmt 1 view .LVU277 759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO1 Clock Enable */ 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO1_CLK_ENABLE(); 877 .loc 1 761 5 view .LVU278 878 .LBB5: 879 .loc 1 761 5 view .LVU279 880 000a 0023 movs r3, #0 881 000c 0193 str r3, [sp, #4] 882 .loc 1 761 5 view .LVU280 883 000e 204E ldr r6, .L95 884 0010 326B ldr r2, [r6, #48] 885 .LVL60: 886 .loc 1 761 5 is_stmt 0 view .LVU281 887 0012 42F00102 orr r2, r2, #1 888 0016 3263 str r2, [r6, #48] 889 .loc 1 761 5 is_stmt 1 view .LVU282 890 0018 326B ldr r2, [r6, #48] 891 001a 02F00102 and r2, r2, #1 892 001e 0192 str r2, [sp, #4] 893 .loc 1 761 5 view .LVU283 894 0020 019A ldr r2, [sp, #4] 895 .LBE5: 896 .loc 1 761 5 view .LVU284 762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN; 897 .loc 1 764 5 view .LVU285 898 .loc 1 764 25 is_stmt 0 view .LVU286 899 0022 4FF48072 mov r2, #256 900 0026 0392 str r2, [sp, #12] 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 901 .loc 1 765 5 is_stmt 1 view .LVU287 902 .loc 1 765 26 is_stmt 0 view .LVU288 903 0028 0222 movs r2, #2 904 002a 0492 str r2, [sp, #16] 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 905 .loc 1 766 5 is_stmt 1 view .LVU289 906 .loc 1 766 27 is_stmt 0 view .LVU290 ARM GAS /tmp/ccrUqvu4.s page 32 907 002c 0322 movs r2, #3 908 002e 0692 str r2, [sp, #24] 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 909 .loc 1 767 5 is_stmt 1 view .LVU291 910 .loc 1 767 26 is_stmt 0 view .LVU292 911 0030 0593 str r3, [sp, #20] 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 912 .loc 1 768 5 is_stmt 1 view .LVU293 913 .loc 1 768 31 is_stmt 0 view .LVU294 914 0032 0793 str r3, [sp, #28] 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 915 .loc 1 769 5 is_stmt 1 view .LVU295 916 0034 03A9 add r1, sp, #12 917 .LVL61: 918 .loc 1 769 5 is_stmt 0 view .LVU296 919 0036 1748 ldr r0, .L95+4 920 .LVL62: 921 .loc 1 769 5 view .LVU297 922 0038 FFF7FEFF bl HAL_GPIO_Init 923 .LVL63: 770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */ 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv)); 924 .loc 1 772 5 is_stmt 1 view .LVU298 925 003c B368 ldr r3, [r6, #8] 926 003e 23F0EC63 bic r3, r3, #123731968 927 0042 2543 orrs r5, r5, r4 928 .LVL64: 929 .loc 1 772 5 is_stmt 0 view .LVU299 930 0044 1D43 orrs r5, r5, r3 931 0046 B560 str r5, [r6, #8] 932 .LVL65: 933 .L91: 773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO1 enable feature is available only on STM32F410xx devices */ 775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN) 776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO1_ENABLE(); 777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */ 778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2) 780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource)); 783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO2 Clock Enable */ 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO2_CLK_ENABLE(); 786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO2 pin in alternate function mode */ 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN; 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */ 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U))) ARM GAS /tmp/ccrUqvu4.s page 33 797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */ 799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN) 800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO2_ENABLE(); 801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */ 802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */ 804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 934 .loc 1 804 1 view .LVU300 935 0048 08B0 add sp, sp, #32 936 .LCFI8: 937 .cfi_remember_state 938 .cfi_def_cfa_offset 16 939 @ sp needed 940 004a 70BD pop {r4, r5, r6, pc} 941 .LVL66: 942 .L92: 943 .LCFI9: 944 .cfi_restore_state 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 945 .loc 1 782 5 is_stmt 1 view .LVU301 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 946 .loc 1 785 5 view .LVU302 947 .LBB6: 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 948 .loc 1 785 5 view .LVU303 949 004c 0023 movs r3, #0 950 004e 0293 str r3, [sp, #8] 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 951 .loc 1 785 5 view .LVU304 952 0050 0F4E ldr r6, .L95 953 0052 326B ldr r2, [r6, #48] 954 .LVL67: 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 955 .loc 1 785 5 is_stmt 0 view .LVU305 956 0054 42F00402 orr r2, r2, #4 957 0058 3263 str r2, [r6, #48] 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 958 .loc 1 785 5 is_stmt 1 view .LVU306 959 005a 326B ldr r2, [r6, #48] 960 005c 02F00402 and r2, r2, #4 961 0060 0292 str r2, [sp, #8] 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 962 .loc 1 785 5 view .LVU307 963 0062 029A ldr r2, [sp, #8] 964 .LBE6: 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 965 .loc 1 785 5 view .LVU308 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 966 .loc 1 788 5 view .LVU309 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 967 .loc 1 788 25 is_stmt 0 view .LVU310 968 0064 4FF40072 mov r2, #512 969 0068 0392 str r2, [sp, #12] 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 970 .loc 1 789 5 is_stmt 1 view .LVU311 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; ARM GAS /tmp/ccrUqvu4.s page 34 971 .loc 1 789 26 is_stmt 0 view .LVU312 972 006a 0222 movs r2, #2 973 006c 0492 str r2, [sp, #16] 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 974 .loc 1 790 5 is_stmt 1 view .LVU313 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 975 .loc 1 790 27 is_stmt 0 view .LVU314 976 006e 0322 movs r2, #3 977 0070 0692 str r2, [sp, #24] 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 978 .loc 1 791 5 is_stmt 1 view .LVU315 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 979 .loc 1 791 26 is_stmt 0 view .LVU316 980 0072 0593 str r3, [sp, #20] 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 981 .loc 1 792 5 is_stmt 1 view .LVU317 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 982 .loc 1 792 31 is_stmt 0 view .LVU318 983 0074 0793 str r3, [sp, #28] 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 984 .loc 1 793 5 is_stmt 1 view .LVU319 985 0076 03A9 add r1, sp, #12 986 .LVL68: 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 987 .loc 1 793 5 is_stmt 0 view .LVU320 988 0078 0748 ldr r0, .L95+8 989 .LVL69: 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 990 .loc 1 793 5 view .LVU321 991 007a FFF7FEFF bl HAL_GPIO_Init 992 .LVL70: 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 993 .loc 1 796 5 is_stmt 1 view .LVU322 994 007e B368 ldr r3, [r6, #8] 995 0080 23F07843 bic r3, r3, #-134217728 996 0084 44EAC504 orr r4, r4, r5, lsl #3 997 .LVL71: 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 998 .loc 1 796 5 is_stmt 0 view .LVU323 999 0088 1C43 orrs r4, r4, r3 1000 008a B460 str r4, [r6, #8] 1001 .loc 1 804 1 view .LVU324 1002 008c DCE7 b .L91 1003 .L96: 1004 008e 00BF .align 2 1005 .L95: 1006 0090 00380240 .word 1073887232 1007 0094 00000240 .word 1073872896 1008 0098 00080240 .word 1073874944 1009 .cfi_endproc 1010 .LFE133: 1012 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 1013 .align 1 1014 .global HAL_RCC_EnableCSS 1015 .syntax unified 1016 .thumb 1017 .thumb_func ARM GAS /tmp/ccrUqvu4.s page 35 1019 HAL_RCC_EnableCSS: 1020 .LFB134: 805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Enables the Clock Security System. 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1021 .loc 1 816 1 is_stmt 1 view -0 1022 .cfi_startproc 1023 @ args = 0, pretend = 0, frame = 0 1024 @ frame_needed = 0, uses_anonymous_args = 0 1025 @ link register save eliminated. 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; 1026 .loc 1 817 3 view .LVU326 1027 .loc 1 817 38 is_stmt 0 view .LVU327 1028 0000 014B ldr r3, .L98 1029 0002 0122 movs r2, #1 1030 0004 DA64 str r2, [r3, #76] 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1031 .loc 1 818 1 view .LVU328 1032 0006 7047 bx lr 1033 .L99: 1034 .align 2 1035 .L98: 1036 0008 00004742 .word 1111949312 1037 .cfi_endproc 1038 .LFE134: 1040 .section .text.HAL_RCC_DisableCSS,"ax",%progbits 1041 .align 1 1042 .global HAL_RCC_DisableCSS 1043 .syntax unified 1044 .thumb 1045 .thumb_func 1047 HAL_RCC_DisableCSS: 1048 .LFB135: 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Disables the Clock Security System. 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) 825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1049 .loc 1 825 1 is_stmt 1 view -0 1050 .cfi_startproc 1051 @ args = 0, pretend = 0, frame = 0 1052 @ frame_needed = 0, uses_anonymous_args = 0 1053 @ link register save eliminated. 826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; 1054 .loc 1 826 3 view .LVU330 1055 .loc 1 826 38 is_stmt 0 view .LVU331 ARM GAS /tmp/ccrUqvu4.s page 36 1056 0000 014B ldr r3, .L101 1057 0002 0022 movs r2, #0 1058 0004 DA64 str r2, [r3, #76] 827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1059 .loc 1 827 1 view .LVU332 1060 0006 7047 bx lr 1061 .L102: 1062 .align 2 1063 .L101: 1064 0008 00004742 .word 1111949312 1065 .cfi_endproc 1066 .LFE135: 1068 .global __aeabi_uldivmod 1069 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 1070 .align 1 1071 .weak HAL_RCC_GetSysClockFreq 1072 .syntax unified 1073 .thumb 1074 .thumb_func 1076 HAL_RCC_GetSysClockFreq: 1077 .LFB136: 828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency 831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * constant and the selected clock source: 835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) 837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**) 838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. 839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations 841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * in voltage and temperature. 842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 25 MHz), user has to ensure that HSE_VALUE is same as the real 844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may 845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * have wrong result. 846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * value for HSE crystal. 849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters. 852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency 858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void) 860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1078 .loc 1 860 1 is_stmt 1 view -0 1079 .cfi_startproc 1080 @ args = 0, pretend = 0, frame = 0 ARM GAS /tmp/ccrUqvu4.s page 37 1081 @ frame_needed = 0, uses_anonymous_args = 0 1082 0000 08B5 push {r3, lr} 1083 .LCFI10: 1084 .cfi_def_cfa_offset 8 1085 .cfi_offset 3, -8 1086 .cfi_offset 14, -4 861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; 1087 .loc 1 861 3 view .LVU334 1088 .LVL72: 862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; 1089 .loc 1 862 3 view .LVU335 863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** switch (RCC->CFGR & RCC_CFGR_SWS) 1090 .loc 1 865 3 view .LVU336 1091 .loc 1 865 14 is_stmt 0 view .LVU337 1092 0002 254B ldr r3, .L110 1093 0004 9B68 ldr r3, [r3, #8] 1094 .loc 1 865 21 view .LVU338 1095 0006 03F00C03 and r3, r3, #12 1096 .loc 1 865 3 view .LVU339 1097 000a 042B cmp r3, #4 1098 000c 3FD0 beq .L107 1099 000e 082B cmp r3, #8 1100 0010 3FD1 bne .L108 866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ 868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ 873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; 875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ 878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN 880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLP */ 881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 1101 .loc 1 881 7 is_stmt 1 view .LVU340 1102 .loc 1 881 17 is_stmt 0 view .LVU341 1103 0012 214B ldr r3, .L110 1104 0014 5A68 ldr r2, [r3, #4] 1105 .loc 1 881 12 view .LVU342 1106 0016 02F03F02 and r2, r2, #63 1107 .LVL73: 882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 1108 .loc 1 882 7 is_stmt 1 view .LVU343 1109 .loc 1 882 10 is_stmt 0 view .LVU344 1110 001a 5B68 ldr r3, [r3, #4] 1111 .loc 1 882 9 view .LVU345 1112 001c 13F4800F tst r3, #4194304 1113 0020 12D0 beq .L105 883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE used as PLL clock source */ ARM GAS /tmp/ccrUqvu4.s page 38 885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN 1114 .loc 1 885 9 is_stmt 1 view .LVU346 1115 .loc 1 885 72 is_stmt 0 view .LVU347 1116 0022 1D4B ldr r3, .L110 1117 0024 5968 ldr r1, [r3, #4] 1118 .loc 1 885 56 view .LVU348 1119 0026 C1F38811 ubfx r1, r1, #6, #9 1120 .loc 1 885 53 view .LVU349 1121 002a 1C48 ldr r0, .L110+4 1122 .loc 1 885 130 view .LVU350 1123 002c 0023 movs r3, #0 1124 002e A1FB0001 umull r0, r1, r1, r0 1125 0032 FFF7FEFF bl __aeabi_uldivmod 1126 .LVL74: 1127 .L106: 886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI used as PLL clock source */ 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN 891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); 1128 .loc 1 892 7 is_stmt 1 view .LVU351 1129 .loc 1 892 21 is_stmt 0 view .LVU352 1130 0036 184B ldr r3, .L110 1131 0038 5B68 ldr r3, [r3, #4] 1132 .loc 1 892 51 view .LVU353 1133 003a C3F30143 ubfx r3, r3, #16, #2 1134 .loc 1 892 76 view .LVU354 1135 003e 0133 adds r3, r3, #1 1136 .loc 1 892 12 view .LVU355 1137 0040 5B00 lsls r3, r3, #1 1138 .LVL75: 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = pllvco/pllp; 1139 .loc 1 894 7 is_stmt 1 view .LVU356 1140 .loc 1 894 20 is_stmt 0 view .LVU357 1141 0042 B0FBF3F0 udiv r0, r0, r3 1142 .LVL76: 895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 1143 .loc 1 895 7 is_stmt 1 view .LVU358 1144 0046 25E0 b .L103 1145 .LVL77: 1146 .L105: 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1147 .loc 1 890 9 view .LVU359 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1148 .loc 1 890 72 is_stmt 0 view .LVU360 1149 0048 134B ldr r3, .L110 1150 004a 5968 ldr r1, [r3, #4] 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1151 .loc 1 890 56 view .LVU361 1152 004c C1F3881C ubfx ip, r1, #6, #9 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1153 .loc 1 890 53 view .LVU362 1154 0050 4FEA4C11 lsl r1, ip, #5 1155 0054 B1EB0C00 subs r0, r1, ip ARM GAS /tmp/ccrUqvu4.s page 39 1156 0058 6EEB0E0E sbc lr, lr, lr 1157 005c 4FEA8E13 lsl r3, lr, #6 1158 0060 43EA9063 orr r3, r3, r0, lsr #26 1159 0064 8101 lsls r1, r0, #6 1160 0066 091A subs r1, r1, r0 1161 0068 63EB0E03 sbc r3, r3, lr 1162 006c DB00 lsls r3, r3, #3 1163 006e 43EA5173 orr r3, r3, r1, lsr #29 1164 0072 C900 lsls r1, r1, #3 1165 0074 11EB0C0C adds ip, r1, ip 1166 0078 43F10003 adc r3, r3, #0 1167 007c 9902 lsls r1, r3, #10 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1168 .loc 1 890 130 view .LVU363 1169 007e 0023 movs r3, #0 1170 0080 4FEA8C20 lsl r0, ip, #10 1171 0084 41EA9C51 orr r1, r1, ip, lsr #22 1172 0088 FFF7FEFF bl __aeabi_uldivmod 1173 .LVL78: 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1174 .loc 1 890 130 view .LVU364 1175 008c D3E7 b .L106 1176 .LVL79: 1177 .L107: 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 1178 .loc 1 874 20 view .LVU365 1179 008e 0348 ldr r0, .L110+4 1180 0090 00E0 b .L103 1181 .L108: 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1182 .loc 1 865 3 view .LVU366 1183 0092 0348 ldr r0, .L110+8 1184 .LVL80: 896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** default: 898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return sysclockfreq; 1185 .loc 1 903 3 is_stmt 1 view .LVU367 1186 .L103: 904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1187 .loc 1 904 1 is_stmt 0 view .LVU368 1188 0094 08BD pop {r3, pc} 1189 .L111: 1190 0096 00BF .align 2 1191 .L110: 1192 0098 00380240 .word 1073887232 1193 009c 40787D01 .word 25000000 1194 00a0 0024F400 .word 16000000 1195 .cfi_endproc 1196 .LFE136: 1198 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 1199 .align 1 1200 .global HAL_RCC_ClockConfig ARM GAS /tmp/ccrUqvu4.s page 40 1201 .syntax unified 1202 .thumb 1203 .thumb_func 1205 HAL_RCC_ClockConfig: 1206 .LVL81: 1207 .LFB132: 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 1208 .loc 1 566 1 is_stmt 1 view -0 1209 .cfi_startproc 1210 @ args = 0, pretend = 0, frame = 0 1211 @ frame_needed = 0, uses_anonymous_args = 0 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1212 .loc 1 567 3 view .LVU370 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1213 .loc 1 570 3 view .LVU371 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1214 .loc 1 570 5 is_stmt 0 view .LVU372 1215 0000 0028 cmp r0, #0 1216 0002 00F09A80 beq .L127 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 1217 .loc 1 566 1 view .LVU373 1218 0006 70B5 push {r4, r5, r6, lr} 1219 .LCFI11: 1220 .cfi_def_cfa_offset 16 1221 .cfi_offset 4, -16 1222 .cfi_offset 5, -12 1223 .cfi_offset 6, -8 1224 .cfi_offset 14, -4 1225 0008 0D46 mov r5, r1 1226 000a 0446 mov r4, r0 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 1227 .loc 1 576 3 is_stmt 1 view .LVU374 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1228 .loc 1 577 3 view .LVU375 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1229 .loc 1 584 3 view .LVU376 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1230 .loc 1 584 17 is_stmt 0 view .LVU377 1231 000c 4F4B ldr r3, .L140 1232 000e 1B68 ldr r3, [r3] 1233 0010 03F00F03 and r3, r3, #15 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1234 .loc 1 584 5 view .LVU378 1235 0014 8B42 cmp r3, r1 1236 0016 08D2 bcs .L114 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1237 .loc 1 587 5 is_stmt 1 view .LVU379 1238 0018 CBB2 uxtb r3, r1 1239 001a 4C4A ldr r2, .L140 1240 001c 1370 strb r3, [r2] 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1241 .loc 1 591 5 view .LVU380 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1242 .loc 1 591 8 is_stmt 0 view .LVU381 1243 001e 1368 ldr r3, [r2] 1244 0020 03F00F03 and r3, r3, #15 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 41 1245 .loc 1 591 7 view .LVU382 1246 0024 8B42 cmp r3, r1 1247 0026 40F08A80 bne .L128 1248 .L114: 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1249 .loc 1 598 3 is_stmt 1 view .LVU383 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1250 .loc 1 598 25 is_stmt 0 view .LVU384 1251 002a 2368 ldr r3, [r4] 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1252 .loc 1 598 5 view .LVU385 1253 002c 13F0020F tst r3, #2 1254 0030 17D0 beq .L115 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1255 .loc 1 602 5 is_stmt 1 view .LVU386 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1256 .loc 1 602 7 is_stmt 0 view .LVU387 1257 0032 13F0040F tst r3, #4 1258 0036 04D0 beq .L116 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1259 .loc 1 604 7 is_stmt 1 view .LVU388 1260 0038 454A ldr r2, .L140+4 1261 003a 9368 ldr r3, [r2, #8] 1262 003c 43F4E053 orr r3, r3, #7168 1263 0040 9360 str r3, [r2, #8] 1264 .L116: 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1265 .loc 1 607 5 view .LVU389 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1266 .loc 1 607 27 is_stmt 0 view .LVU390 1267 0042 2368 ldr r3, [r4] 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1268 .loc 1 607 7 view .LVU391 1269 0044 13F0080F tst r3, #8 1270 0048 04D0 beq .L117 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1271 .loc 1 609 7 is_stmt 1 view .LVU392 1272 004a 414A ldr r2, .L140+4 1273 004c 9368 ldr r3, [r2, #8] 1274 004e 43F46043 orr r3, r3, #57344 1275 0052 9360 str r3, [r2, #8] 1276 .L117: 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 1277 .loc 1 612 5 view .LVU393 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1278 .loc 1 613 5 view .LVU394 1279 0054 3E4A ldr r2, .L140+4 1280 0056 9368 ldr r3, [r2, #8] 1281 0058 23F0F003 bic r3, r3, #240 1282 005c A168 ldr r1, [r4, #8] 1283 .LVL82: 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1284 .loc 1 613 5 is_stmt 0 view .LVU395 1285 005e 0B43 orrs r3, r3, r1 1286 0060 9360 str r3, [r2, #8] 1287 .L115: 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 42 1288 .loc 1 617 3 is_stmt 1 view .LVU396 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1289 .loc 1 617 25 is_stmt 0 view .LVU397 1290 0062 2368 ldr r3, [r4] 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1291 .loc 1 617 5 view .LVU398 1292 0064 13F0010F tst r3, #1 1293 0068 32D0 beq .L118 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1294 .loc 1 619 5 is_stmt 1 view .LVU399 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1295 .loc 1 622 5 view .LVU400 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1296 .loc 1 622 25 is_stmt 0 view .LVU401 1297 006a 6368 ldr r3, [r4, #4] 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1298 .loc 1 622 7 view .LVU402 1299 006c 012B cmp r3, #1 1300 006e 21D0 beq .L138 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1301 .loc 1 631 10 is_stmt 1 view .LVU403 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1302 .loc 1 631 76 is_stmt 0 view .LVU404 1303 0070 9A1E subs r2, r3, #2 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1304 .loc 1 631 12 view .LVU405 1305 0072 012A cmp r2, #1 1306 0074 25D9 bls .L139 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1307 .loc 1 644 7 is_stmt 1 view .LVU406 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1308 .loc 1 644 10 is_stmt 0 view .LVU407 1309 0076 364A ldr r2, .L140+4 1310 0078 1268 ldr r2, [r2] 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1311 .loc 1 644 9 view .LVU408 1312 007a 12F0020F tst r2, #2 1313 007e 60D0 beq .L131 1314 .L120: 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1315 .loc 1 650 5 is_stmt 1 view .LVU409 1316 0080 3349 ldr r1, .L140+4 1317 0082 8A68 ldr r2, [r1, #8] 1318 0084 22F00302 bic r2, r2, #3 1319 0088 1343 orrs r3, r3, r2 1320 008a 8B60 str r3, [r1, #8] 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1321 .loc 1 653 5 view .LVU410 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1322 .loc 1 653 17 is_stmt 0 view .LVU411 1323 008c FFF7FEFF bl HAL_GetTick 1324 .LVL83: 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1325 .loc 1 653 17 view .LVU412 1326 0090 0646 mov r6, r0 1327 .LVL84: 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccrUqvu4.s page 43 1328 .loc 1 655 5 is_stmt 1 view .LVU413 1329 .L122: 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1330 .loc 1 655 11 view .LVU414 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1331 .loc 1 655 12 is_stmt 0 view .LVU415 1332 0092 2F4B ldr r3, .L140+4 1333 0094 9B68 ldr r3, [r3, #8] 1334 0096 03F00C03 and r3, r3, #12 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1335 .loc 1 655 63 view .LVU416 1336 009a 6268 ldr r2, [r4, #4] 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1337 .loc 1 655 11 view .LVU417 1338 009c B3EB820F cmp r3, r2, lsl #2 1339 00a0 16D0 beq .L118 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1340 .loc 1 657 7 is_stmt 1 view .LVU418 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1341 .loc 1 657 12 is_stmt 0 view .LVU419 1342 00a2 FFF7FEFF bl HAL_GetTick 1343 .LVL85: 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1344 .loc 1 657 26 view .LVU420 1345 00a6 801B subs r0, r0, r6 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1346 .loc 1 657 10 view .LVU421 1347 00a8 41F28833 movw r3, #5000 1348 00ac 9842 cmp r0, r3 1349 00ae F0D9 bls .L122 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1350 .loc 1 659 16 view .LVU422 1351 00b0 0320 movs r0, #3 1352 00b2 41E0 b .L113 1353 .LVL86: 1354 .L138: 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1355 .loc 1 625 7 is_stmt 1 view .LVU423 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1356 .loc 1 625 10 is_stmt 0 view .LVU424 1357 00b4 264A ldr r2, .L140+4 1358 00b6 1268 ldr r2, [r2] 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1359 .loc 1 625 9 view .LVU425 1360 00b8 12F4003F tst r2, #131072 1361 00bc E0D1 bne .L120 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1362 .loc 1 627 16 view .LVU426 1363 00be 0120 movs r0, #1 1364 .LVL87: 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1365 .loc 1 627 16 view .LVU427 1366 00c0 3AE0 b .L113 1367 .LVL88: 1368 .L139: 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1369 .loc 1 635 7 is_stmt 1 view .LVU428 ARM GAS /tmp/ccrUqvu4.s page 44 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1370 .loc 1 635 10 is_stmt 0 view .LVU429 1371 00c2 234A ldr r2, .L140+4 1372 00c4 1268 ldr r2, [r2] 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1373 .loc 1 635 9 view .LVU430 1374 00c6 12F0007F tst r2, #33554432 1375 00ca D9D1 bne .L120 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1376 .loc 1 637 16 view .LVU431 1377 00cc 0120 movs r0, #1 1378 .LVL89: 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1379 .loc 1 637 16 view .LVU432 1380 00ce 33E0 b .L113 1381 .L118: 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1382 .loc 1 665 3 is_stmt 1 view .LVU433 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1383 .loc 1 665 17 is_stmt 0 view .LVU434 1384 00d0 1E4B ldr r3, .L140 1385 00d2 1B68 ldr r3, [r3] 1386 00d4 03F00F03 and r3, r3, #15 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1387 .loc 1 665 5 view .LVU435 1388 00d8 AB42 cmp r3, r5 1389 00da 07D9 bls .L124 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1390 .loc 1 668 5 is_stmt 1 view .LVU436 1391 00dc EAB2 uxtb r2, r5 1392 00de 1B4B ldr r3, .L140 1393 00e0 1A70 strb r2, [r3] 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1394 .loc 1 672 5 view .LVU437 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1395 .loc 1 672 8 is_stmt 0 view .LVU438 1396 00e2 1B68 ldr r3, [r3] 1397 00e4 03F00F03 and r3, r3, #15 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1398 .loc 1 672 7 view .LVU439 1399 00e8 AB42 cmp r3, r5 1400 00ea 2CD1 bne .L133 1401 .L124: 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1402 .loc 1 679 3 is_stmt 1 view .LVU440 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1403 .loc 1 679 25 is_stmt 0 view .LVU441 1404 00ec 2368 ldr r3, [r4] 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1405 .loc 1 679 5 view .LVU442 1406 00ee 13F0040F tst r3, #4 1407 00f2 06D0 beq .L125 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 1408 .loc 1 681 5 is_stmt 1 view .LVU443 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1409 .loc 1 682 5 view .LVU444 1410 00f4 164A ldr r2, .L140+4 ARM GAS /tmp/ccrUqvu4.s page 45 1411 00f6 9368 ldr r3, [r2, #8] 1412 00f8 23F4E053 bic r3, r3, #7168 1413 00fc E168 ldr r1, [r4, #12] 1414 00fe 0B43 orrs r3, r3, r1 1415 0100 9360 str r3, [r2, #8] 1416 .L125: 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1417 .loc 1 686 3 view .LVU445 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1418 .loc 1 686 25 is_stmt 0 view .LVU446 1419 0102 2368 ldr r3, [r4] 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1420 .loc 1 686 5 view .LVU447 1421 0104 13F0080F tst r3, #8 1422 0108 07D0 beq .L126 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 1423 .loc 1 688 5 is_stmt 1 view .LVU448 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1424 .loc 1 689 5 view .LVU449 1425 010a 114A ldr r2, .L140+4 1426 010c 9368 ldr r3, [r2, #8] 1427 010e 23F46043 bic r3, r3, #57344 1428 0112 2169 ldr r1, [r4, #16] 1429 0114 43EAC103 orr r3, r3, r1, lsl #3 1430 0118 9360 str r3, [r2, #8] 1431 .L126: 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1432 .loc 1 693 3 view .LVU450 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1433 .loc 1 693 21 is_stmt 0 view .LVU451 1434 011a FFF7FEFF bl HAL_RCC_GetSysClockFreq 1435 .LVL90: 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1436 .loc 1 693 68 view .LVU452 1437 011e 0C4B ldr r3, .L140+4 1438 0120 9B68 ldr r3, [r3, #8] 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1439 .loc 1 693 91 view .LVU453 1440 0122 C3F30313 ubfx r3, r3, #4, #4 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1441 .loc 1 693 63 view .LVU454 1442 0126 0B4A ldr r2, .L140+8 1443 0128 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1444 .loc 1 693 47 view .LVU455 1445 012a D840 lsrs r0, r0, r3 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1446 .loc 1 693 19 view .LVU456 1447 012c 0A4B ldr r3, .L140+12 1448 012e 1860 str r0, [r3] 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1449 .loc 1 696 3 is_stmt 1 view .LVU457 1450 0130 0020 movs r0, #0 1451 0132 FFF7FEFF bl HAL_InitTick 1452 .LVL91: 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1453 .loc 1 698 3 view .LVU458 ARM GAS /tmp/ccrUqvu4.s page 46 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1454 .loc 1 698 10 is_stmt 0 view .LVU459 1455 0136 0020 movs r0, #0 1456 .L113: 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1457 .loc 1 699 1 view .LVU460 1458 0138 70BD pop {r4, r5, r6, pc} 1459 .LVL92: 1460 .L127: 1461 .LCFI12: 1462 .cfi_def_cfa_offset 0 1463 .cfi_restore 4 1464 .cfi_restore 5 1465 .cfi_restore 6 1466 .cfi_restore 14 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1467 .loc 1 572 12 view .LVU461 1468 013a 0120 movs r0, #1 1469 .LVL93: 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1470 .loc 1 699 1 view .LVU462 1471 013c 7047 bx lr 1472 .LVL94: 1473 .L128: 1474 .LCFI13: 1475 .cfi_def_cfa_offset 16 1476 .cfi_offset 4, -16 1477 .cfi_offset 5, -12 1478 .cfi_offset 6, -8 1479 .cfi_offset 14, -4 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1480 .loc 1 593 14 view .LVU463 1481 013e 0120 movs r0, #1 1482 .LVL95: 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1483 .loc 1 593 14 view .LVU464 1484 0140 FAE7 b .L113 1485 .LVL96: 1486 .L131: 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1487 .loc 1 646 16 view .LVU465 1488 0142 0120 movs r0, #1 1489 .LVL97: 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1490 .loc 1 646 16 view .LVU466 1491 0144 F8E7 b .L113 1492 .L133: 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1493 .loc 1 674 14 view .LVU467 1494 0146 0120 movs r0, #1 1495 0148 F6E7 b .L113 1496 .L141: 1497 014a 00BF .align 2 1498 .L140: 1499 014c 003C0240 .word 1073888256 1500 0150 00380240 .word 1073887232 1501 0154 00000000 .word AHBPrescTable ARM GAS /tmp/ccrUqvu4.s page 47 1502 0158 00000000 .word SystemCoreClock 1503 .cfi_endproc 1504 .LFE132: 1506 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 1507 .align 1 1508 .global HAL_RCC_GetHCLKFreq 1509 .syntax unified 1510 .thumb 1511 .thumb_func 1513 HAL_RCC_GetHCLKFreq: 1514 .LFB137: 905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the HCLK frequency 908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated within this function 913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HCLK frequency 914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1515 .loc 1 916 1 is_stmt 1 view -0 1516 .cfi_startproc 1517 @ args = 0, pretend = 0, frame = 0 1518 @ frame_needed = 0, uses_anonymous_args = 0 1519 @ link register save eliminated. 917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock; 1520 .loc 1 917 3 view .LVU469 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1521 .loc 1 918 1 is_stmt 0 view .LVU470 1522 0000 014B ldr r3, .L143 1523 0002 1868 ldr r0, [r3] 1524 0004 7047 bx lr 1525 .L144: 1526 0006 00BF .align 2 1527 .L143: 1528 0008 00000000 .word SystemCoreClock 1529 .cfi_endproc 1530 .LFE137: 1532 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 1533 .align 1 1534 .global HAL_RCC_GetPCLK1Freq 1535 .syntax unified 1536 .thumb 1537 .thumb_func 1539 HAL_RCC_GetPCLK1Freq: 1540 .LFB138: 919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency 922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK1 frequency 925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) ARM GAS /tmp/ccrUqvu4.s page 48 927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1541 .loc 1 927 1 is_stmt 1 view -0 1542 .cfi_startproc 1543 @ args = 0, pretend = 0, frame = 0 1544 @ frame_needed = 0, uses_anonymous_args = 0 1545 0000 08B5 push {r3, lr} 1546 .LCFI14: 1547 .cfi_def_cfa_offset 8 1548 .cfi_offset 3, -8 1549 .cfi_offset 14, -4 928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos] 1550 .loc 1 929 3 view .LVU472 1551 .loc 1 929 11 is_stmt 0 view .LVU473 1552 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1553 .LVL98: 1554 .loc 1 929 54 view .LVU474 1555 0006 044B ldr r3, .L147 1556 0008 9B68 ldr r3, [r3, #8] 1557 .loc 1 929 78 view .LVU475 1558 000a C3F38223 ubfx r3, r3, #10, #3 1559 .loc 1 929 49 view .LVU476 1560 000e 034A ldr r2, .L147+4 1561 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1562 .loc 1 930 1 view .LVU477 1563 0012 D840 lsrs r0, r0, r3 1564 0014 08BD pop {r3, pc} 1565 .L148: 1566 0016 00BF .align 2 1567 .L147: 1568 0018 00380240 .word 1073887232 1569 001c 00000000 .word APBPrescTable 1570 .cfi_endproc 1571 .LFE138: 1573 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 1574 .align 1 1575 .global HAL_RCC_GetPCLK2Freq 1576 .syntax unified 1577 .thumb 1578 .thumb_func 1580 HAL_RCC_GetPCLK2Freq: 1581 .LFB139: 931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK2 frequency 937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1582 .loc 1 939 1 is_stmt 1 view -0 1583 .cfi_startproc 1584 @ args = 0, pretend = 0, frame = 0 1585 @ frame_needed = 0, uses_anonymous_args = 0 1586 0000 08B5 push {r3, lr} ARM GAS /tmp/ccrUqvu4.s page 49 1587 .LCFI15: 1588 .cfi_def_cfa_offset 8 1589 .cfi_offset 3, -8 1590 .cfi_offset 14, -4 940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]) 1591 .loc 1 941 3 view .LVU479 1592 .loc 1 941 11 is_stmt 0 view .LVU480 1593 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1594 .LVL99: 1595 .loc 1 941 53 view .LVU481 1596 0006 044B ldr r3, .L151 1597 0008 9B68 ldr r3, [r3, #8] 1598 .loc 1 941 77 view .LVU482 1599 000a C3F34233 ubfx r3, r3, #13, #3 1600 .loc 1 941 48 view .LVU483 1601 000e 034A ldr r2, .L151+4 1602 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1603 .loc 1 942 1 view .LVU484 1604 0012 D840 lsrs r0, r0, r3 1605 0014 08BD pop {r3, pc} 1606 .L152: 1607 0016 00BF .align 2 1608 .L151: 1609 0018 00380240 .word 1073887232 1610 001c 00000000 .word APBPrescTable 1611 .cfi_endproc 1612 .LFE139: 1614 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 1615 .align 1 1616 .weak HAL_RCC_GetOscConfig 1617 .syntax unified 1618 .thumb 1619 .thumb_func 1621 HAL_RCC_GetOscConfig: 1622 .LVL100: 1623 .LFB140: 943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal 946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1624 .loc 1 952 1 is_stmt 1 view -0 1625 .cfi_startproc 1626 @ args = 0, pretend = 0, frame = 0 1627 @ frame_needed = 0, uses_anonymous_args = 0 1628 @ link register save eliminated. 953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA 1629 .loc 1 954 3 view .LVU486 1630 .loc 1 954 37 is_stmt 0 view .LVU487 ARM GAS /tmp/ccrUqvu4.s page 50 1631 0000 0F23 movs r3, #15 1632 0002 0360 str r3, [r0] 955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 1633 .loc 1 957 3 is_stmt 1 view .LVU488 1634 .loc 1 957 10 is_stmt 0 view .LVU489 1635 0004 304B ldr r3, .L166 1636 0006 1B68 ldr r3, [r3] 1637 .loc 1 957 5 view .LVU490 1638 0008 13F4802F tst r3, #262144 1639 000c 3BD0 beq .L154 958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 1640 .loc 1 959 5 is_stmt 1 view .LVU491 1641 .loc 1 959 33 is_stmt 0 view .LVU492 1642 000e 4FF4A023 mov r3, #327680 1643 0012 4360 str r3, [r0, #4] 1644 .L155: 960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) 962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; 968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) 1645 .loc 1 971 3 is_stmt 1 view .LVU493 1646 .loc 1 971 10 is_stmt 0 view .LVU494 1647 0014 2C4B ldr r3, .L166 1648 0016 1B68 ldr r3, [r3] 1649 .loc 1 971 5 view .LVU495 1650 0018 13F0010F tst r3, #1 1651 001c 3FD0 beq .L157 972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 1652 .loc 1 973 5 is_stmt 1 view .LVU496 1653 .loc 1 973 33 is_stmt 0 view .LVU497 1654 001e 0123 movs r3, #1 1655 0020 C360 str r3, [r0, #12] 1656 .L158: 974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_P 1657 .loc 1 980 3 is_stmt 1 view .LVU498 1658 .loc 1 980 59 is_stmt 0 view .LVU499 1659 0022 294A ldr r2, .L166 1660 0024 1368 ldr r3, [r2] 1661 .loc 1 980 44 view .LVU500 ARM GAS /tmp/ccrUqvu4.s page 51 1662 0026 C3F3C403 ubfx r3, r3, #3, #5 1663 .loc 1 980 42 view .LVU501 1664 002a 0361 str r3, [r0, #16] 981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) 1665 .loc 1 983 3 is_stmt 1 view .LVU502 1666 .loc 1 983 10 is_stmt 0 view .LVU503 1667 002c 136F ldr r3, [r2, #112] 1668 .loc 1 983 5 view .LVU504 1669 002e 13F0040F tst r3, #4 1670 0032 37D0 beq .L159 984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 1671 .loc 1 985 5 is_stmt 1 view .LVU505 1672 .loc 1 985 33 is_stmt 0 view .LVU506 1673 0034 0523 movs r3, #5 1674 0036 8360 str r3, [r0, #8] 1675 .L160: 986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ 997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) 1676 .loc 1 997 3 is_stmt 1 view .LVU507 1677 .loc 1 997 10 is_stmt 0 view .LVU508 1678 0038 234B ldr r3, .L166 1679 003a 5B6F ldr r3, [r3, #116] 1680 .loc 1 997 5 view .LVU509 1681 003c 13F0010F tst r3, #1 1682 0040 3BD0 beq .L162 998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; 1683 .loc 1 999 5 is_stmt 1 view .LVU510 1684 .loc 1 999 33 is_stmt 0 view .LVU511 1685 0042 0123 movs r3, #1 1686 0044 4361 str r3, [r0, #20] 1687 .L163: 1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) 1688 .loc 1 1007 3 is_stmt 1 view .LVU512 1689 .loc 1 1007 10 is_stmt 0 view .LVU513 1690 0046 204B ldr r3, .L166 1691 0048 1B68 ldr r3, [r3] ARM GAS /tmp/ccrUqvu4.s page 52 1692 .loc 1 1007 5 view .LVU514 1693 004a 13F0807F tst r3, #16777216 1694 004e 37D0 beq .L164 1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 1695 .loc 1 1009 5 is_stmt 1 view .LVU515 1696 .loc 1 1009 37 is_stmt 0 view .LVU516 1697 0050 0223 movs r3, #2 1698 0052 8361 str r3, [r0, #24] 1699 .L165: 1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); 1700 .loc 1 1015 3 is_stmt 1 view .LVU517 1701 .loc 1 1015 52 is_stmt 0 view .LVU518 1702 0054 1C4A ldr r2, .L166 1703 0056 5368 ldr r3, [r2, #4] 1704 .loc 1 1015 38 view .LVU519 1705 0058 03F48003 and r3, r3, #4194304 1706 .loc 1 1015 36 view .LVU520 1707 005c C361 str r3, [r0, #28] 1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM); 1708 .loc 1 1016 3 is_stmt 1 view .LVU521 1709 .loc 1 1016 47 is_stmt 0 view .LVU522 1710 005e 5368 ldr r3, [r2, #4] 1711 .loc 1 1016 33 view .LVU523 1712 0060 03F03F03 and r3, r3, #63 1713 .loc 1 1016 31 view .LVU524 1714 0064 0362 str r3, [r0, #32] 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po 1715 .loc 1 1017 3 is_stmt 1 view .LVU525 1716 .loc 1 1017 48 is_stmt 0 view .LVU526 1717 0066 5368 ldr r3, [r2, #4] 1718 .loc 1 1017 33 view .LVU527 1719 0068 C3F38813 ubfx r3, r3, #6, #9 1720 .loc 1 1017 31 view .LVU528 1721 006c 4362 str r3, [r0, #36] 1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0 1722 .loc 1 1018 3 is_stmt 1 view .LVU529 1723 .loc 1 1018 50 is_stmt 0 view .LVU530 1724 006e 5368 ldr r3, [r2, #4] 1725 .loc 1 1018 60 view .LVU531 1726 0070 03F44033 and r3, r3, #196608 1727 .loc 1 1018 80 view .LVU532 1728 0074 03F58033 add r3, r3, #65536 1729 .loc 1 1018 33 view .LVU533 1730 0078 DB0B lsrs r3, r3, #15 1731 .loc 1 1018 31 view .LVU534 1732 007a 8362 str r3, [r0, #40] 1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po 1733 .loc 1 1019 3 is_stmt 1 view .LVU535 1734 .loc 1 1019 48 is_stmt 0 view .LVU536 1735 007c 5368 ldr r3, [r2, #4] 1736 .loc 1 1019 33 view .LVU537 ARM GAS /tmp/ccrUqvu4.s page 53 1737 007e C3F30363 ubfx r3, r3, #24, #4 1738 .loc 1 1019 31 view .LVU538 1739 0082 C362 str r3, [r0, #44] 1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1740 .loc 1 1020 1 view .LVU539 1741 0084 7047 bx lr 1742 .L154: 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1743 .loc 1 961 8 is_stmt 1 view .LVU540 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1744 .loc 1 961 15 is_stmt 0 view .LVU541 1745 0086 104B ldr r3, .L166 1746 0088 1B68 ldr r3, [r3] 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1747 .loc 1 961 10 view .LVU542 1748 008a 13F4803F tst r3, #65536 1749 008e 03D0 beq .L156 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1750 .loc 1 963 5 is_stmt 1 view .LVU543 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1751 .loc 1 963 33 is_stmt 0 view .LVU544 1752 0090 4FF48033 mov r3, #65536 1753 0094 4360 str r3, [r0, #4] 1754 0096 BDE7 b .L155 1755 .L156: 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1756 .loc 1 967 5 is_stmt 1 view .LVU545 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1757 .loc 1 967 33 is_stmt 0 view .LVU546 1758 0098 0023 movs r3, #0 1759 009a 4360 str r3, [r0, #4] 1760 009c BAE7 b .L155 1761 .L157: 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1762 .loc 1 977 5 is_stmt 1 view .LVU547 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1763 .loc 1 977 33 is_stmt 0 view .LVU548 1764 009e 0023 movs r3, #0 1765 00a0 C360 str r3, [r0, #12] 1766 00a2 BEE7 b .L158 1767 .L159: 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1768 .loc 1 987 8 is_stmt 1 view .LVU549 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1769 .loc 1 987 15 is_stmt 0 view .LVU550 1770 00a4 084B ldr r3, .L166 1771 00a6 1B6F ldr r3, [r3, #112] 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1772 .loc 1 987 10 view .LVU551 1773 00a8 13F0010F tst r3, #1 1774 00ac 02D0 beq .L161 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1775 .loc 1 989 5 is_stmt 1 view .LVU552 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1776 .loc 1 989 33 is_stmt 0 view .LVU553 1777 00ae 0123 movs r3, #1 1778 00b0 8360 str r3, [r0, #8] ARM GAS /tmp/ccrUqvu4.s page 54 1779 00b2 C1E7 b .L160 1780 .L161: 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1781 .loc 1 993 5 is_stmt 1 view .LVU554 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1782 .loc 1 993 33 is_stmt 0 view .LVU555 1783 00b4 0023 movs r3, #0 1784 00b6 8360 str r3, [r0, #8] 1785 00b8 BEE7 b .L160 1786 .L162: 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1787 .loc 1 1003 5 is_stmt 1 view .LVU556 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1788 .loc 1 1003 33 is_stmt 0 view .LVU557 1789 00ba 0023 movs r3, #0 1790 00bc 4361 str r3, [r0, #20] 1791 00be C2E7 b .L163 1792 .L164: 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1793 .loc 1 1013 5 is_stmt 1 view .LVU558 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1794 .loc 1 1013 37 is_stmt 0 view .LVU559 1795 00c0 0123 movs r3, #1 1796 00c2 8361 str r3, [r0, #24] 1797 00c4 C6E7 b .L165 1798 .L167: 1799 00c6 00BF .align 2 1800 .L166: 1801 00c8 00380240 .word 1073887232 1802 .cfi_endproc 1803 .LFE140: 1805 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 1806 .align 1 1807 .global HAL_RCC_GetClockConfig 1808 .syntax unified 1809 .thumb 1810 .thumb_func 1812 HAL_RCC_GetClockConfig: 1813 .LVL101: 1814 .LFB141: 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_ClkInitStruct according to the internal 1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1815 .loc 1 1031 1 is_stmt 1 view -0 1816 .cfi_startproc 1817 @ args = 0, pretend = 0, frame = 0 1818 @ frame_needed = 0, uses_anonymous_args = 0 1819 @ link register save eliminated. 1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ ARM GAS /tmp/ccrUqvu4.s page 55 1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 1820 .loc 1 1033 3 view .LVU561 1821 .loc 1 1033 32 is_stmt 0 view .LVU562 1822 0000 0F23 movs r3, #15 1823 0002 0360 str r3, [r0] 1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 1824 .loc 1 1036 3 is_stmt 1 view .LVU563 1825 .loc 1 1036 51 is_stmt 0 view .LVU564 1826 0004 0B4B ldr r3, .L169 1827 0006 9A68 ldr r2, [r3, #8] 1828 .loc 1 1036 37 view .LVU565 1829 0008 02F00302 and r2, r2, #3 1830 .loc 1 1036 35 view .LVU566 1831 000c 4260 str r2, [r0, #4] 1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 1832 .loc 1 1039 3 is_stmt 1 view .LVU567 1833 .loc 1 1039 52 is_stmt 0 view .LVU568 1834 000e 9A68 ldr r2, [r3, #8] 1835 .loc 1 1039 38 view .LVU569 1836 0010 02F0F002 and r2, r2, #240 1837 .loc 1 1039 36 view .LVU570 1838 0014 8260 str r2, [r0, #8] 1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 1839 .loc 1 1042 3 is_stmt 1 view .LVU571 1840 .loc 1 1042 53 is_stmt 0 view .LVU572 1841 0016 9A68 ldr r2, [r3, #8] 1842 .loc 1 1042 39 view .LVU573 1843 0018 02F4E052 and r2, r2, #7168 1844 .loc 1 1042 37 view .LVU574 1845 001c C260 str r2, [r0, #12] 1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); 1846 .loc 1 1045 3 is_stmt 1 view .LVU575 1847 .loc 1 1045 54 is_stmt 0 view .LVU576 1848 001e 9B68 ldr r3, [r3, #8] 1849 .loc 1 1045 39 view .LVU577 1850 0020 DB08 lsrs r3, r3, #3 1851 0022 03F4E053 and r3, r3, #7168 1852 .loc 1 1045 37 view .LVU578 1853 0026 0361 str r3, [r0, #16] 1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 1854 .loc 1 1048 3 is_stmt 1 view .LVU579 1855 .loc 1 1048 32 is_stmt 0 view .LVU580 1856 0028 034B ldr r3, .L169+4 1857 002a 1B68 ldr r3, [r3] 1858 .loc 1 1048 16 view .LVU581 1859 002c 03F00F03 and r3, r3, #15 1860 .loc 1 1048 14 view .LVU582 ARM GAS /tmp/ccrUqvu4.s page 56 1861 0030 0B60 str r3, [r1] 1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1862 .loc 1 1049 1 view .LVU583 1863 0032 7047 bx lr 1864 .L170: 1865 .align 2 1866 .L169: 1867 0034 00380240 .word 1073887232 1868 0038 003C0240 .word 1073888256 1869 .cfi_endproc 1870 .LFE141: 1872 .section .text.HAL_RCC_CSSCallback,"ax",%progbits 1873 .align 1 1874 .weak HAL_RCC_CSSCallback 1875 .syntax unified 1876 .thumb 1877 .thumb_func 1879 HAL_RCC_CSSCallback: 1880 .LFB143: 1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. 1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) 1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback 1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1881 .loc 1 1074 1 is_stmt 1 view -0 1882 .cfi_startproc 1883 @ args = 0, pretend = 0, frame = 0 1884 @ frame_needed = 0, uses_anonymous_args = 0 1885 @ link register save eliminated. 1075:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, 1076:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file 1077:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1078:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1886 .loc 1 1078 1 view .LVU585 1887 0000 7047 bx lr 1888 .cfi_endproc 1889 .LFE143: ARM GAS /tmp/ccrUqvu4.s page 57 1891 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 1892 .align 1 1893 .global HAL_RCC_NMI_IRQHandler 1894 .syntax unified 1895 .thumb 1896 .thumb_func 1898 HAL_RCC_NMI_IRQHandler: 1899 .LFB142: 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1900 .loc 1 1057 1 view -0 1901 .cfi_startproc 1902 @ args = 0, pretend = 0, frame = 0 1903 @ frame_needed = 0, uses_anonymous_args = 0 1904 0000 08B5 push {r3, lr} 1905 .LCFI16: 1906 .cfi_def_cfa_offset 8 1907 .cfi_offset 3, -8 1908 .cfi_offset 14, -4 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1909 .loc 1 1059 3 view .LVU587 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1910 .loc 1 1059 6 is_stmt 0 view .LVU588 1911 0002 064B ldr r3, .L176 1912 0004 DB68 ldr r3, [r3, #12] 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1913 .loc 1 1059 5 view .LVU589 1914 0006 13F0800F tst r3, #128 1915 000a 00D1 bne .L175 1916 .L172: 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1917 .loc 1 1067 1 view .LVU590 1918 000c 08BD pop {r3, pc} 1919 .L175: 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1920 .loc 1 1062 5 is_stmt 1 view .LVU591 1921 000e FFF7FEFF bl HAL_RCC_CSSCallback 1922 .LVL102: 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1923 .loc 1 1065 5 view .LVU592 1924 0012 024B ldr r3, .L176 1925 0014 8022 movs r2, #128 1926 0016 9A73 strb r2, [r3, #14] 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1927 .loc 1 1067 1 is_stmt 0 view .LVU593 1928 0018 F8E7 b .L172 1929 .L177: 1930 001a 00BF .align 2 1931 .L176: 1932 001c 00380240 .word 1073887232 1933 .cfi_endproc 1934 .LFE142: 1936 .text 1937 .Letext0: 1938 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 1939 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 1940 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h" 1941 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h" ARM GAS /tmp/ccrUqvu4.s page 58 1942 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 1943 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 1944 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" 1945 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" 1946 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 1947 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/ccrUqvu4.s page 59 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_rcc.c /tmp/ccrUqvu4.s:20 .text.HAL_RCC_DeInit:0000000000000000 $t /tmp/ccrUqvu4.s:26 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit /tmp/ccrUqvu4.s:42 .text.HAL_RCC_OscConfig:0000000000000000 $t /tmp/ccrUqvu4.s:48 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig /tmp/ccrUqvu4.s:593 .text.HAL_RCC_OscConfig:0000000000000294 $d /tmp/ccrUqvu4.s:599 .text.HAL_RCC_OscConfig:00000000000002a0 $t /tmp/ccrUqvu4.s:838 .text.HAL_RCC_OscConfig:0000000000000390 $d /tmp/ccrUqvu4.s:844 .text.HAL_RCC_MCOConfig:0000000000000000 $t /tmp/ccrUqvu4.s:850 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig /tmp/ccrUqvu4.s:1006 .text.HAL_RCC_MCOConfig:0000000000000090 $d /tmp/ccrUqvu4.s:1013 .text.HAL_RCC_EnableCSS:0000000000000000 $t /tmp/ccrUqvu4.s:1019 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS /tmp/ccrUqvu4.s:1036 .text.HAL_RCC_EnableCSS:0000000000000008 $d /tmp/ccrUqvu4.s:1041 .text.HAL_RCC_DisableCSS:0000000000000000 $t /tmp/ccrUqvu4.s:1047 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS /tmp/ccrUqvu4.s:1064 .text.HAL_RCC_DisableCSS:0000000000000008 $d /tmp/ccrUqvu4.s:1070 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t /tmp/ccrUqvu4.s:1076 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq /tmp/ccrUqvu4.s:1192 .text.HAL_RCC_GetSysClockFreq:0000000000000098 $d /tmp/ccrUqvu4.s:1199 .text.HAL_RCC_ClockConfig:0000000000000000 $t /tmp/ccrUqvu4.s:1205 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig /tmp/ccrUqvu4.s:1499 .text.HAL_RCC_ClockConfig:000000000000014c $d /tmp/ccrUqvu4.s:1507 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t /tmp/ccrUqvu4.s:1513 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq /tmp/ccrUqvu4.s:1528 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d /tmp/ccrUqvu4.s:1533 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t /tmp/ccrUqvu4.s:1539 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq /tmp/ccrUqvu4.s:1568 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d /tmp/ccrUqvu4.s:1574 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 $t /tmp/ccrUqvu4.s:1580 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 HAL_RCC_GetPCLK2Freq /tmp/ccrUqvu4.s:1609 .text.HAL_RCC_GetPCLK2Freq:0000000000000018 $d /tmp/ccrUqvu4.s:1615 .text.HAL_RCC_GetOscConfig:0000000000000000 $t /tmp/ccrUqvu4.s:1621 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig /tmp/ccrUqvu4.s:1801 .text.HAL_RCC_GetOscConfig:00000000000000c8 $d /tmp/ccrUqvu4.s:1806 .text.HAL_RCC_GetClockConfig:0000000000000000 $t /tmp/ccrUqvu4.s:1812 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig /tmp/ccrUqvu4.s:1867 .text.HAL_RCC_GetClockConfig:0000000000000034 $d /tmp/ccrUqvu4.s:1873 .text.HAL_RCC_CSSCallback:0000000000000000 $t /tmp/ccrUqvu4.s:1879 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback /tmp/ccrUqvu4.s:1892 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t /tmp/ccrUqvu4.s:1898 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler /tmp/ccrUqvu4.s:1932 .text.HAL_RCC_NMI_IRQHandler:000000000000001c $d UNDEFINED SYMBOLS HAL_GetTick HAL_GPIO_Init __aeabi_uldivmod HAL_InitTick AHBPrescTable SystemCoreClock APBPrescTable