ARM GAS /tmp/cceyi1nA.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "gpio.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.MX_GPIO_Init,"ax",%progbits 20 .align 1 21 .global MX_GPIO_Init 22 .syntax unified 23 .thumb 24 .thumb_func 26 MX_GPIO_Init: 27 .LFB130: 28 .file 1 "Src/gpio.c" 1:Src/gpio.c **** /** 2:Src/gpio.c **** ****************************************************************************** 3:Src/gpio.c **** * File Name : gpio.c 4:Src/gpio.c **** * Description : This file provides code for the configuration 5:Src/gpio.c **** * of all used GPIO pins. 6:Src/gpio.c **** ****************************************************************************** 7:Src/gpio.c **** * @attention 8:Src/gpio.c **** * 9:Src/gpio.c **** *

© Copyright (c) 2022 STMicroelectronics. 10:Src/gpio.c **** * All rights reserved.

11:Src/gpio.c **** * 12:Src/gpio.c **** * This software component is licensed by ST under BSD 3-Clause license, 13:Src/gpio.c **** * the "License"; You may not use this file except in compliance with the 14:Src/gpio.c **** * License. You may obtain a copy of the License at: 15:Src/gpio.c **** * opensource.org/licenses/BSD-3-Clause 16:Src/gpio.c **** * 17:Src/gpio.c **** ****************************************************************************** 18:Src/gpio.c **** */ 19:Src/gpio.c **** 20:Src/gpio.c **** /* Includes ------------------------------------------------------------------*/ 21:Src/gpio.c **** #include "gpio.h" 22:Src/gpio.c **** /* USER CODE BEGIN 0 */ 23:Src/gpio.c **** 24:Src/gpio.c **** /* USER CODE END 0 */ 25:Src/gpio.c **** 26:Src/gpio.c **** /*----------------------------------------------------------------------------*/ 27:Src/gpio.c **** /* Configure GPIO */ 28:Src/gpio.c **** /*----------------------------------------------------------------------------*/ 29:Src/gpio.c **** /* USER CODE BEGIN 1 */ 30:Src/gpio.c **** ARM GAS /tmp/cceyi1nA.s page 2 31:Src/gpio.c **** /* USER CODE END 1 */ 32:Src/gpio.c **** 33:Src/gpio.c **** /** Configure pins 34:Src/gpio.c **** */ 35:Src/gpio.c **** void MX_GPIO_Init(void) 36:Src/gpio.c **** { 29 .loc 1 36 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 40 32 @ frame_needed = 0, uses_anonymous_args = 0 33 0000 30B5 push {r4, r5, lr} 34 .LCFI0: 35 .cfi_def_cfa_offset 12 36 .cfi_offset 4, -12 37 .cfi_offset 5, -8 38 .cfi_offset 14, -4 39 0002 8BB0 sub sp, sp, #44 40 .LCFI1: 41 .cfi_def_cfa_offset 56 37:Src/gpio.c **** 38:Src/gpio.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 42 .loc 1 38 3 view .LVU1 43 .loc 1 38 20 is_stmt 0 view .LVU2 44 0004 0024 movs r4, #0 45 0006 0594 str r4, [sp, #20] 46 0008 0694 str r4, [sp, #24] 47 000a 0794 str r4, [sp, #28] 48 000c 0894 str r4, [sp, #32] 49 000e 0994 str r4, [sp, #36] 39:Src/gpio.c **** 40:Src/gpio.c **** /* GPIO Ports Clock Enable */ 41:Src/gpio.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 50 .loc 1 41 3 is_stmt 1 view .LVU3 51 .LBB2: 52 .loc 1 41 3 view .LVU4 53 0010 0194 str r4, [sp, #4] 54 .loc 1 41 3 view .LVU5 55 0012 1E4B ldr r3, .L3 56 0014 1A6B ldr r2, [r3, #48] 57 0016 42F00102 orr r2, r2, #1 58 001a 1A63 str r2, [r3, #48] 59 .loc 1 41 3 view .LVU6 60 001c 1A6B ldr r2, [r3, #48] 61 001e 02F00102 and r2, r2, #1 62 0022 0192 str r2, [sp, #4] 63 .loc 1 41 3 view .LVU7 64 0024 019A ldr r2, [sp, #4] 65 .LBE2: 66 .loc 1 41 3 view .LVU8 42:Src/gpio.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 67 .loc 1 42 3 view .LVU9 68 .LBB3: 69 .loc 1 42 3 view .LVU10 70 0026 0294 str r4, [sp, #8] 71 .loc 1 42 3 view .LVU11 72 0028 1A6B ldr r2, [r3, #48] 73 002a 42F00802 orr r2, r2, #8 ARM GAS /tmp/cceyi1nA.s page 3 74 002e 1A63 str r2, [r3, #48] 75 .loc 1 42 3 view .LVU12 76 0030 1A6B ldr r2, [r3, #48] 77 0032 02F00802 and r2, r2, #8 78 0036 0292 str r2, [sp, #8] 79 .loc 1 42 3 view .LVU13 80 0038 029A ldr r2, [sp, #8] 81 .LBE3: 82 .loc 1 42 3 view .LVU14 43:Src/gpio.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 83 .loc 1 43 3 view .LVU15 84 .LBB4: 85 .loc 1 43 3 view .LVU16 86 003a 0394 str r4, [sp, #12] 87 .loc 1 43 3 view .LVU17 88 003c 1A6B ldr r2, [r3, #48] 89 003e 42F00402 orr r2, r2, #4 90 0042 1A63 str r2, [r3, #48] 91 .loc 1 43 3 view .LVU18 92 0044 1A6B ldr r2, [r3, #48] 93 0046 02F00402 and r2, r2, #4 94 004a 0392 str r2, [sp, #12] 95 .loc 1 43 3 view .LVU19 96 004c 039A ldr r2, [sp, #12] 97 .LBE4: 98 .loc 1 43 3 view .LVU20 44:Src/gpio.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 99 .loc 1 44 3 view .LVU21 100 .LBB5: 101 .loc 1 44 3 view .LVU22 102 004e 0494 str r4, [sp, #16] 103 .loc 1 44 3 view .LVU23 104 0050 1A6B ldr r2, [r3, #48] 105 0052 42F00202 orr r2, r2, #2 106 0056 1A63 str r2, [r3, #48] 107 .loc 1 44 3 view .LVU24 108 0058 1B6B ldr r3, [r3, #48] 109 005a 03F00203 and r3, r3, #2 110 005e 0493 str r3, [sp, #16] 111 .loc 1 44 3 view .LVU25 112 0060 049B ldr r3, [sp, #16] 113 .LBE5: 114 .loc 1 44 3 view .LVU26 45:Src/gpio.c **** 46:Src/gpio.c **** /*Configure GPIO pin Output Level */ 47:Src/gpio.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET); 115 .loc 1 47 3 view .LVU27 116 0062 0B4D ldr r5, .L3+4 117 0064 2246 mov r2, r4 118 0066 4FF47041 mov r1, #61440 119 006a 2846 mov r0, r5 120 006c FFF7FEFF bl HAL_GPIO_WritePin 121 .LVL0: 48:Src/gpio.c **** 49:Src/gpio.c **** /*Configure GPIO pins : PD12 PD13 PD14 PD15 */ 50:Src/gpio.c **** GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 122 .loc 1 50 3 view .LVU28 ARM GAS /tmp/cceyi1nA.s page 4 123 .loc 1 50 23 is_stmt 0 view .LVU29 124 0070 4FF47043 mov r3, #61440 125 0074 0593 str r3, [sp, #20] 51:Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 126 .loc 1 51 3 is_stmt 1 view .LVU30 127 .loc 1 51 24 is_stmt 0 view .LVU31 128 0076 0123 movs r3, #1 129 0078 0693 str r3, [sp, #24] 52:Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 130 .loc 1 52 3 is_stmt 1 view .LVU32 131 .loc 1 52 24 is_stmt 0 view .LVU33 132 007a 0794 str r4, [sp, #28] 53:Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 133 .loc 1 53 3 is_stmt 1 view .LVU34 134 .loc 1 53 25 is_stmt 0 view .LVU35 135 007c 0894 str r4, [sp, #32] 54:Src/gpio.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 136 .loc 1 54 3 is_stmt 1 view .LVU36 137 007e 05A9 add r1, sp, #20 138 0080 2846 mov r0, r5 139 0082 FFF7FEFF bl HAL_GPIO_Init 140 .LVL1: 55:Src/gpio.c **** 56:Src/gpio.c **** } 141 .loc 1 56 1 is_stmt 0 view .LVU37 142 0086 0BB0 add sp, sp, #44 143 .LCFI2: 144 .cfi_def_cfa_offset 12 145 @ sp needed 146 0088 30BD pop {r4, r5, pc} 147 .L4: 148 008a 00BF .align 2 149 .L3: 150 008c 00380240 .word 1073887232 151 0090 000C0240 .word 1073875968 152 .cfi_endproc 153 .LFE130: 155 .text 156 .Letext0: 157 .file 2 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 158 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 159 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h" 160 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" ARM GAS /tmp/cceyi1nA.s page 5 DEFINED SYMBOLS *ABS*:0000000000000000 gpio.c /tmp/cceyi1nA.s:20 .text.MX_GPIO_Init:0000000000000000 $t /tmp/cceyi1nA.s:26 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init /tmp/cceyi1nA.s:150 .text.MX_GPIO_Init:000000000000008c $d UNDEFINED SYMBOLS HAL_GPIO_WritePin HAL_GPIO_Init