ARM GAS /tmp/cca4EPXq.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_exti.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits 20 .align 1 21 .global HAL_EXTI_SetConfigLine 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_EXTI_SetConfigLine: 27 .LVL0: 28 .LFB130: 29 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @file stm32f4xx_hal_exti.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief EXTI HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * functionalities of the Extended Interrupts and events controller (EXTI) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * + IO operation functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @verbatim 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ============================================================================== 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ##### EXTI Peripheral features ##### 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ============================================================================== 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** [..] 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (+) Each Exti line can be configured within this driver. 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Interrupt 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Event 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Both of them 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (+) Configurable Exti lines can be configured with 3 different triggers 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Rising 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Falling 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Both of them 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (+) When set in interrupt mode, configurable Exti lines have two different 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** interrupts pending registers which allow to distinguish which transition ARM GAS /tmp/cca4EPXq.s page 2 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** occurs: 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Rising edge pending interrupt 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Falling 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** be selected through multiplexer. 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ##### How to use this driver ##### 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ============================================================================== 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** [..] 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Configure the EXTI line using HAL_EXTI_SetConfigLine(). 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Choose the interrupt line number by setting "Line" member from 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI_ConfigTypeDef structure. 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Configure the interrupt and/or event mode using "Mode" member from 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI_ConfigTypeDef structure. 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) For configurable lines, configure rising and/or falling trigger 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** "Trigger" member from EXTI_ConfigTypeDef structure. 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Get current Exti configuration of a dedicated line using 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_EXTI_GetConfigLine(). 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide exiting handle as parameter. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide exiting handle as parameter. 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide exiting handle as first parameter. 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide which callback will be registered using one value from 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI_CallbackIDTypeDef. 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (++) Provide callback function pointer. 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Get interrupt pending bit using HAL_EXTI_GetPending(). 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @endverbatim 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ****************************************************************************** 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @attention 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** *

© Copyright (c) 2018 STMicroelectronics. 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * All rights reserved.

75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This software component is licensed by ST under BSD 3-Clause license, 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * the "License"; You may not use this file except in compliance with the 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * License. You may obtain a copy of the License at: 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * opensource.org/licenses/BSD-3-Clause 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ****************************************************************************** 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/ 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** #include "stm32f4xx_hal.h" 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ARM GAS /tmp/cca4EPXq.s page 3 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @addtogroup STM32F4xx_HAL_Driver 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @addtogroup EXTI 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** MISRA C:2012 deviation rule has been granted for following rule: 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * of bounds [0,3] in following API : 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * HAL_EXTI_SetConfigLine 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * HAL_EXTI_GetConfigLine 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * HAL_EXTI_ClearConfigLine 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** #ifdef HAL_EXTI_MODULE_ENABLED 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Private typedef -----------------------------------------------------------*/ 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Private defines -----------------------------------------------------------*/ 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @defgroup EXTI_Private_Constants EXTI Private Constants 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @} 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Private macros ------------------------------------------------------------*/ 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Private variables ---------------------------------------------------------*/ 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Private function prototypes -----------------------------------------------*/ 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Exported functions --------------------------------------------------------*/ 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group1 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Configuration functions 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @verbatim 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** =============================================================================== 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ##### Configuration functions ##### 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** =============================================================================== 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @endverbatim 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Set configuration of a dedicated Exti line. 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set. 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval HAL Status. 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 30 .loc 1 142 1 view -0 ARM GAS /tmp/cca4EPXq.s page 4 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 @ link register save eliminated. 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** uint32_t regval; 35 .loc 1 143 3 view .LVU1 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check null pointer */ 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) 36 .loc 1 146 3 view .LVU2 37 .loc 1 146 6 is_stmt 0 view .LVU3 38 0000 0028 cmp r0, #0 39 0002 3CD0 beq .L4 40 0004 0346 mov r3, r0 41 .loc 1 146 23 discriminator 1 view .LVU4 42 0006 0029 cmp r1, #0 43 0008 3BD0 beq .L5 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** uint32_t regval; 44 .loc 1 142 1 view .LVU5 45 000a 10B4 push {r4} 46 .LCFI0: 47 .cfi_def_cfa_offset 4 48 .cfi_offset 4, -4 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_ERROR; 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check parameters */ 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(pExtiConfig->Line)); 49 .loc 1 152 3 is_stmt 1 view .LVU6 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); 50 .loc 1 153 3 view .LVU7 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); 51 .loc 1 154 3 view .LVU8 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Assign line number to handle */ 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; 52 .loc 1 157 3 view .LVU9 53 .loc 1 157 28 is_stmt 0 view .LVU10 54 000c 0868 ldr r0, [r1] 55 .LVL1: 56 .loc 1 157 15 view .LVU11 57 000e 1860 str r0, [r3] 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Clear EXTI line configuration */ 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->IMR &= ~pExtiConfig->Line; 58 .loc 1 160 3 is_stmt 1 view .LVU12 59 .loc 1 160 13 is_stmt 0 view .LVU13 60 0010 1D4B ldr r3, .L11 61 .LVL2: 62 .loc 1 160 13 view .LVU14 63 0012 1A68 ldr r2, [r3] 64 0014 22EA0002 bic r2, r2, r0 65 0018 1A60 str r2, [r3] 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->EMR &= ~pExtiConfig->Line; 66 .loc 1 161 3 is_stmt 1 view .LVU15 67 .loc 1 161 13 is_stmt 0 view .LVU16 ARM GAS /tmp/cca4EPXq.s page 5 68 001a 5A68 ldr r2, [r3, #4] 69 .loc 1 161 28 view .LVU17 70 001c 0868 ldr r0, [r1] 71 .loc 1 161 13 view .LVU18 72 001e 22EA0002 bic r2, r2, r0 73 0022 5A60 str r2, [r3, #4] 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Select the Mode for the selected external interrupts */ 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regval = (uint32_t)EXTI_BASE; 74 .loc 1 164 3 is_stmt 1 view .LVU19 75 .LVL3: 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regval += pExtiConfig->Mode; 76 .loc 1 165 3 view .LVU20 77 .loc 1 165 24 is_stmt 0 view .LVU21 78 0024 4A68 ldr r2, [r1, #4] 79 .loc 1 165 10 view .LVU22 80 0026 02F18042 add r2, r2, #1073741824 81 002a 02F59E32 add r2, r2, #80896 82 .LVL4: 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** *(__IO uint32_t *) regval |= pExtiConfig->Line; 83 .loc 1 166 3 is_stmt 1 view .LVU23 84 .loc 1 166 29 is_stmt 0 view .LVU24 85 002e 1068 ldr r0, [r2] 86 0030 0C68 ldr r4, [r1] 87 0032 2043 orrs r0, r0, r4 88 0034 1060 str r0, [r2] 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Clear Rising Falling edge configuration */ 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->RTSR &= ~pExtiConfig->Line; 89 .loc 1 169 3 is_stmt 1 view .LVU25 90 .loc 1 169 14 is_stmt 0 view .LVU26 91 0036 9A68 ldr r2, [r3, #8] 92 .LVL5: 93 .loc 1 169 29 view .LVU27 94 0038 0868 ldr r0, [r1] 95 .loc 1 169 14 view .LVU28 96 003a 22EA0002 bic r2, r2, r0 97 003e 9A60 str r2, [r3, #8] 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR &= ~pExtiConfig->Line; 98 .loc 1 170 3 is_stmt 1 view .LVU29 99 .loc 1 170 14 is_stmt 0 view .LVU30 100 0040 DA68 ldr r2, [r3, #12] 101 .loc 1 170 29 view .LVU31 102 0042 0868 ldr r0, [r1] 103 .loc 1 170 14 view .LVU32 104 0044 22EA0002 bic r2, r2, r0 105 0048 DA60 str r2, [r3, #12] 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Select the trigger for the selected external interrupts */ 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if (pExtiConfig->Trigger == EXTI_TRIGGER_RISING_FALLING) 106 .loc 1 173 3 is_stmt 1 view .LVU33 107 .loc 1 173 18 is_stmt 0 view .LVU34 108 004a 8B68 ldr r3, [r1, #8] 109 .loc 1 173 6 view .LVU35 110 004c 102B cmp r3, #16 111 004e 0BD0 beq .L10 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { ARM GAS /tmp/cca4EPXq.s page 6 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Rising Falling edge */ 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->RTSR |= pExtiConfig->Line; 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR |= pExtiConfig->Line; 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regval = (uint32_t)EXTI_BASE; 112 .loc 1 181 5 is_stmt 1 view .LVU36 113 .LVL6: 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regval += pExtiConfig->Trigger; 114 .loc 1 182 5 view .LVU37 115 .loc 1 182 12 is_stmt 0 view .LVU38 116 0050 03F18043 add r3, r3, #1073741824 117 0054 03F59E33 add r3, r3, #80896 118 .LVL7: 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** *(__IO uint32_t *) regval |= pExtiConfig->Line; 119 .loc 1 183 5 is_stmt 1 view .LVU39 120 .loc 1 183 31 is_stmt 0 view .LVU40 121 0058 1A68 ldr r2, [r3] 122 .loc 1 183 45 view .LVU41 123 005a 0968 ldr r1, [r1] 124 .LVL8: 125 .loc 1 183 31 view .LVU42 126 005c 0A43 orrs r2, r2, r1 127 005e 1A60 str r2, [r3] 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_OK; 128 .loc 1 185 10 view .LVU43 129 0060 0020 movs r0, #0 130 .LVL9: 131 .L2: 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 132 .loc 1 186 1 view .LVU44 133 0062 5DF8044B ldr r4, [sp], #4 134 .LCFI1: 135 .cfi_remember_state 136 .cfi_restore 4 137 .cfi_def_cfa_offset 0 138 0066 7047 bx lr 139 .LVL10: 140 .L10: 141 .LCFI2: 142 .cfi_restore_state 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR |= pExtiConfig->Line; 143 .loc 1 176 5 is_stmt 1 view .LVU45 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR |= pExtiConfig->Line; 144 .loc 1 176 16 is_stmt 0 view .LVU46 145 0068 074B ldr r3, .L11 146 006a 9A68 ldr r2, [r3, #8] 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR |= pExtiConfig->Line; 147 .loc 1 176 30 view .LVU47 148 006c 0868 ldr r0, [r1] 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR |= pExtiConfig->Line; 149 .loc 1 176 16 view .LVU48 150 006e 0243 orrs r2, r2, r0 151 0070 9A60 str r2, [r3, #8] 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } ARM GAS /tmp/cca4EPXq.s page 7 152 .loc 1 177 5 is_stmt 1 view .LVU49 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 153 .loc 1 177 16 is_stmt 0 view .LVU50 154 0072 DA68 ldr r2, [r3, #12] 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 155 .loc 1 177 30 view .LVU51 156 0074 0968 ldr r1, [r1] 157 .LVL11: 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 158 .loc 1 177 16 view .LVU52 159 0076 0A43 orrs r2, r2, r1 160 0078 DA60 str r2, [r3, #12] 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 161 .loc 1 185 10 view .LVU53 162 007a 0020 movs r0, #0 163 007c F1E7 b .L2 164 .LVL12: 165 .L4: 166 .LCFI3: 167 .cfi_def_cfa_offset 0 168 .cfi_restore 4 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 169 .loc 1 148 12 view .LVU54 170 007e 0120 movs r0, #1 171 .LVL13: 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 172 .loc 1 148 12 view .LVU55 173 0080 7047 bx lr 174 .LVL14: 175 .L5: 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 176 .loc 1 148 12 view .LVU56 177 0082 0120 movs r0, #1 178 .LVL15: 179 .loc 1 186 1 view .LVU57 180 0084 7047 bx lr 181 .L12: 182 0086 00BF .align 2 183 .L11: 184 0088 003C0140 .word 1073822720 185 .cfi_endproc 186 .LFE130: 188 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits 189 .align 1 190 .global HAL_EXTI_GetConfigLine 191 .syntax unified 192 .thumb 193 .thumb_func 195 HAL_EXTI_GetConfigLine: 196 .LVL16: 197 .LFB131: 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval HAL Status. ARM GAS /tmp/cca4EPXq.s page 8 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 198 .loc 1 195 1 is_stmt 1 view -0 199 .cfi_startproc 200 @ args = 0, pretend = 0, frame = 0 201 @ frame_needed = 0, uses_anonymous_args = 0 202 @ link register save eliminated. 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check null pointer */ 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) 203 .loc 1 197 3 view .LVU59 204 .loc 1 197 6 is_stmt 0 view .LVU60 205 0000 0246 mov r2, r0 206 0002 0028 cmp r0, #0 207 0004 31D0 beq .L21 208 .loc 1 197 23 discriminator 1 view .LVU61 209 0006 0029 cmp r1, #0 210 0008 31D0 beq .L22 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_ERROR; 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check the parameter */ 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); 211 .loc 1 203 3 is_stmt 1 view .LVU62 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Store handle line number to configuration structure */ 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; 212 .loc 1 206 3 view .LVU63 213 .loc 1 206 28 is_stmt 0 view .LVU64 214 000a 0368 ldr r3, [r0] 215 .loc 1 206 21 view .LVU65 216 000c 0B60 str r3, [r1] 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Get EXTI mode to configiguration structure */ 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if ((EXTI->IMR & hexti->Line) == hexti->Line) 217 .loc 1 209 3 is_stmt 1 view .LVU66 218 .loc 1 209 12 is_stmt 0 view .LVU67 219 000e 1948 ldr r0, .L28 220 .LVL17: 221 .loc 1 209 12 view .LVU68 222 0010 0068 ldr r0, [r0] 223 .loc 1 209 6 view .LVU69 224 0012 33EA0000 bics r0, r3, r0 225 0016 12D0 beq .L23 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else if ((EXTI->EMR & hexti->Line) == hexti->Line) 226 .loc 1 213 8 is_stmt 1 view .LVU70 227 .loc 1 213 17 is_stmt 0 view .LVU71 228 0018 1648 ldr r0, .L28 229 001a 4068 ldr r0, [r0, #4] 230 .loc 1 213 11 view .LVU72 231 001c 8343 bics r3, r3, r0 232 001e 11D0 beq .L24 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { ARM GAS /tmp/cca4EPXq.s page 9 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_EVENT; 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* No MODE selected */ 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Mode = 0x0Bu; 233 .loc 1 220 5 is_stmt 1 view .LVU73 234 .loc 1 220 23 is_stmt 0 view .LVU74 235 0020 0B23 movs r3, #11 236 0022 4B60 str r3, [r1, #4] 237 .L16: 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Get EXTI Trigger to configiguration structure */ 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if ((EXTI->RTSR & hexti->Line) == hexti->Line) 238 .loc 1 224 3 is_stmt 1 view .LVU75 239 .loc 1 224 12 is_stmt 0 view .LVU76 240 0024 134B ldr r3, .L28 241 0026 9868 ldr r0, [r3, #8] 242 .loc 1 224 26 view .LVU77 243 0028 1368 ldr r3, [r2] 244 .loc 1 224 6 view .LVU78 245 002a 33EA0002 bics r2, r3, r0 246 .LVL18: 247 .loc 1 224 6 view .LVU79 248 002e 0CD0 beq .L25 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if ((EXTI->FTSR & hexti->Line) == hexti->Line) 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING_FALLING; 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else if ((EXTI->FTSR & hexti->Line) == hexti->Line) 249 .loc 1 235 8 is_stmt 1 view .LVU80 250 .loc 1 235 17 is_stmt 0 view .LVU81 251 0030 104A ldr r2, .L28 252 0032 D268 ldr r2, [r2, #12] 253 .loc 1 235 11 view .LVU82 254 0034 9343 bics r3, r3, r2 255 0036 14D0 beq .L26 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_FALLING; 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* No Trigger selected */ 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** pExtiConfig->Trigger = 0x00u; 256 .loc 1 242 5 is_stmt 1 view .LVU83 257 .loc 1 242 26 is_stmt 0 view .LVU84 258 0038 0020 movs r0, #0 259 003a 8860 str r0, [r1, #8] 260 003c 7047 bx lr 261 .LVL19: ARM GAS /tmp/cca4EPXq.s page 10 262 .L23: 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 263 .loc 1 211 5 is_stmt 1 view .LVU85 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 264 .loc 1 211 23 is_stmt 0 view .LVU86 265 003e 0023 movs r3, #0 266 0040 4B60 str r3, [r1, #4] 267 0042 EFE7 b .L16 268 .L24: 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 269 .loc 1 215 5 is_stmt 1 view .LVU87 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 270 .loc 1 215 23 is_stmt 0 view .LVU88 271 0044 0423 movs r3, #4 272 0046 4B60 str r3, [r1, #4] 273 0048 ECE7 b .L16 274 .LVL20: 275 .L25: 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 276 .loc 1 226 5 is_stmt 1 view .LVU89 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 277 .loc 1 226 14 is_stmt 0 view .LVU90 278 004a 0A4A ldr r2, .L28 279 004c D268 ldr r2, [r2, #12] 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 280 .loc 1 226 8 view .LVU91 281 004e 9343 bics r3, r3, r2 282 0050 03D0 beq .L27 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 283 .loc 1 232 7 is_stmt 1 view .LVU92 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 284 .loc 1 232 28 is_stmt 0 view .LVU93 285 0052 0823 movs r3, #8 286 0054 8B60 str r3, [r1, #8] 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_OK; 287 .loc 1 245 10 view .LVU94 288 0056 0020 movs r0, #0 289 0058 7047 bx lr 290 .L27: 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 291 .loc 1 228 7 is_stmt 1 view .LVU95 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 292 .loc 1 228 28 is_stmt 0 view .LVU96 293 005a 1023 movs r3, #16 294 005c 8B60 str r3, [r1, #8] 295 .loc 1 245 10 view .LVU97 296 005e 0020 movs r0, #0 297 0060 7047 bx lr 298 .L26: 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 299 .loc 1 237 5 is_stmt 1 view .LVU98 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 300 .loc 1 237 26 is_stmt 0 view .LVU99 301 0062 0C23 movs r3, #12 302 0064 8B60 str r3, [r1, #8] ARM GAS /tmp/cca4EPXq.s page 11 303 .loc 1 245 10 view .LVU100 304 0066 0020 movs r0, #0 305 0068 7047 bx lr 306 .LVL21: 307 .L21: 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 308 .loc 1 199 12 view .LVU101 309 006a 0120 movs r0, #1 310 .LVL22: 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 311 .loc 1 199 12 view .LVU102 312 006c 7047 bx lr 313 .LVL23: 314 .L22: 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 315 .loc 1 199 12 view .LVU103 316 006e 0120 movs r0, #1 317 .LVL24: 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 318 .loc 1 246 1 view .LVU104 319 0070 7047 bx lr 320 .L29: 321 0072 00BF .align 2 322 .L28: 323 0074 003C0140 .word 1073822720 324 .cfi_endproc 325 .LFE131: 327 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits 328 .align 1 329 .global HAL_EXTI_ClearConfigLine 330 .syntax unified 331 .thumb 332 .thumb_func 334 HAL_EXTI_ClearConfigLine: 335 .LVL25: 336 .LFB132: 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval HAL Status. 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 337 .loc 1 254 1 is_stmt 1 view -0 338 .cfi_startproc 339 @ args = 0, pretend = 0, frame = 0 340 @ frame_needed = 0, uses_anonymous_args = 0 341 @ link register save eliminated. 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check null pointer */ 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if (hexti == NULL) 342 .loc 1 256 3 view .LVU106 343 .loc 1 256 6 is_stmt 0 view .LVU107 344 0000 0246 mov r2, r0 345 0002 B0B1 cbz r0, .L32 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_ERROR; ARM GAS /tmp/cca4EPXq.s page 12 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check the parameter */ 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); 346 .loc 1 262 3 is_stmt 1 view .LVU108 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* 1] Clear interrupt mode */ 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~hexti->Line); 347 .loc 1 265 3 view .LVU109 348 .loc 1 265 20 is_stmt 0 view .LVU110 349 0004 0C4B ldr r3, .L33 350 0006 1968 ldr r1, [r3] 351 .loc 1 265 34 view .LVU111 352 0008 0068 ldr r0, [r0] 353 .LVL26: 354 .loc 1 265 26 view .LVU112 355 000a 21EA0001 bic r1, r1, r0 356 .loc 1 265 13 view .LVU113 357 000e 1960 str r1, [r3] 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* 2] Clear event mode */ 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->EMR = (EXTI->EMR & ~hexti->Line); 358 .loc 1 268 3 is_stmt 1 view .LVU114 359 .loc 1 268 20 is_stmt 0 view .LVU115 360 0010 5968 ldr r1, [r3, #4] 361 .loc 1 268 34 view .LVU116 362 0012 1068 ldr r0, [r2] 363 .loc 1 268 26 view .LVU117 364 0014 21EA0001 bic r1, r1, r0 365 .loc 1 268 13 view .LVU118 366 0018 5960 str r1, [r3, #4] 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* 3] Clear triggers */ 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->RTSR = (EXTI->RTSR & ~hexti->Line); 367 .loc 1 271 3 is_stmt 1 view .LVU119 368 .loc 1 271 21 is_stmt 0 view .LVU120 369 001a 9968 ldr r1, [r3, #8] 370 .loc 1 271 36 view .LVU121 371 001c 1068 ldr r0, [r2] 372 .loc 1 271 28 view .LVU122 373 001e 21EA0001 bic r1, r1, r0 374 .loc 1 271 14 view .LVU123 375 0022 9960 str r1, [r3, #8] 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->FTSR = (EXTI->FTSR & ~hexti->Line); 376 .loc 1 272 3 is_stmt 1 view .LVU124 377 .loc 1 272 21 is_stmt 0 view .LVU125 378 0024 D968 ldr r1, [r3, #12] 379 .loc 1 272 36 view .LVU126 380 0026 1268 ldr r2, [r2] 381 .LVL27: 382 .loc 1 272 28 view .LVU127 383 0028 21EA0202 bic r2, r1, r2 384 .loc 1 272 14 view .LVU128 385 002c DA60 str r2, [r3, #12] 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_OK; 386 .loc 1 274 3 is_stmt 1 view .LVU129 ARM GAS /tmp/cca4EPXq.s page 13 387 .loc 1 274 10 is_stmt 0 view .LVU130 388 002e 0020 movs r0, #0 389 0030 7047 bx lr 390 .LVL28: 391 .L32: 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 392 .loc 1 258 12 view .LVU131 393 0032 0120 movs r0, #1 394 .LVL29: 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 395 .loc 1 275 1 view .LVU132 396 0034 7047 bx lr 397 .L34: 398 0036 00BF .align 2 399 .L33: 400 0038 003C0140 .word 1073822720 401 .cfi_endproc 402 .LFE132: 404 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits 405 .align 1 406 .global HAL_EXTI_RegisterCallback 407 .syntax unified 408 .thumb 409 .thumb_func 411 HAL_EXTI_RegisterCallback: 412 .LVL30: 413 .LFB133: 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param CallbackID User callback identifier. 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval HAL Status. 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 414 .loc 1 286 1 is_stmt 1 view -0 415 .cfi_startproc 416 @ args = 0, pretend = 0, frame = 0 417 @ frame_needed = 0, uses_anonymous_args = 0 418 @ link register save eliminated. 419 .loc 1 286 1 is_stmt 0 view .LVU134 420 0000 0346 mov r3, r0 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; 421 .loc 1 287 3 is_stmt 1 view .LVU135 422 .LVL31: 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** switch (CallbackID) 423 .loc 1 289 3 view .LVU136 424 0002 0846 mov r0, r1 425 .LVL32: 426 .loc 1 289 3 is_stmt 0 view .LVU137 427 0004 09B9 cbnz r1, .L37 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: ARM GAS /tmp/cca4EPXq.s page 14 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** hexti->RisingCallback = pPendingCbfn; 428 .loc 1 292 7 is_stmt 1 view .LVU138 429 .loc 1 292 29 is_stmt 0 view .LVU139 430 0006 5A60 str r2, [r3, #4] 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** break; 431 .loc 1 293 7 is_stmt 1 view .LVU140 432 0008 7047 bx lr 433 .L37: 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** default: 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** status = HAL_ERROR; 434 .loc 1 296 14 is_stmt 0 view .LVU141 435 000a 0120 movs r0, #1 436 .LVL33: 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** break; 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return status; 437 .loc 1 300 3 is_stmt 1 view .LVU142 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 438 .loc 1 301 1 is_stmt 0 view .LVU143 439 000c 7047 bx lr 440 .cfi_endproc 441 .LFE133: 443 .section .text.HAL_EXTI_GetHandle,"ax",%progbits 444 .align 1 445 .global HAL_EXTI_GetHandle 446 .syntax unified 447 .thumb 448 .thumb_func 450 HAL_EXTI_GetHandle: 451 .LVL34: 452 .LFB134: 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Store line number as handle private field. 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param ExtiLine Exti line number. 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval HAL Status. 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 453 .loc 1 311 1 is_stmt 1 view -0 454 .cfi_startproc 455 @ args = 0, pretend = 0, frame = 0 456 @ frame_needed = 0, uses_anonymous_args = 0 457 @ link register save eliminated. 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check the parameters */ 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); 458 .loc 1 313 3 view .LVU145 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check null pointer */ 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if (hexti == NULL) 459 .loc 1 316 3 view .LVU146 460 .loc 1 316 6 is_stmt 0 view .LVU147 461 0000 10B1 cbz r0, .L40 ARM GAS /tmp/cca4EPXq.s page 15 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_ERROR; 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** else 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Store line number as handle private field */ 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** hexti->Line = ExtiLine; 462 .loc 1 323 5 is_stmt 1 view .LVU148 463 .loc 1 323 17 is_stmt 0 view .LVU149 464 0002 0160 str r1, [r0] 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return HAL_OK; 465 .loc 1 325 5 is_stmt 1 view .LVU150 466 .loc 1 325 12 is_stmt 0 view .LVU151 467 0004 0020 movs r0, #0 468 .LVL35: 469 .loc 1 325 12 view .LVU152 470 0006 7047 bx lr 471 .LVL36: 472 .L40: 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 473 .loc 1 318 12 view .LVU153 474 0008 0120 movs r0, #1 475 .LVL37: 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 476 .loc 1 327 1 view .LVU154 477 000a 7047 bx lr 478 .cfi_endproc 479 .LFE134: 481 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits 482 .align 1 483 .global HAL_EXTI_IRQHandler 484 .syntax unified 485 .thumb 486 .thumb_func 488 HAL_EXTI_IRQHandler: 489 .LVL38: 490 .LFB135: 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @} 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief EXTI IO functions. 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @verbatim 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** =============================================================================== 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** ##### IO operation functions ##### 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** =============================================================================== 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** @endverbatim 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @{ 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** ARM GAS /tmp/cca4EPXq.s page 16 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Handle EXTI interrupt request. 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval none. 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 491 .loc 1 351 1 is_stmt 1 view -0 492 .cfi_startproc 493 @ args = 0, pretend = 0, frame = 0 494 @ frame_needed = 0, uses_anonymous_args = 0 495 .loc 1 351 1 is_stmt 0 view .LVU156 496 0000 08B5 push {r3, lr} 497 .LCFI4: 498 .cfi_def_cfa_offset 8 499 .cfi_offset 3, -8 500 .cfi_offset 14, -4 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if (EXTI->PR != 0x00u) 501 .loc 1 352 3 is_stmt 1 view .LVU157 502 .loc 1 352 11 is_stmt 0 view .LVU158 503 0002 054B ldr r3, .L44 504 0004 5B69 ldr r3, [r3, #20] 505 .loc 1 352 6 view .LVU159 506 0006 2BB1 cbz r3, .L41 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Clear pending bit */ 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->PR = hexti->Line; 507 .loc 1 355 5 is_stmt 1 view .LVU160 508 .loc 1 355 21 is_stmt 0 view .LVU161 509 0008 0268 ldr r2, [r0] 510 .loc 1 355 14 view .LVU162 511 000a 034B ldr r3, .L44 512 000c 5A61 str r2, [r3, #20] 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Call callback */ 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** if (hexti->RisingCallback != NULL) 513 .loc 1 358 5 is_stmt 1 view .LVU163 514 .loc 1 358 14 is_stmt 0 view .LVU164 515 000e 4368 ldr r3, [r0, #4] 516 .loc 1 358 8 view .LVU165 517 0010 03B1 cbz r3, .L41 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** hexti->RisingCallback(); 518 .loc 1 360 7 is_stmt 1 view .LVU166 519 0012 9847 blx r3 520 .LVL39: 521 .L41: 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 522 .loc 1 363 1 is_stmt 0 view .LVU167 523 0014 08BD pop {r3, pc} 524 .L45: 525 0016 00BF .align 2 526 .L44: 527 0018 003C0140 .word 1073822720 528 .cfi_endproc 529 .LFE135: ARM GAS /tmp/cca4EPXq.s page 17 531 .section .text.HAL_EXTI_GetPending,"ax",%progbits 532 .align 1 533 .global HAL_EXTI_GetPending 534 .syntax unified 535 .thumb 536 .thumb_func 538 HAL_EXTI_GetPending: 539 .LVL40: 540 .LFB136: 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter can be one of the following values: 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter is kept for compatibility with other series. 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 541 .loc 1 375 1 is_stmt 1 view -0 542 .cfi_startproc 543 @ args = 0, pretend = 0, frame = 0 544 @ frame_needed = 0, uses_anonymous_args = 0 545 @ link register save eliminated. 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** __IO uint32_t *regaddr; 546 .loc 1 376 3 view .LVU169 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** uint32_t regval; 547 .loc 1 377 3 view .LVU170 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check parameters */ 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); 548 .loc 1 380 3 view .LVU171 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); 549 .loc 1 381 3 view .LVU172 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Get pending bit */ 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regaddr = &EXTI->PR; 550 .loc 1 384 3 view .LVU173 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* return 1 if bit is set else 0 */ 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** regval = ((*regaddr & hexti->Line) >> POSITION_VAL(hexti->Line)); 551 .loc 1 387 3 view .LVU174 552 .loc 1 387 14 is_stmt 0 view .LVU175 553 0000 054B ldr r3, .L47 554 0002 D3F8142C ldr r2, [r3, #3092] 555 .loc 1 387 30 view .LVU176 556 0006 0368 ldr r3, [r0] 557 .loc 1 387 23 view .LVU177 558 0008 02EA0300 and r0, r2, r3 559 .LVL41: 560 .LBB4: 561 .LBI4: 562 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h ARM GAS /tmp/cca4EPXq.s page 18 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) ARM GAS /tmp/cca4EPXq.s page 19 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cca4EPXq.s page 20 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cca4EPXq.s page 21 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. ARM GAS /tmp/cca4EPXq.s page 22 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set ARM GAS /tmp/cca4EPXq.s page 23 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/cca4EPXq.s page 24 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); ARM GAS /tmp/cca4EPXq.s page 25 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. ARM GAS /tmp/cca4EPXq.s page 26 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/cca4EPXq.s page 27 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/cca4EPXq.s page 28 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit ARM GAS /tmp/cca4EPXq.s page 29 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/cca4EPXq.s page 30 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu ARM GAS /tmp/cca4EPXq.s page 31 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); ARM GAS /tmp/cca4EPXq.s page 32 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") ARM GAS /tmp/cca4EPXq.s page 33 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) ARM GAS /tmp/cca4EPXq.s page 34 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/cca4EPXq.s page 35 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 563 .loc 2 981 31 is_stmt 1 view .LVU178 564 .LBB5: 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 565 .loc 2 983 3 view .LVU179 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 566 .loc 2 988 4 view .LVU180 567 .syntax unified 568 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 569 000c 93FAA3F3 rbit r3, r3 570 @ 0 "" 2 571 .LVL42: 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 572 .loc 2 1001 3 view .LVU181 573 .loc 2 1001 3 is_stmt 0 view .LVU182 574 .thumb 575 .syntax unified 576 .LBE5: 577 .LBE4: 578 .loc 1 387 10 view .LVU183 579 0010 B3FA83F3 clz r3, r3 580 .LVL43: 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** return regval; 581 .loc 1 389 3 is_stmt 1 view .LVU184 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 582 .loc 1 390 1 is_stmt 0 view .LVU185 583 0014 D840 lsrs r0, r0, r3 584 .LVL44: 585 .loc 1 390 1 view .LVU186 586 0016 7047 bx lr ARM GAS /tmp/cca4EPXq.s page 36 587 .L48: 588 .align 2 589 .L47: 590 0018 00300140 .word 1073819648 591 .cfi_endproc 592 .LFE136: 594 .section .text.HAL_EXTI_ClearPending,"ax",%progbits 595 .align 1 596 .global HAL_EXTI_ClearPending 597 .syntax unified 598 .thumb 599 .thumb_func 601 HAL_EXTI_ClearPending: 602 .LVL45: 603 .LFB137: 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter can be one of the following values: 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * This parameter is kept for compatibility with other series. 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval None. 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 604 .loc 1 402 1 is_stmt 1 view -0 605 .cfi_startproc 606 @ args = 0, pretend = 0, frame = 0 607 @ frame_needed = 0, uses_anonymous_args = 0 608 @ link register save eliminated. 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check parameters */ 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); 609 .loc 1 404 3 view .LVU188 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); 610 .loc 1 405 3 view .LVU189 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->PR = hexti->Line; 611 .loc 1 407 3 view .LVU190 612 .loc 1 407 20 is_stmt 0 view .LVU191 613 0000 0268 ldr r2, [r0] 614 .loc 1 407 12 view .LVU192 615 0002 014B ldr r3, .L50 616 0004 5A61 str r2, [r3, #20] 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 617 .loc 1 408 1 view .LVU193 618 0006 7047 bx lr 619 .L51: 620 .align 2 621 .L50: 622 0008 003C0140 .word 1073822720 623 .cfi_endproc 624 .LFE137: 626 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits 627 .align 1 628 .global HAL_EXTI_GenerateSWI ARM GAS /tmp/cca4EPXq.s page 37 629 .syntax unified 630 .thumb 631 .thumb_func 633 HAL_EXTI_GenerateSWI: 634 .LVL46: 635 .LFB138: 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /** 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @param hexti Exti handle. 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** * @retval None. 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** */ 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** { 636 .loc 1 416 1 is_stmt 1 view -0 637 .cfi_startproc 638 @ args = 0, pretend = 0, frame = 0 639 @ frame_needed = 0, uses_anonymous_args = 0 640 @ link register save eliminated. 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** /* Check parameters */ 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); 641 .loc 1 418 3 view .LVU195 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** EXTI->SWIER = hexti->Line; 642 .loc 1 420 3 view .LVU196 643 .loc 1 420 22 is_stmt 0 view .LVU197 644 0000 0268 ldr r2, [r0] 645 .loc 1 420 15 view .LVU198 646 0002 014B ldr r3, .L53 647 0004 1A61 str r2, [r3, #16] 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c **** } 648 .loc 1 421 1 view .LVU199 649 0006 7047 bx lr 650 .L54: 651 .align 2 652 .L53: 653 0008 003C0140 .word 1073822720 654 .cfi_endproc 655 .LFE138: 657 .text 658 .Letext0: 659 .file 3 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 660 .file 4 "/home/gitc/\346\241\214\351\235\242/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/ 661 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h" 662 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 663 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h" ARM GAS /tmp/cca4EPXq.s page 38 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_exti.c /tmp/cca4EPXq.s:20 .text.HAL_EXTI_SetConfigLine:0000000000000000 $t /tmp/cca4EPXq.s:26 .text.HAL_EXTI_SetConfigLine:0000000000000000 HAL_EXTI_SetConfigLine /tmp/cca4EPXq.s:184 .text.HAL_EXTI_SetConfigLine:0000000000000088 $d /tmp/cca4EPXq.s:189 .text.HAL_EXTI_GetConfigLine:0000000000000000 $t /tmp/cca4EPXq.s:195 .text.HAL_EXTI_GetConfigLine:0000000000000000 HAL_EXTI_GetConfigLine /tmp/cca4EPXq.s:323 .text.HAL_EXTI_GetConfigLine:0000000000000074 $d /tmp/cca4EPXq.s:328 .text.HAL_EXTI_ClearConfigLine:0000000000000000 $t /tmp/cca4EPXq.s:334 .text.HAL_EXTI_ClearConfigLine:0000000000000000 HAL_EXTI_ClearConfigLine /tmp/cca4EPXq.s:400 .text.HAL_EXTI_ClearConfigLine:0000000000000038 $d /tmp/cca4EPXq.s:405 .text.HAL_EXTI_RegisterCallback:0000000000000000 $t /tmp/cca4EPXq.s:411 .text.HAL_EXTI_RegisterCallback:0000000000000000 HAL_EXTI_RegisterCallback /tmp/cca4EPXq.s:444 .text.HAL_EXTI_GetHandle:0000000000000000 $t /tmp/cca4EPXq.s:450 .text.HAL_EXTI_GetHandle:0000000000000000 HAL_EXTI_GetHandle /tmp/cca4EPXq.s:482 .text.HAL_EXTI_IRQHandler:0000000000000000 $t /tmp/cca4EPXq.s:488 .text.HAL_EXTI_IRQHandler:0000000000000000 HAL_EXTI_IRQHandler /tmp/cca4EPXq.s:527 .text.HAL_EXTI_IRQHandler:0000000000000018 $d /tmp/cca4EPXq.s:532 .text.HAL_EXTI_GetPending:0000000000000000 $t /tmp/cca4EPXq.s:538 .text.HAL_EXTI_GetPending:0000000000000000 HAL_EXTI_GetPending /tmp/cca4EPXq.s:590 .text.HAL_EXTI_GetPending:0000000000000018 $d /tmp/cca4EPXq.s:595 .text.HAL_EXTI_ClearPending:0000000000000000 $t /tmp/cca4EPXq.s:601 .text.HAL_EXTI_ClearPending:0000000000000000 HAL_EXTI_ClearPending /tmp/cca4EPXq.s:622 .text.HAL_EXTI_ClearPending:0000000000000008 $d /tmp/cca4EPXq.s:627 .text.HAL_EXTI_GenerateSWI:0000000000000000 $t /tmp/cca4EPXq.s:633 .text.HAL_EXTI_GenerateSWI:0000000000000000 HAL_EXTI_GenerateSWI /tmp/cca4EPXq.s:653 .text.HAL_EXTI_GenerateSWI:0000000000000008 $d NO UNDEFINED SYMBOLS