ARM GAS /tmp/ccxtFLUq.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f4xx_hal_rcc.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.HAL_RCC_DeInit,"ax",%progbits 18 .align 1 19 .weak HAL_RCC_DeInit 20 .syntax unified 21 .thumb 22 .thumb_func 23 .fpu fpv4-sp-d16 25 HAL_RCC_DeInit: 26 .LFB130: 27 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @file stm32f4xx_hal_rcc.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SRAM, Flash and JTAG. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses; 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** all peripherals mapped on these busses are running at HSI speed. 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** are assigned to be used for debug purpose. 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Once the device started from reset, the user application has to: 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance) 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers ARM GAS /tmp/ccxtFLUq.s page 2 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG) 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC Limitations ##### 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from/to registers. 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Implemented Workaround: 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) For AHB & APB peripherals, a dummy read to the peripheral register has been 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @attention 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *

© Copyright (c) 2017 STMicroelectronics. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * All rights reserved.

59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license, 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * License. You may obtain a copy of the License at: 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h" 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ ARM GAS /tmp/ccxtFLUq.s page 3 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT GPIOC 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN GPIO_PIN_9 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/ 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initialization and Configuration functions 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and APB2). 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the PLL as System clock source. 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source. 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring two different output clocks: 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 168 MHz) 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz). 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt ARM GAS /tmp/ccxtFLUq.s page 4 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PA8 pin. 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PC9 pin. 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] System, AHB and APB busses clocks configuration 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HSE and PLL. 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the peripherals mapped on these busses. You can use 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz. 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices, 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz, 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 84 MHz and PCLK1 42 MHz. 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz, 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 100 MHz and PCLK1 50 MHz. 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSI ON and used as system clock source 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSE and PLL OFF 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - CSS, MCO1 and MCO2 OFF 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - All interrupts disabled 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - Peripheral clocks 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void) ARM GAS /tmp/ccxtFLUq.s page 5 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 28 .loc 1 203 0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 32 @ link register save eliminated. 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 33 .loc 1 205 0 34 0000 0020 movs r0, #0 35 0002 7047 bx lr 36 .cfi_endproc 37 .LFE130: 39 .section .text.HAL_RCC_OscConfig,"ax",%progbits 40 .align 1 41 .weak HAL_RCC_OscConfig 42 .syntax unified 43 .thumb 44 .thumb_func 45 .fpu fpv4-sp-d16 47 HAL_RCC_OscConfig: 48 .LFB131: 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC_OscInitTypeDef. 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to LSE Off 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to HSE Off 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 49 .loc 1 222 0 50 .cfi_startproc 51 @ args = 0, pretend = 0, frame = 8 52 @ frame_needed = 0, uses_anonymous_args = 0 53 .LVL0: 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) 54 .loc 1 226 0 55 0000 0028 cmp r0, #0 56 0002 00F0BB81 beq .L51 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 57 .loc 1 222 0 58 0006 70B5 push {r4, r5, r6, lr} 59 .LCFI0: 60 .cfi_def_cfa_offset 16 61 .cfi_offset 4, -16 ARM GAS /tmp/ccxtFLUq.s page 6 62 .cfi_offset 5, -12 63 .cfi_offset 6, -8 64 .cfi_offset 14, -4 65 0008 82B0 sub sp, sp, #8 66 .LCFI1: 67 .cfi_def_cfa_offset 24 68 000a 0446 mov r4, r0 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 69 .loc 1 234 0 70 000c 0368 ldr r3, [r0] 71 000e 13F0010F tst r3, #1 72 0012 3BD0 beq .L4 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 73 .loc 1 239 0 74 0014 A74B ldr r3, .L87 75 0016 9B68 ldr r3, [r3, #8] 76 0018 03F00C03 and r3, r3, #12 77 001c 042B cmp r3, #4 78 001e 2CD0 beq .L5 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 79 .loc 1 240 0 discriminator 1 80 0020 A44B ldr r3, .L87 81 0022 9B68 ldr r3, [r3, #8] 82 0024 03F00C03 and r3, r3, #12 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 83 .loc 1 239 0 discriminator 1 84 0028 082B cmp r3, #8 85 002a 21D0 beq .L73 86 .L6: 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 87 .loc 1 250 0 88 002c 6368 ldr r3, [r4, #4] 89 002e B3F5803F cmp r3, #65536 90 0032 4FD0 beq .L74 91 .loc 1 250 0 is_stmt 0 discriminator 2 92 0034 B3F5A02F cmp r3, #327680 93 0038 52D0 beq .L75 ARM GAS /tmp/ccxtFLUq.s page 7 94 .loc 1 250 0 discriminator 4 95 003a 9E4B ldr r3, .L87 96 003c 1A68 ldr r2, [r3] 97 003e 22F48032 bic r2, r2, #65536 98 0042 1A60 str r2, [r3] 99 0044 1A68 ldr r2, [r3] 100 0046 22F48022 bic r2, r2, #262144 101 004a 1A60 str r2, [r3] 102 .L8: 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE State */ 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 103 .loc 1 253 0 is_stmt 1 104 004c 6368 ldr r3, [r4, #4] 105 004e 002B cmp r3, #0 106 0050 50D0 beq .L10 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 107 .loc 1 256 0 108 0052 FFF7FEFF bl HAL_GetTick 109 .LVL1: 110 0056 0546 mov r5, r0 111 .LVL2: 112 .L11: 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is ready */ 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 113 .loc 1 259 0 114 0058 964B ldr r3, .L87 115 005a 1B68 ldr r3, [r3] 116 005c 13F4003F tst r3, #131072 117 0060 14D1 bne .L4 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 118 .loc 1 261 0 119 0062 FFF7FEFF bl HAL_GetTick 120 .LVL3: 121 0066 401B subs r0, r0, r5 122 0068 6428 cmp r0, #100 123 006a F5D9 bls .L11 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 124 .loc 1 263 0 125 006c 0320 movs r0, #3 126 006e 8AE1 b .L3 127 .LVL4: 128 .L73: 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 129 .loc 1 240 0 130 0070 904B ldr r3, .L87 131 0072 5B68 ldr r3, [r3, #4] 132 0074 13F4800F tst r3, #4194304 133 0078 D8D0 beq .L6 134 .L5: 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 135 .loc 1 242 0 ARM GAS /tmp/ccxtFLUq.s page 8 136 007a 8E4B ldr r3, .L87 137 007c 1B68 ldr r3, [r3] 138 007e 13F4003F tst r3, #131072 139 0082 03D0 beq .L4 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 140 .loc 1 242 0 is_stmt 0 discriminator 1 141 0084 6368 ldr r3, [r4, #4] 142 0086 002B cmp r3, #0 143 0088 00F07A81 beq .L76 144 .LVL5: 145 .L4: 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is bypassed or disabled */ 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 146 .loc 1 284 0 is_stmt 1 147 008c 2368 ldr r3, [r4] 148 008e 13F0020F tst r3, #2 149 0092 55D0 beq .L15 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 150 .loc 1 291 0 151 0094 874B ldr r3, .L87 152 0096 9B68 ldr r3, [r3, #8] 153 0098 13F00C0F tst r3, #12 154 009c 3ED0 beq .L16 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 155 .loc 1 292 0 discriminator 1 156 009e 854B ldr r3, .L87 157 00a0 9B68 ldr r3, [r3, #8] 158 00a2 03F00C03 and r3, r3, #12 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 159 .loc 1 291 0 discriminator 1 160 00a6 082B cmp r3, #8 161 00a8 33D0 beq .L77 ARM GAS /tmp/ccxtFLUq.s page 9 162 .L17: 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI State */ 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) 163 .loc 1 309 0 164 00aa E368 ldr r3, [r4, #12] 165 00ac 002B cmp r3, #0 166 00ae 68D0 beq .L19 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 167 .loc 1 312 0 168 00b0 0122 movs r2, #1 169 00b2 814B ldr r3, .L87+4 170 00b4 1A60 str r2, [r3] 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 171 .loc 1 315 0 172 00b6 FFF7FEFF bl HAL_GetTick 173 .LVL6: 174 00ba 0546 mov r5, r0 175 .LVL7: 176 .L20: 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 177 .loc 1 318 0 178 00bc 7D4B ldr r3, .L87 179 00be 1B68 ldr r3, [r3] 180 00c0 13F0020F tst r3, #2 181 00c4 54D1 bne .L78 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 182 .loc 1 320 0 183 00c6 FFF7FEFF bl HAL_GetTick 184 .LVL8: 185 00ca 401B subs r0, r0, r5 186 00cc 0228 cmp r0, #2 187 00ce F5D9 bls .L20 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 188 .loc 1 322 0 ARM GAS /tmp/ccxtFLUq.s page 10 189 00d0 0320 movs r0, #3 190 00d2 58E1 b .L3 191 .LVL9: 192 .L74: 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 193 .loc 1 250 0 discriminator 1 194 00d4 774A ldr r2, .L87 195 00d6 1368 ldr r3, [r2] 196 00d8 43F48033 orr r3, r3, #65536 197 00dc 1360 str r3, [r2] 198 00de B5E7 b .L8 199 .L75: 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 200 .loc 1 250 0 is_stmt 0 discriminator 3 201 00e0 744B ldr r3, .L87 202 00e2 1A68 ldr r2, [r3] 203 00e4 42F48022 orr r2, r2, #262144 204 00e8 1A60 str r2, [r3] 205 00ea 1A68 ldr r2, [r3] 206 00ec 42F48032 orr r2, r2, #65536 207 00f0 1A60 str r2, [r3] 208 00f2 ABE7 b .L8 209 .L10: 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 210 .loc 1 270 0 is_stmt 1 211 00f4 FFF7FEFF bl HAL_GetTick 212 .LVL10: 213 00f8 0546 mov r5, r0 214 .LVL11: 215 .L13: 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 216 .loc 1 273 0 217 00fa 6E4B ldr r3, .L87 218 00fc 1B68 ldr r3, [r3] 219 00fe 13F4003F tst r3, #131072 220 0102 C3D0 beq .L4 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 221 .loc 1 275 0 222 0104 FFF7FEFF bl HAL_GetTick 223 .LVL12: 224 0108 401B subs r0, r0, r5 225 010a 6428 cmp r0, #100 226 010c F5D9 bls .L13 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 227 .loc 1 277 0 228 010e 0320 movs r0, #3 229 0110 39E1 b .L3 230 .LVL13: 231 .L77: 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 232 .loc 1 292 0 233 0112 684B ldr r3, .L87 234 0114 5B68 ldr r3, [r3, #4] 235 0116 13F4800F tst r3, #4194304 236 011a C6D1 bne .L17 237 .L16: 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccxtFLUq.s page 11 238 .loc 1 295 0 239 011c 654B ldr r3, .L87 240 011e 1B68 ldr r3, [r3] 241 0120 13F0020F tst r3, #2 242 0124 04D0 beq .L18 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 243 .loc 1 295 0 is_stmt 0 discriminator 1 244 0126 E368 ldr r3, [r4, #12] 245 0128 012B cmp r3, #1 246 012a 01D0 beq .L18 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 247 .loc 1 297 0 is_stmt 1 248 012c 0120 movs r0, #1 249 012e 2AE1 b .L3 250 .L18: 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 251 .loc 1 303 0 252 0130 604A ldr r2, .L87 253 0132 1368 ldr r3, [r2] 254 0134 23F0F803 bic r3, r3, #248 255 0138 2169 ldr r1, [r4, #16] 256 013a 43EAC103 orr r3, r3, r1, lsl #3 257 013e 1360 str r3, [r2] 258 .L15: 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 259 .loc 1 349 0 260 0140 2368 ldr r3, [r4] 261 0142 13F0080F tst r3, #8 262 0146 40D0 beq .L24 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ ARM GAS /tmp/ccxtFLUq.s page 12 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSI State */ 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) 263 .loc 1 355 0 264 0148 6369 ldr r3, [r4, #20] 265 014a 63B3 cbz r3, .L25 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 266 .loc 1 358 0 267 014c 0122 movs r2, #1 268 014e 5B4B ldr r3, .L87+8 269 0150 1A60 str r2, [r3] 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 270 .loc 1 361 0 271 0152 FFF7FEFF bl HAL_GetTick 272 .LVL14: 273 0156 0546 mov r5, r0 274 .LVL15: 275 .L26: 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 276 .loc 1 364 0 277 0158 564B ldr r3, .L87 278 015a 5B6F ldr r3, [r3, #116] 279 015c 13F0020F tst r3, #2 280 0160 33D1 bne .L24 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 281 .loc 1 366 0 282 0162 FFF7FEFF bl HAL_GetTick 283 .LVL16: 284 0166 401B subs r0, r0, r5 285 0168 0228 cmp r0, #2 286 016a F5D9 bls .L26 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 287 .loc 1 368 0 288 016c 0320 movs r0, #3 289 016e 0AE1 b .L3 290 .L78: 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 291 .loc 1 327 0 292 0170 504A ldr r2, .L87 293 0172 1368 ldr r3, [r2] 294 0174 23F0F803 bic r3, r3, #248 295 0178 2169 ldr r1, [r4, #16] 296 017a 43EAC103 orr r3, r3, r1, lsl #3 297 017e 1360 str r3, [r2] 298 0180 DEE7 b .L15 299 .LVL17: 300 .L19: 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccxtFLUq.s page 13 301 .loc 1 332 0 302 0182 0022 movs r2, #0 303 0184 4C4B ldr r3, .L87+4 304 0186 1A60 str r2, [r3] 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 305 .loc 1 335 0 306 0188 FFF7FEFF bl HAL_GetTick 307 .LVL18: 308 018c 0546 mov r5, r0 309 .LVL19: 310 .L22: 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 311 .loc 1 338 0 312 018e 494B ldr r3, .L87 313 0190 1B68 ldr r3, [r3] 314 0192 13F0020F tst r3, #2 315 0196 D3D0 beq .L15 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 316 .loc 1 340 0 317 0198 FFF7FEFF bl HAL_GetTick 318 .LVL20: 319 019c 401B subs r0, r0, r5 320 019e 0228 cmp r0, #2 321 01a0 F5D9 bls .L22 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 322 .loc 1 342 0 323 01a2 0320 movs r0, #3 324 01a4 EFE0 b .L3 325 .LVL21: 326 .L25: 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 327 .loc 1 375 0 328 01a6 0022 movs r2, #0 329 01a8 444B ldr r3, .L87+8 330 01aa 1A60 str r2, [r3] 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 331 .loc 1 378 0 332 01ac FFF7FEFF bl HAL_GetTick 333 .LVL22: 334 01b0 0546 mov r5, r0 335 .LVL23: 336 .L28: 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 337 .loc 1 381 0 338 01b2 404B ldr r3, .L87 339 01b4 5B6F ldr r3, [r3, #116] 340 01b6 13F0020F tst r3, #2 ARM GAS /tmp/ccxtFLUq.s page 14 341 01ba 06D0 beq .L24 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 342 .loc 1 383 0 343 01bc FFF7FEFF bl HAL_GetTick 344 .LVL24: 345 01c0 401B subs r0, r0, r5 346 01c2 0228 cmp r0, #2 347 01c4 F5D9 bls .L28 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 348 .loc 1 385 0 349 01c6 0320 movs r0, #3 350 01c8 DDE0 b .L3 351 .LVL25: 352 .L24: 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 353 .loc 1 391 0 354 01ca 2368 ldr r3, [r4] 355 01cc 13F0040F tst r3, #4 356 01d0 79D0 beq .L30 357 .LVL26: 358 .LBB2: 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 359 .loc 1 400 0 360 01d2 384B ldr r3, .L87 361 01d4 1B6C ldr r3, [r3, #64] 362 01d6 13F0805F tst r3, #268435456 363 01da 33D1 bne .L60 364 .LBB3: 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 365 .loc 1 402 0 366 01dc 0023 movs r3, #0 367 01de 0193 str r3, [sp, #4] 368 01e0 344B ldr r3, .L87 369 01e2 1A6C ldr r2, [r3, #64] 370 01e4 42F08052 orr r2, r2, #268435456 371 01e8 1A64 str r2, [r3, #64] 372 01ea 1B6C ldr r3, [r3, #64] 373 01ec 03F08053 and r3, r3, #268435456 374 01f0 0193 str r3, [sp, #4] 375 01f2 019B ldr r3, [sp, #4] 376 .LVL27: ARM GAS /tmp/ccxtFLUq.s page 15 377 .LBE3: 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pwrclkchanged = SET; 378 .loc 1 403 0 379 01f4 0125 movs r5, #1 380 .LVL28: 381 .L31: 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 382 .loc 1 406 0 383 01f6 324B ldr r3, .L87+12 384 01f8 1B68 ldr r3, [r3] 385 01fa 13F4807F tst r3, #256 386 01fe 23D0 beq .L79 387 .L32: 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable write access to Backup domain */ 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 388 .loc 1 424 0 389 0200 A368 ldr r3, [r4, #8] 390 0202 012B cmp r3, #1 391 0204 34D0 beq .L80 392 .loc 1 424 0 is_stmt 0 discriminator 2 393 0206 052B cmp r3, #5 394 0208 38D0 beq .L81 395 .loc 1 424 0 discriminator 4 396 020a 2A4B ldr r3, .L87 397 020c 1A6F ldr r2, [r3, #112] 398 020e 22F00102 bic r2, r2, #1 399 0212 1A67 str r2, [r3, #112] 400 0214 1A6F ldr r2, [r3, #112] 401 0216 22F00402 bic r2, r2, #4 402 021a 1A67 str r2, [r3, #112] 403 .L36: 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 404 .loc 1 426 0 is_stmt 1 405 021c A368 ldr r3, [r4, #8] 406 021e 002B cmp r3, #0 407 0220 36D0 beq .L38 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ ARM GAS /tmp/ccxtFLUq.s page 16 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 408 .loc 1 429 0 409 0222 FFF7FEFF bl HAL_GetTick 410 .LVL29: 411 0226 0646 mov r6, r0 412 .LVL30: 413 .L39: 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 414 .loc 1 432 0 415 0228 224B ldr r3, .L87 416 022a 1B6F ldr r3, [r3, #112] 417 022c 13F0020F tst r3, #2 418 0230 48D1 bne .L41 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 419 .loc 1 434 0 420 0232 FFF7FEFF bl HAL_GetTick 421 .LVL31: 422 0236 801B subs r0, r0, r6 423 0238 41F28833 movw r3, #5000 424 023c 9842 cmp r0, r3 425 023e F3D9 bls .L39 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 426 .loc 1 436 0 427 0240 0320 movs r0, #3 428 0242 A0E0 b .L3 429 .LVL32: 430 .L60: 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 431 .loc 1 393 0 432 0244 0025 movs r5, #0 433 0246 D6E7 b .L31 434 .LVL33: 435 .L79: 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 436 .loc 1 409 0 437 0248 1D4A ldr r2, .L87+12 438 024a 1368 ldr r3, [r2] 439 024c 43F48073 orr r3, r3, #256 440 0250 1360 str r3, [r2] 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 441 .loc 1 412 0 442 0252 FFF7FEFF bl HAL_GetTick 443 .LVL34: 444 0256 0646 mov r6, r0 445 .LVL35: 446 .L33: 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 447 .loc 1 414 0 448 0258 194B ldr r3, .L87+12 449 025a 1B68 ldr r3, [r3] 450 025c 13F4807F tst r3, #256 451 0260 CED1 bne .L32 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccxtFLUq.s page 17 452 .loc 1 416 0 453 0262 FFF7FEFF bl HAL_GetTick 454 .LVL36: 455 0266 801B subs r0, r0, r6 456 0268 0228 cmp r0, #2 457 026a F5D9 bls .L33 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 458 .loc 1 418 0 459 026c 0320 movs r0, #3 460 026e 8AE0 b .L3 461 .LVL37: 462 .L80: 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 463 .loc 1 424 0 discriminator 1 464 0270 104A ldr r2, .L87 465 0272 136F ldr r3, [r2, #112] 466 0274 43F00103 orr r3, r3, #1 467 0278 1367 str r3, [r2, #112] 468 027a CFE7 b .L36 469 .L81: 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 470 .loc 1 424 0 is_stmt 0 discriminator 3 471 027c 0D4B ldr r3, .L87 472 027e 1A6F ldr r2, [r3, #112] 473 0280 42F00402 orr r2, r2, #4 474 0284 1A67 str r2, [r3, #112] 475 0286 1A6F ldr r2, [r3, #112] 476 0288 42F00102 orr r2, r2, #1 477 028c 1A67 str r2, [r3, #112] 478 028e C5E7 b .L36 479 .L38: 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 480 .loc 1 443 0 is_stmt 1 481 0290 FFF7FEFF bl HAL_GetTick 482 .LVL38: 483 0294 0646 mov r6, r0 484 .LVL39: 485 .L42: 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 486 .loc 1 446 0 487 0296 074B ldr r3, .L87 488 0298 1B6F ldr r3, [r3, #112] 489 029a 13F0020F tst r3, #2 490 029e 11D0 beq .L41 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 491 .loc 1 448 0 492 02a0 FFF7FEFF bl HAL_GetTick 493 .LVL40: ARM GAS /tmp/ccxtFLUq.s page 18 494 02a4 801B subs r0, r0, r6 495 02a6 41F28833 movw r3, #5000 496 02aa 9842 cmp r0, r3 497 02ac F3D9 bls .L42 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 498 .loc 1 450 0 499 02ae 0320 movs r0, #3 500 02b0 69E0 b .L3 501 .L88: 502 02b2 00BF .align 2 503 .L87: 504 02b4 00380240 .word 1073887232 505 02b8 00004742 .word 1111949312 506 02bc 800E4742 .word 1111953024 507 02c0 00700040 .word 1073770496 508 .L41: 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Restore clock configuration if changed */ 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(pwrclkchanged == SET) 509 .loc 1 456 0 510 02c4 E5B9 cbnz r5, .L82 511 .LVL41: 512 .L30: 513 .LBE2: 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 514 .loc 1 464 0 515 02c6 A369 ldr r3, [r4, #24] 516 02c8 002B cmp r3, #0 517 02ca 5BD0 beq .L64 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 518 .loc 1 467 0 519 02cc 304A ldr r2, .L89 520 02ce 9268 ldr r2, [r2, #8] 521 02d0 02F00C02 and r2, r2, #12 522 02d4 082A cmp r2, #8 523 02d6 58D0 beq .L65 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 524 .loc 1 469 0 525 02d8 022B cmp r3, #2 526 02da 17D0 beq .L83 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); ARM GAS /tmp/ccxtFLUq.s page 19 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */ 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the main PLL. */ 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 527 .loc 1 517 0 528 02dc 0022 movs r2, #0 529 02de 2D4B ldr r3, .L89+4 530 02e0 1A60 str r2, [r3] 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 531 .loc 1 520 0 532 02e2 FFF7FEFF bl HAL_GetTick 533 .LVL42: 534 02e6 0446 mov r4, r0 535 .LVL43: ARM GAS /tmp/ccxtFLUq.s page 20 536 .L49: 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 537 .loc 1 523 0 538 02e8 294B ldr r3, .L89 539 02ea 1B68 ldr r3, [r3] 540 02ec 13F0007F tst r3, #33554432 541 02f0 42D0 beq .L84 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 542 .loc 1 525 0 543 02f2 FFF7FEFF bl HAL_GetTick 544 .LVL44: 545 02f6 001B subs r0, r0, r4 546 02f8 0228 cmp r0, #2 547 02fa F5D9 bls .L49 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 548 .loc 1 527 0 549 02fc 0320 movs r0, #3 550 02fe 42E0 b .L3 551 .LVL45: 552 .L82: 553 .LBB4: 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 554 .loc 1 458 0 555 0300 234A ldr r2, .L89 556 0302 136C ldr r3, [r2, #64] 557 0304 23F08053 bic r3, r3, #268435456 558 0308 1364 str r3, [r2, #64] 559 030a DCE7 b .L30 560 .LVL46: 561 .L83: 562 .LBE4: 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 563 .loc 1 479 0 564 030c 0022 movs r2, #0 565 030e 214B ldr r3, .L89+4 566 0310 1A60 str r2, [r3] 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 567 .loc 1 482 0 568 0312 FFF7FEFF bl HAL_GetTick 569 .LVL47: 570 0316 0546 mov r5, r0 571 .LVL48: 572 .L45: 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 573 .loc 1 485 0 574 0318 1D4B ldr r3, .L89 575 031a 1B68 ldr r3, [r3] 576 031c 13F0007F tst r3, #33554432 577 0320 06D0 beq .L85 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 578 .loc 1 487 0 579 0322 FFF7FEFF bl HAL_GetTick 580 .LVL49: ARM GAS /tmp/ccxtFLUq.s page 21 581 0326 401B subs r0, r0, r5 582 0328 0228 cmp r0, #2 583 032a F5D9 bls .L45 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 584 .loc 1 489 0 585 032c 0320 movs r0, #3 586 032e 2AE0 b .L3 587 .L85: 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 588 .loc 1 494 0 589 0330 E369 ldr r3, [r4, #28] 590 0332 226A ldr r2, [r4, #32] 591 0334 1343 orrs r3, r3, r2 592 0336 626A ldr r2, [r4, #36] 593 0338 43EA8213 orr r3, r3, r2, lsl #6 594 033c A26A ldr r2, [r4, #40] 595 033e 5208 lsrs r2, r2, #1 596 0340 013A subs r2, r2, #1 597 0342 43EA0243 orr r3, r3, r2, lsl #16 598 0346 E26A ldr r2, [r4, #44] 599 0348 43EA0263 orr r3, r3, r2, lsl #24 600 034c 104A ldr r2, .L89 601 034e 5360 str r3, [r2, #4] 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 602 .loc 1 500 0 603 0350 0122 movs r2, #1 604 0352 104B ldr r3, .L89+4 605 0354 1A60 str r2, [r3] 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 606 .loc 1 503 0 607 0356 FFF7FEFF bl HAL_GetTick 608 .LVL50: 609 035a 0446 mov r4, r0 610 .LVL51: 611 .L47: 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 612 .loc 1 506 0 613 035c 0C4B ldr r3, .L89 614 035e 1B68 ldr r3, [r3] 615 0360 13F0007F tst r3, #33554432 616 0364 06D1 bne .L86 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 617 .loc 1 508 0 618 0366 FFF7FEFF bl HAL_GetTick 619 .LVL52: 620 036a 001B subs r0, r0, r4 621 036c 0228 cmp r0, #2 622 036e F5D9 bls .L47 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 623 .loc 1 510 0 624 0370 0320 movs r0, #3 625 0372 08E0 b .L3 626 .L86: 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } ARM GAS /tmp/ccxtFLUq.s page 22 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 627 .loc 1 537 0 628 0374 0020 movs r0, #0 629 0376 06E0 b .L3 630 .L84: 631 0378 0020 movs r0, #0 632 037a 04E0 b .L3 633 .LVL53: 634 .L51: 635 .LCFI2: 636 .cfi_def_cfa_offset 0 637 .cfi_restore 4 638 .cfi_restore 5 639 .cfi_restore 6 640 .cfi_restore 14 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 641 .loc 1 228 0 642 037c 0120 movs r0, #1 643 .LVL54: 644 037e 7047 bx lr 645 .LVL55: 646 .L76: 647 .LCFI3: 648 .cfi_def_cfa_offset 24 649 .cfi_offset 4, -16 650 .cfi_offset 5, -12 651 .cfi_offset 6, -8 652 .cfi_offset 14, -4 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 653 .loc 1 244 0 654 0380 0120 movs r0, #1 655 .LVL56: 656 0382 00E0 b .L3 657 .L64: 658 .loc 1 537 0 659 0384 0020 movs r0, #0 660 .LVL57: 661 .L3: 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 662 .loc 1 538 0 663 0386 02B0 add sp, sp, #8 664 .LCFI4: 665 .cfi_remember_state 666 .cfi_def_cfa_offset 16 667 @ sp needed 668 0388 70BD pop {r4, r5, r6, pc} 669 .LVL58: 670 .L65: 671 .LCFI5: 672 .cfi_restore_state 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 673 .loc 1 534 0 ARM GAS /tmp/ccxtFLUq.s page 23 674 038a 0120 movs r0, #1 675 038c FBE7 b .L3 676 .L90: 677 038e 00BF .align 2 678 .L89: 679 0390 00380240 .word 1073887232 680 0394 60004742 .word 1111949408 681 .cfi_endproc 682 .LFE131: 684 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 685 .align 1 686 .global HAL_RCC_MCOConfig 687 .syntax unified 688 .thumb 689 .thumb_func 690 .fpu fpv4-sp-d16 692 HAL_RCC_MCOConfig: 693 .LFB133: 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB busses clocks according to the specified 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param FLatency FLASH Latency, this parameter depend on device selected 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * startup from Reset, wake-up from STOP and STANDBY mode, or in case 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked). 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * occur when the clock source will be ready. 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions") 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); ARM GAS /tmp/ccxtFLUq.s page 24 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */ 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) 585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the highest APBx dividers in order to ensure that we do not go through 601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); 620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE ready flag */ 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the PLL ready flag */ ARM GAS /tmp/ccxtFLUq.s page 25 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */ 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) 666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccxtFLUq.s page 26 692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings */ 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY); 697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC clocks control functions 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Peripheral Control functions ##### 711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequencies. 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9). 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note PA8/PC9 should be configured in alternate function mode. 723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8). 726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9). 727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source 730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source 731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source 732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source 733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source 734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a 735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for 736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source 737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source 738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler. 739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_1: no division applied to MCOx clock 741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock 742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock 743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock 744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock 745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have 746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5). 747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ ARM GAS /tmp/ccxtFLUq.s page 27 749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 694 .loc 1 750 0 695 .cfi_startproc 696 @ args = 0, pretend = 0, frame = 32 697 @ frame_needed = 0, uses_anonymous_args = 0 698 .LVL59: 699 0000 70B5 push {r4, r5, r6, lr} 700 .LCFI6: 701 .cfi_def_cfa_offset 16 702 .cfi_offset 4, -16 703 .cfi_offset 5, -12 704 .cfi_offset 6, -8 705 .cfi_offset 14, -4 706 0002 88B0 sub sp, sp, #32 707 .LCFI7: 708 .cfi_def_cfa_offset 48 709 0004 0C46 mov r4, r1 710 0006 1646 mov r6, r2 751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC_MCO1 */ 756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(RCC_MCOx == RCC_MCO1) 711 .loc 1 756 0 712 0008 08B3 cbz r0, .L95 713 .LBB5: 757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO1 Clock Enable */ 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO1_CLK_ENABLE(); 762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN; 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */ 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv)); 773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO1 enable feature is available only on STM32F410xx devices */ 775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN) 776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO1_ENABLE(); 777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */ 778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2) 780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource)); 783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO2 Clock Enable */ 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO2_CLK_ENABLE(); ARM GAS /tmp/ccxtFLUq.s page 28 714 .loc 1 785 0 715 000a 0023 movs r3, #0 716 000c 0293 str r3, [sp, #8] 717 000e 204D ldr r5, .L96 718 0010 2A6B ldr r2, [r5, #48] 719 .LVL60: 720 0012 42F00402 orr r2, r2, #4 721 0016 2A63 str r2, [r5, #48] 722 0018 2A6B ldr r2, [r5, #48] 723 001a 02F00402 and r2, r2, #4 724 001e 0292 str r2, [sp, #8] 725 0020 029A ldr r2, [sp, #8] 726 .LBE5: 786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO2 pin in alternate function mode */ 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN; 727 .loc 1 788 0 728 0022 4FF40072 mov r2, #512 729 0026 0392 str r2, [sp, #12] 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 730 .loc 1 789 0 731 0028 0222 movs r2, #2 732 002a 0492 str r2, [sp, #16] 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 733 .loc 1 790 0 734 002c 0322 movs r2, #3 735 002e 0692 str r2, [sp, #24] 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 736 .loc 1 791 0 737 0030 0593 str r3, [sp, #20] 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 738 .loc 1 792 0 739 0032 0793 str r3, [sp, #28] 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 740 .loc 1 793 0 741 0034 03A9 add r1, sp, #12 742 .LVL61: 743 0036 1748 ldr r0, .L96+4 744 .LVL62: 745 0038 FFF7FEFF bl HAL_GPIO_Init 746 .LVL63: 794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */ 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U))) 747 .loc 1 796 0 748 003c AB68 ldr r3, [r5, #8] 749 003e 23F07843 bic r3, r3, #-134217728 750 0042 44EAC604 orr r4, r4, r6, lsl #3 751 .LVL64: 752 0046 1C43 orrs r4, r4, r3 753 0048 AC60 str r4, [r5, #8] 754 .L91: 797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */ 799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN) 800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO2_ENABLE(); 801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */ ARM GAS /tmp/ccxtFLUq.s page 29 802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */ 804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 755 .loc 1 804 0 756 004a 08B0 add sp, sp, #32 757 .LCFI8: 758 .cfi_remember_state 759 .cfi_def_cfa_offset 16 760 @ sp needed 761 004c 70BD pop {r4, r5, r6, pc} 762 .LVL65: 763 .L95: 764 .LCFI9: 765 .cfi_restore_state 766 .LBB6: 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 767 .loc 1 761 0 768 004e 0023 movs r3, #0 769 0050 0193 str r3, [sp, #4] 770 0052 0F4D ldr r5, .L96 771 0054 2A6B ldr r2, [r5, #48] 772 .LVL66: 773 0056 42F00102 orr r2, r2, #1 774 005a 2A63 str r2, [r5, #48] 775 005c 2A6B ldr r2, [r5, #48] 776 005e 02F00102 and r2, r2, #1 777 0062 0192 str r2, [sp, #4] 778 0064 019A ldr r2, [sp, #4] 779 .LBE6: 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 780 .loc 1 764 0 781 0066 4FF48072 mov r2, #256 782 006a 0392 str r2, [sp, #12] 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 783 .loc 1 765 0 784 006c 0222 movs r2, #2 785 006e 0492 str r2, [sp, #16] 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 786 .loc 1 766 0 787 0070 0322 movs r2, #3 788 0072 0692 str r2, [sp, #24] 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 789 .loc 1 767 0 790 0074 0593 str r3, [sp, #20] 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 791 .loc 1 768 0 792 0076 0793 str r3, [sp, #28] 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 793 .loc 1 769 0 794 0078 03A9 add r1, sp, #12 795 .LVL67: 796 007a 0748 ldr r0, .L96+8 797 .LVL68: 798 007c FFF7FEFF bl HAL_GPIO_Init 799 .LVL69: 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 800 .loc 1 772 0 ARM GAS /tmp/ccxtFLUq.s page 30 801 0080 AB68 ldr r3, [r5, #8] 802 0082 23F0EC63 bic r3, r3, #123731968 803 0086 3443 orrs r4, r4, r6 804 .LVL70: 805 0088 1C43 orrs r4, r4, r3 806 008a AC60 str r4, [r5, #8] 807 008c DDE7 b .L91 808 .L97: 809 008e 00BF .align 2 810 .L96: 811 0090 00380240 .word 1073887232 812 0094 00080240 .word 1073874944 813 0098 00000240 .word 1073872896 814 .cfi_endproc 815 .LFE133: 817 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 818 .align 1 819 .global HAL_RCC_EnableCSS 820 .syntax unified 821 .thumb 822 .thumb_func 823 .fpu fpv4-sp-d16 825 HAL_RCC_EnableCSS: 826 .LFB134: 805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Enables the Clock Security System. 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 827 .loc 1 816 0 828 .cfi_startproc 829 @ args = 0, pretend = 0, frame = 0 830 @ frame_needed = 0, uses_anonymous_args = 0 831 @ link register save eliminated. 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; 832 .loc 1 817 0 833 0000 0122 movs r2, #1 834 0002 014B ldr r3, .L99 835 0004 1A60 str r2, [r3] 836 0006 7047 bx lr 837 .L100: 838 .align 2 839 .L99: 840 0008 4C004742 .word 1111949388 841 .cfi_endproc 842 .LFE134: 844 .section .text.HAL_RCC_DisableCSS,"ax",%progbits 845 .align 1 846 .global HAL_RCC_DisableCSS 847 .syntax unified ARM GAS /tmp/ccxtFLUq.s page 31 848 .thumb 849 .thumb_func 850 .fpu fpv4-sp-d16 852 HAL_RCC_DisableCSS: 853 .LFB135: 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Disables the Clock Security System. 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) 825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 854 .loc 1 825 0 855 .cfi_startproc 856 @ args = 0, pretend = 0, frame = 0 857 @ frame_needed = 0, uses_anonymous_args = 0 858 @ link register save eliminated. 826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; 859 .loc 1 826 0 860 0000 0022 movs r2, #0 861 0002 014B ldr r3, .L102 862 0004 1A60 str r2, [r3] 863 0006 7047 bx lr 864 .L103: 865 .align 2 866 .L102: 867 0008 4C004742 .word 1111949388 868 .cfi_endproc 869 .LFE135: 871 .global __aeabi_uldivmod 872 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 873 .align 1 874 .weak HAL_RCC_GetSysClockFreq 875 .syntax unified 876 .thumb 877 .thumb_func 878 .fpu fpv4-sp-d16 880 HAL_RCC_GetSysClockFreq: 881 .LFB136: 827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency 831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * constant and the selected clock source: 835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) 837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**) 838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. 839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations 841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * in voltage and temperature. 842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 25 MHz), user has to ensure that HSE_VALUE is same as the real ARM GAS /tmp/ccxtFLUq.s page 32 844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may 845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * have wrong result. 846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * value for HSE crystal. 849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters. 852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency 858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void) 860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 882 .loc 1 860 0 883 .cfi_startproc 884 @ args = 0, pretend = 0, frame = 0 885 @ frame_needed = 0, uses_anonymous_args = 0 886 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 887 .LCFI10: 888 .cfi_def_cfa_offset 24 889 .cfi_offset 3, -24 890 .cfi_offset 4, -20 891 .cfi_offset 5, -16 892 .cfi_offset 6, -12 893 .cfi_offset 7, -8 894 .cfi_offset 14, -4 895 .LVL71: 861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; 862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; 863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** switch (RCC->CFGR & RCC_CFGR_SWS) 896 .loc 1 865 0 897 0002 254B ldr r3, .L112 898 0004 9B68 ldr r3, [r3, #8] 899 0006 03F00C03 and r3, r3, #12 900 000a 042B cmp r3, #4 901 000c 41D0 beq .L110 902 000e 082B cmp r3, #8 903 0010 01D0 beq .L107 866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ 868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 904 .loc 1 869 0 905 0012 2248 ldr r0, .L112+4 906 0014 F8BD pop {r3, r4, r5, r6, r7, pc} 907 .L107: 870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ 873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; ARM GAS /tmp/ccxtFLUq.s page 33 875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ 878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN 880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLP */ 881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 908 .loc 1 881 0 909 0016 204B ldr r3, .L112 910 0018 5A68 ldr r2, [r3, #4] 911 001a 02F03F02 and r2, r2, #63 912 .LVL72: 882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 913 .loc 1 882 0 914 001e 5B68 ldr r3, [r3, #4] 915 0020 13F4800F tst r3, #4194304 916 0024 12D0 beq .L108 883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE used as PLL clock source */ 885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN 917 .loc 1 885 0 918 0026 1C4B ldr r3, .L112 919 0028 5968 ldr r1, [r3, #4] 920 002a C1F38811 ubfx r1, r1, #6, #9 921 002e 0023 movs r3, #0 922 0030 1B48 ldr r0, .L112+8 923 0032 A1FB0001 umull r0, r1, r1, r0 924 0036 FFF7FEFF bl __aeabi_uldivmod 925 .LVL73: 926 .L109: 886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI used as PLL clock source */ 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN 891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); 927 .loc 1 892 0 928 003a 174B ldr r3, .L112 929 003c 5B68 ldr r3, [r3, #4] 930 003e C3F30143 ubfx r3, r3, #16, #2 931 0042 0133 adds r3, r3, #1 932 0044 5B00 lsls r3, r3, #1 933 .LVL74: 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = pllvco/pllp; 934 .loc 1 894 0 935 0046 B0FBF3F0 udiv r0, r0, r3 936 .LVL75: 895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 937 .loc 1 895 0 938 004a F8BD pop {r3, r4, r5, r6, r7, pc} 939 .LVL76: 940 .L108: 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 941 .loc 1 890 0 942 004c 124B ldr r3, .L112 ARM GAS /tmp/ccxtFLUq.s page 34 943 004e 5B68 ldr r3, [r3, #4] 944 0050 C3F38813 ubfx r3, r3, #6, #9 945 0054 1E46 mov r6, r3 946 0056 0027 movs r7, #0 947 0058 5C01 lsls r4, r3, #5 948 005a 0025 movs r5, #0 949 005c E41A subs r4, r4, r3 950 005e 65EB0705 sbc r5, r5, r7 951 0062 A901 lsls r1, r5, #6 952 0064 41EA9461 orr r1, r1, r4, lsr #26 953 0068 A001 lsls r0, r4, #6 954 006a 001B subs r0, r0, r4 955 006c 61EB0501 sbc r1, r1, r5 956 0070 CB00 lsls r3, r1, #3 957 0072 43EA5073 orr r3, r3, r0, lsr #29 958 0076 C400 lsls r4, r0, #3 959 0078 A019 adds r0, r4, r6 960 007a 43EB0701 adc r1, r3, r7 961 007e 8B02 lsls r3, r1, #10 962 0080 43EA9053 orr r3, r3, r0, lsr #22 963 0084 8402 lsls r4, r0, #10 964 0086 2046 mov r0, r4 965 0088 1946 mov r1, r3 966 008a 0023 movs r3, #0 967 008c FFF7FEFF bl __aeabi_uldivmod 968 .LVL77: 969 0090 D3E7 b .L109 970 .LVL78: 971 .L110: 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 972 .loc 1 874 0 973 0092 0348 ldr r0, .L112+8 974 .LVL79: 896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** default: 898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return sysclockfreq; 904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 975 .loc 1 904 0 976 0094 F8BD pop {r3, r4, r5, r6, r7, pc} 977 .L113: 978 0096 00BF .align 2 979 .L112: 980 0098 00380240 .word 1073887232 981 009c 0024F400 .word 16000000 982 00a0 40787D01 .word 25000000 983 .cfi_endproc 984 .LFE136: 986 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 987 .align 1 988 .global HAL_RCC_ClockConfig 989 .syntax unified 990 .thumb ARM GAS /tmp/ccxtFLUq.s page 35 991 .thumb_func 992 .fpu fpv4-sp-d16 994 HAL_RCC_ClockConfig: 995 .LFB132: 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 996 .loc 1 566 0 997 .cfi_startproc 998 @ args = 0, pretend = 0, frame = 0 999 @ frame_needed = 0, uses_anonymous_args = 0 1000 .LVL80: 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1001 .loc 1 570 0 1002 0000 0028 cmp r0, #0 1003 0002 00F09D80 beq .L129 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 1004 .loc 1 566 0 1005 0006 70B5 push {r4, r5, r6, lr} 1006 .LCFI11: 1007 .cfi_def_cfa_offset 16 1008 .cfi_offset 4, -16 1009 .cfi_offset 5, -12 1010 .cfi_offset 6, -8 1011 .cfi_offset 14, -4 1012 0008 0446 mov r4, r0 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1013 .loc 1 584 0 1014 000a 4F4B ldr r3, .L142 1015 000c 1B68 ldr r3, [r3] 1016 000e 03F00F03 and r3, r3, #15 1017 0012 8B42 cmp r3, r1 1018 0014 09D2 bcs .L116 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1019 .loc 1 587 0 1020 0016 CBB2 uxtb r3, r1 1021 0018 4B4A ldr r2, .L142 1022 001a 1370 strb r3, [r2] 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1023 .loc 1 591 0 1024 001c 1368 ldr r3, [r2] 1025 001e 03F00F03 and r3, r3, #15 1026 0022 9942 cmp r1, r3 1027 0024 01D0 beq .L116 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1028 .loc 1 593 0 1029 0026 0120 movs r0, #1 1030 .LVL81: 1031 0028 70BD pop {r4, r5, r6, pc} 1032 .LVL82: 1033 .L116: 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1034 .loc 1 598 0 1035 002a 2368 ldr r3, [r4] 1036 002c 13F0020F tst r3, #2 1037 0030 17D0 beq .L117 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1038 .loc 1 602 0 1039 0032 13F0040F tst r3, #4 ARM GAS /tmp/ccxtFLUq.s page 36 1040 0036 04D0 beq .L118 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1041 .loc 1 604 0 1042 0038 444A ldr r2, .L142+4 1043 003a 9368 ldr r3, [r2, #8] 1044 003c 43F4E053 orr r3, r3, #7168 1045 0040 9360 str r3, [r2, #8] 1046 .L118: 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1047 .loc 1 607 0 1048 0042 2368 ldr r3, [r4] 1049 0044 13F0080F tst r3, #8 1050 0048 04D0 beq .L119 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1051 .loc 1 609 0 1052 004a 404A ldr r2, .L142+4 1053 004c 9368 ldr r3, [r2, #8] 1054 004e 43F46043 orr r3, r3, #57344 1055 0052 9360 str r3, [r2, #8] 1056 .L119: 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1057 .loc 1 613 0 1058 0054 3D4A ldr r2, .L142+4 1059 0056 9368 ldr r3, [r2, #8] 1060 0058 23F0F003 bic r3, r3, #240 1061 005c A068 ldr r0, [r4, #8] 1062 .LVL83: 1063 005e 0343 orrs r3, r3, r0 1064 0060 9360 str r3, [r2, #8] 1065 .L117: 1066 0062 0D46 mov r5, r1 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1067 .loc 1 617 0 1068 0064 2368 ldr r3, [r4] 1069 0066 13F0010F tst r3, #1 1070 006a 32D0 beq .L120 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1071 .loc 1 622 0 1072 006c 6368 ldr r3, [r4, #4] 1073 006e 012B cmp r3, #1 1074 0070 21D0 beq .L140 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1075 .loc 1 631 0 1076 0072 9A1E subs r2, r3, #2 1077 0074 012A cmp r2, #1 1078 0076 25D9 bls .L141 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1079 .loc 1 644 0 1080 0078 344A ldr r2, .L142+4 1081 007a 1268 ldr r2, [r2] 1082 007c 12F0020F tst r2, #2 1083 0080 60D0 beq .L133 1084 .L122: 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1085 .loc 1 650 0 1086 0082 3249 ldr r1, .L142+4 1087 .LVL84: ARM GAS /tmp/ccxtFLUq.s page 37 1088 0084 8A68 ldr r2, [r1, #8] 1089 0086 22F00302 bic r2, r2, #3 1090 008a 1343 orrs r3, r3, r2 1091 008c 8B60 str r3, [r1, #8] 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1092 .loc 1 653 0 1093 008e FFF7FEFF bl HAL_GetTick 1094 .LVL85: 1095 0092 0646 mov r6, r0 1096 .LVL86: 1097 .L124: 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1098 .loc 1 655 0 1099 0094 2D4B ldr r3, .L142+4 1100 0096 9B68 ldr r3, [r3, #8] 1101 0098 03F00C03 and r3, r3, #12 1102 009c 6268 ldr r2, [r4, #4] 1103 009e B3EB820F cmp r3, r2, lsl #2 1104 00a2 16D0 beq .L120 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1105 .loc 1 657 0 1106 00a4 FFF7FEFF bl HAL_GetTick 1107 .LVL87: 1108 00a8 801B subs r0, r0, r6 1109 00aa 41F28833 movw r3, #5000 1110 00ae 9842 cmp r0, r3 1111 00b0 F0D9 bls .L124 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1112 .loc 1 659 0 1113 00b2 0320 movs r0, #3 1114 00b4 70BD pop {r4, r5, r6, pc} 1115 .LVL88: 1116 .L140: 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1117 .loc 1 625 0 1118 00b6 254A ldr r2, .L142+4 1119 00b8 1268 ldr r2, [r2] 1120 00ba 12F4003F tst r2, #131072 1121 00be E0D1 bne .L122 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1122 .loc 1 627 0 1123 00c0 0120 movs r0, #1 1124 00c2 70BD pop {r4, r5, r6, pc} 1125 .LVL89: 1126 .L141: 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1127 .loc 1 635 0 1128 00c4 214A ldr r2, .L142+4 1129 00c6 1268 ldr r2, [r2] 1130 00c8 12F0007F tst r2, #33554432 1131 00cc D9D1 bne .L122 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1132 .loc 1 637 0 1133 00ce 0120 movs r0, #1 1134 00d0 70BD pop {r4, r5, r6, pc} 1135 .LVL90: 1136 .L120: ARM GAS /tmp/ccxtFLUq.s page 38 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1137 .loc 1 665 0 1138 00d2 1D4B ldr r3, .L142 1139 00d4 1B68 ldr r3, [r3] 1140 00d6 03F00F03 and r3, r3, #15 1141 00da 9D42 cmp r5, r3 1142 00dc 09D2 bcs .L126 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1143 .loc 1 668 0 1144 00de EAB2 uxtb r2, r5 1145 00e0 194B ldr r3, .L142 1146 00e2 1A70 strb r2, [r3] 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1147 .loc 1 672 0 1148 00e4 1B68 ldr r3, [r3] 1149 00e6 03F00F03 and r3, r3, #15 1150 00ea 9D42 cmp r5, r3 1151 00ec 01D0 beq .L126 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1152 .loc 1 674 0 1153 00ee 0120 movs r0, #1 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1154 .loc 1 699 0 1155 00f0 70BD pop {r4, r5, r6, pc} 1156 .LVL91: 1157 .L126: 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1158 .loc 1 679 0 1159 00f2 2368 ldr r3, [r4] 1160 00f4 13F0040F tst r3, #4 1161 00f8 06D0 beq .L127 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1162 .loc 1 682 0 1163 00fa 144A ldr r2, .L142+4 1164 00fc 9368 ldr r3, [r2, #8] 1165 00fe 23F4E053 bic r3, r3, #7168 1166 0102 E168 ldr r1, [r4, #12] 1167 0104 0B43 orrs r3, r3, r1 1168 0106 9360 str r3, [r2, #8] 1169 .L127: 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1170 .loc 1 686 0 1171 0108 2368 ldr r3, [r4] 1172 010a 13F0080F tst r3, #8 1173 010e 07D0 beq .L128 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1174 .loc 1 689 0 1175 0110 0E4A ldr r2, .L142+4 1176 0112 9368 ldr r3, [r2, #8] 1177 0114 23F46043 bic r3, r3, #57344 1178 0118 2169 ldr r1, [r4, #16] 1179 011a 43EAC103 orr r3, r3, r1, lsl #3 1180 011e 9360 str r3, [r2, #8] 1181 .L128: 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1182 .loc 1 693 0 1183 0120 FFF7FEFF bl HAL_RCC_GetSysClockFreq ARM GAS /tmp/ccxtFLUq.s page 39 1184 .LVL92: 1185 0124 094B ldr r3, .L142+4 1186 0126 9B68 ldr r3, [r3, #8] 1187 0128 C3F30313 ubfx r3, r3, #4, #4 1188 012c 084A ldr r2, .L142+8 1189 012e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 1190 0130 D840 lsrs r0, r0, r3 1191 0132 084B ldr r3, .L142+12 1192 0134 1860 str r0, [r3] 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1193 .loc 1 696 0 1194 0136 0020 movs r0, #0 1195 0138 FFF7FEFF bl HAL_InitTick 1196 .LVL93: 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1197 .loc 1 698 0 1198 013c 0020 movs r0, #0 1199 013e 70BD pop {r4, r5, r6, pc} 1200 .LVL94: 1201 .L129: 1202 .LCFI12: 1203 .cfi_def_cfa_offset 0 1204 .cfi_restore 4 1205 .cfi_restore 5 1206 .cfi_restore 6 1207 .cfi_restore 14 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1208 .loc 1 572 0 1209 0140 0120 movs r0, #1 1210 .LVL95: 1211 0142 7047 bx lr 1212 .LVL96: 1213 .L133: 1214 .LCFI13: 1215 .cfi_def_cfa_offset 16 1216 .cfi_offset 4, -16 1217 .cfi_offset 5, -12 1218 .cfi_offset 6, -8 1219 .cfi_offset 14, -4 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1220 .loc 1 646 0 1221 0144 0120 movs r0, #1 1222 0146 70BD pop {r4, r5, r6, pc} 1223 .LVL97: 1224 .L143: 1225 .align 2 1226 .L142: 1227 0148 003C0240 .word 1073888256 1228 014c 00380240 .word 1073887232 1229 0150 00000000 .word AHBPrescTable 1230 0154 00000000 .word SystemCoreClock 1231 .cfi_endproc 1232 .LFE132: 1234 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 1235 .align 1 1236 .global HAL_RCC_GetHCLKFreq 1237 .syntax unified ARM GAS /tmp/ccxtFLUq.s page 40 1238 .thumb 1239 .thumb_func 1240 .fpu fpv4-sp-d16 1242 HAL_RCC_GetHCLKFreq: 1243 .LFB137: 905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the HCLK frequency 908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated within this function 913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HCLK frequency 914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1244 .loc 1 916 0 1245 .cfi_startproc 1246 @ args = 0, pretend = 0, frame = 0 1247 @ frame_needed = 0, uses_anonymous_args = 0 1248 @ link register save eliminated. 917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock; 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1249 .loc 1 918 0 1250 0000 014B ldr r3, .L145 1251 0002 1868 ldr r0, [r3] 1252 0004 7047 bx lr 1253 .L146: 1254 0006 00BF .align 2 1255 .L145: 1256 0008 00000000 .word SystemCoreClock 1257 .cfi_endproc 1258 .LFE137: 1260 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 1261 .align 1 1262 .global HAL_RCC_GetPCLK1Freq 1263 .syntax unified 1264 .thumb 1265 .thumb_func 1266 .fpu fpv4-sp-d16 1268 HAL_RCC_GetPCLK1Freq: 1269 .LFB138: 919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency 922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK1 frequency 925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) 927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1270 .loc 1 927 0 1271 .cfi_startproc 1272 @ args = 0, pretend = 0, frame = 0 1273 @ frame_needed = 0, uses_anonymous_args = 0 1274 0000 08B5 push {r3, lr} ARM GAS /tmp/ccxtFLUq.s page 41 1275 .LCFI14: 1276 .cfi_def_cfa_offset 8 1277 .cfi_offset 3, -8 1278 .cfi_offset 14, -4 928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos] 1279 .loc 1 929 0 1280 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1281 .LVL98: 1282 0006 044B ldr r3, .L149 1283 0008 9B68 ldr r3, [r3, #8] 1284 000a C3F38223 ubfx r3, r3, #10, #3 1285 000e 034A ldr r2, .L149+4 1286 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1287 .loc 1 930 0 1288 0012 D840 lsrs r0, r0, r3 1289 0014 08BD pop {r3, pc} 1290 .L150: 1291 0016 00BF .align 2 1292 .L149: 1293 0018 00380240 .word 1073887232 1294 001c 00000000 .word APBPrescTable 1295 .cfi_endproc 1296 .LFE138: 1298 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 1299 .align 1 1300 .global HAL_RCC_GetPCLK2Freq 1301 .syntax unified 1302 .thumb 1303 .thumb_func 1304 .fpu fpv4-sp-d16 1306 HAL_RCC_GetPCLK2Freq: 1307 .LFB139: 931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK2 frequency 937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1308 .loc 1 939 0 1309 .cfi_startproc 1310 @ args = 0, pretend = 0, frame = 0 1311 @ frame_needed = 0, uses_anonymous_args = 0 1312 0000 08B5 push {r3, lr} 1313 .LCFI15: 1314 .cfi_def_cfa_offset 8 1315 .cfi_offset 3, -8 1316 .cfi_offset 14, -4 940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]) 1317 .loc 1 941 0 1318 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1319 .LVL99: ARM GAS /tmp/ccxtFLUq.s page 42 1320 0006 044B ldr r3, .L153 1321 0008 9B68 ldr r3, [r3, #8] 1322 000a C3F34233 ubfx r3, r3, #13, #3 1323 000e 034A ldr r2, .L153+4 1324 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1325 .loc 1 942 0 1326 0012 D840 lsrs r0, r0, r3 1327 0014 08BD pop {r3, pc} 1328 .L154: 1329 0016 00BF .align 2 1330 .L153: 1331 0018 00380240 .word 1073887232 1332 001c 00000000 .word APBPrescTable 1333 .cfi_endproc 1334 .LFE139: 1336 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 1337 .align 1 1338 .weak HAL_RCC_GetOscConfig 1339 .syntax unified 1340 .thumb 1341 .thumb_func 1342 .fpu fpv4-sp-d16 1344 HAL_RCC_GetOscConfig: 1345 .LFB140: 943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal 946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1346 .loc 1 952 0 1347 .cfi_startproc 1348 @ args = 0, pretend = 0, frame = 0 1349 @ frame_needed = 0, uses_anonymous_args = 0 1350 @ link register save eliminated. 1351 .LVL100: 953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA 1352 .loc 1 954 0 1353 0000 0F23 movs r3, #15 1354 0002 0360 str r3, [r0] 955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 1355 .loc 1 957 0 1356 0004 304B ldr r3, .L169 1357 0006 1B68 ldr r3, [r3] 1358 0008 13F4802F tst r3, #262144 1359 000c 3CD0 beq .L156 958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 1360 .loc 1 959 0 ARM GAS /tmp/ccxtFLUq.s page 43 1361 000e 4FF4A023 mov r3, #327680 1362 0012 4360 str r3, [r0, #4] 1363 .L157: 960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) 962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; 968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) 1364 .loc 1 971 0 1365 0014 2C4B ldr r3, .L169 1366 0016 1B68 ldr r3, [r3] 1367 0018 13F0010F tst r3, #1 1368 001c 40D0 beq .L159 972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 1369 .loc 1 973 0 1370 001e 0123 movs r3, #1 1371 0020 C360 str r3, [r0, #12] 1372 .L160: 974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_P 1373 .loc 1 980 0 1374 0022 294A ldr r2, .L169 1375 0024 1368 ldr r3, [r2] 1376 0026 C3F3C403 ubfx r3, r3, #3, #5 1377 002a 0361 str r3, [r0, #16] 981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) 1378 .loc 1 983 0 1379 002c 136F ldr r3, [r2, #112] 1380 002e 13F0040F tst r3, #4 1381 0032 38D0 beq .L161 984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 1382 .loc 1 985 0 1383 0034 0523 movs r3, #5 1384 0036 8360 str r3, [r0, #8] 1385 .L162: 986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else ARM GAS /tmp/ccxtFLUq.s page 44 992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ 997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) 1386 .loc 1 997 0 1387 0038 234B ldr r3, .L169 1388 003a 5B6F ldr r3, [r3, #116] 1389 003c 13F0010F tst r3, #1 1390 0040 3CD0 beq .L164 998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; 1391 .loc 1 999 0 1392 0042 0123 movs r3, #1 1393 0044 4361 str r3, [r0, #20] 1394 .L165: 1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) 1395 .loc 1 1007 0 1396 0046 204B ldr r3, .L169 1397 0048 1B68 ldr r3, [r3] 1398 004a 13F0807F tst r3, #16777216 1399 004e 38D1 bne .L168 1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 1400 .loc 1 1013 0 1401 0050 0123 movs r3, #1 1402 0052 8361 str r3, [r0, #24] 1403 .L167: 1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); 1404 .loc 1 1015 0 1405 0054 1C4A ldr r2, .L169 1406 0056 5368 ldr r3, [r2, #4] 1407 0058 03F48003 and r3, r3, #4194304 1408 005c C361 str r3, [r0, #28] 1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM); 1409 .loc 1 1016 0 1410 005e 5368 ldr r3, [r2, #4] 1411 0060 03F03F03 and r3, r3, #63 1412 0064 0362 str r3, [r0, #32] 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po 1413 .loc 1 1017 0 1414 0066 5368 ldr r3, [r2, #4] 1415 0068 C3F38813 ubfx r3, r3, #6, #9 1416 006c 4362 str r3, [r0, #36] ARM GAS /tmp/ccxtFLUq.s page 45 1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0 1417 .loc 1 1018 0 1418 006e 5368 ldr r3, [r2, #4] 1419 0070 03F44033 and r3, r3, #196608 1420 0074 03F58033 add r3, r3, #65536 1421 0078 5B00 lsls r3, r3, #1 1422 007a 1B0C lsrs r3, r3, #16 1423 007c 8362 str r3, [r0, #40] 1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po 1424 .loc 1 1019 0 1425 007e 5368 ldr r3, [r2, #4] 1426 0080 C3F30363 ubfx r3, r3, #24, #4 1427 0084 C362 str r3, [r0, #44] 1428 0086 7047 bx lr 1429 .L156: 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1430 .loc 1 961 0 1431 0088 0F4B ldr r3, .L169 1432 008a 1B68 ldr r3, [r3] 1433 008c 13F4803F tst r3, #65536 1434 0090 03D0 beq .L158 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1435 .loc 1 963 0 1436 0092 4FF48033 mov r3, #65536 1437 0096 4360 str r3, [r0, #4] 1438 0098 BCE7 b .L157 1439 .L158: 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1440 .loc 1 967 0 1441 009a 0023 movs r3, #0 1442 009c 4360 str r3, [r0, #4] 1443 009e B9E7 b .L157 1444 .L159: 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1445 .loc 1 977 0 1446 00a0 0023 movs r3, #0 1447 00a2 C360 str r3, [r0, #12] 1448 00a4 BDE7 b .L160 1449 .L161: 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1450 .loc 1 987 0 1451 00a6 084B ldr r3, .L169 1452 00a8 1B6F ldr r3, [r3, #112] 1453 00aa 13F0010F tst r3, #1 1454 00ae 02D0 beq .L163 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1455 .loc 1 989 0 1456 00b0 0123 movs r3, #1 1457 00b2 8360 str r3, [r0, #8] 1458 00b4 C0E7 b .L162 1459 .L163: 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1460 .loc 1 993 0 1461 00b6 0023 movs r3, #0 1462 00b8 8360 str r3, [r0, #8] 1463 00ba BDE7 b .L162 1464 .L164: ARM GAS /tmp/ccxtFLUq.s page 46 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1465 .loc 1 1003 0 1466 00bc 0023 movs r3, #0 1467 00be 4361 str r3, [r0, #20] 1468 00c0 C1E7 b .L165 1469 .L168: 1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1470 .loc 1 1009 0 1471 00c2 0223 movs r3, #2 1472 00c4 8361 str r3, [r0, #24] 1473 00c6 C5E7 b .L167 1474 .L170: 1475 .align 2 1476 .L169: 1477 00c8 00380240 .word 1073887232 1478 .cfi_endproc 1479 .LFE140: 1481 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 1482 .align 1 1483 .global HAL_RCC_GetClockConfig 1484 .syntax unified 1485 .thumb 1486 .thumb_func 1487 .fpu fpv4-sp-d16 1489 HAL_RCC_GetClockConfig: 1490 .LFB141: 1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_ClkInitStruct according to the internal 1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1491 .loc 1 1031 0 1492 .cfi_startproc 1493 @ args = 0, pretend = 0, frame = 0 1494 @ frame_needed = 0, uses_anonymous_args = 0 1495 @ link register save eliminated. 1496 .LVL101: 1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ 1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 1497 .loc 1 1033 0 1498 0000 0F23 movs r3, #15 1499 0002 0360 str r3, [r0] 1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 1500 .loc 1 1036 0 1501 0004 0B4B ldr r3, .L172 1502 0006 9A68 ldr r2, [r3, #8] 1503 0008 02F00302 and r2, r2, #3 1504 000c 4260 str r2, [r0, #4] ARM GAS /tmp/ccxtFLUq.s page 47 1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 1505 .loc 1 1039 0 1506 000e 9A68 ldr r2, [r3, #8] 1507 0010 02F0F002 and r2, r2, #240 1508 0014 8260 str r2, [r0, #8] 1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 1509 .loc 1 1042 0 1510 0016 9A68 ldr r2, [r3, #8] 1511 0018 02F4E052 and r2, r2, #7168 1512 001c C260 str r2, [r0, #12] 1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); 1513 .loc 1 1045 0 1514 001e 9B68 ldr r3, [r3, #8] 1515 0020 DB08 lsrs r3, r3, #3 1516 0022 03F4E053 and r3, r3, #7168 1517 0026 0361 str r3, [r0, #16] 1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 1518 .loc 1 1048 0 1519 0028 034B ldr r3, .L172+4 1520 002a 1B68 ldr r3, [r3] 1521 002c 03F00F03 and r3, r3, #15 1522 0030 0B60 str r3, [r1] 1523 0032 7047 bx lr 1524 .L173: 1525 .align 2 1526 .L172: 1527 0034 00380240 .word 1073887232 1528 0038 003C0240 .word 1073888256 1529 .cfi_endproc 1530 .LFE141: 1532 .section .text.HAL_RCC_CSSCallback,"ax",%progbits 1533 .align 1 1534 .weak HAL_RCC_CSSCallback 1535 .syntax unified 1536 .thumb 1537 .thumb_func 1538 .fpu fpv4-sp-d16 1540 HAL_RCC_CSSCallback: 1541 .LFB143: 1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. 1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ ARM GAS /tmp/ccxtFLUq.s page 48 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) 1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback 1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1542 .loc 1 1074 0 1543 .cfi_startproc 1544 @ args = 0, pretend = 0, frame = 0 1545 @ frame_needed = 0, uses_anonymous_args = 0 1546 @ link register save eliminated. 1547 0000 7047 bx lr 1548 .cfi_endproc 1549 .LFE143: 1551 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 1552 .align 1 1553 .global HAL_RCC_NMI_IRQHandler 1554 .syntax unified 1555 .thumb 1556 .thumb_func 1557 .fpu fpv4-sp-d16 1559 HAL_RCC_NMI_IRQHandler: 1560 .LFB142: 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1561 .loc 1 1057 0 1562 .cfi_startproc 1563 @ args = 0, pretend = 0, frame = 0 1564 @ frame_needed = 0, uses_anonymous_args = 0 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1565 .loc 1 1057 0 1566 0000 08B5 push {r3, lr} 1567 .LCFI16: 1568 .cfi_def_cfa_offset 8 1569 .cfi_offset 3, -8 1570 .cfi_offset 14, -4 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1571 .loc 1 1059 0 1572 0002 064B ldr r3, .L179 1573 0004 DB68 ldr r3, [r3, #12] 1574 0006 13F0800F tst r3, #128 1575 000a 00D1 bne .L178 1576 .L175: 1577 000c 08BD pop {r3, pc} 1578 .L178: 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1579 .loc 1 1062 0 1580 000e FFF7FEFF bl HAL_RCC_CSSCallback ARM GAS /tmp/ccxtFLUq.s page 49 1581 .LVL102: 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1582 .loc 1 1065 0 1583 0012 8022 movs r2, #128 1584 0014 024B ldr r3, .L179+4 1585 0016 1A70 strb r2, [r3] 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1586 .loc 1 1067 0 1587 0018 F8E7 b .L175 1588 .L180: 1589 001a 00BF .align 2 1590 .L179: 1591 001c 00380240 .word 1073887232 1592 0020 0E380240 .word 1073887246 1593 .cfi_endproc 1594 .LFE142: 1596 .text 1597 .Letext0: 1598 .file 2 "/usr/include/newlib/machine/_default_types.h" 1599 .file 3 "/usr/include/newlib/sys/_stdint.h" 1600 .file 4 "Drivers/CMSIS/Include/core_cm4.h" 1601 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h" 1602 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h" 1603 .file 7 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 1604 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 1605 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" 1606 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" 1607 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 1608 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/ccxtFLUq.s page 50 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_rcc.c /tmp/ccxtFLUq.s:18 .text.HAL_RCC_DeInit:0000000000000000 $t /tmp/ccxtFLUq.s:25 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit /tmp/ccxtFLUq.s:40 .text.HAL_RCC_OscConfig:0000000000000000 $t /tmp/ccxtFLUq.s:47 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig /tmp/ccxtFLUq.s:504 .text.HAL_RCC_OscConfig:00000000000002b4 $d /tmp/ccxtFLUq.s:510 .text.HAL_RCC_OscConfig:00000000000002c4 $t /tmp/ccxtFLUq.s:679 .text.HAL_RCC_OscConfig:0000000000000390 $d /tmp/ccxtFLUq.s:685 .text.HAL_RCC_MCOConfig:0000000000000000 $t /tmp/ccxtFLUq.s:692 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig /tmp/ccxtFLUq.s:811 .text.HAL_RCC_MCOConfig:0000000000000090 $d /tmp/ccxtFLUq.s:818 .text.HAL_RCC_EnableCSS:0000000000000000 $t /tmp/ccxtFLUq.s:825 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS /tmp/ccxtFLUq.s:840 .text.HAL_RCC_EnableCSS:0000000000000008 $d /tmp/ccxtFLUq.s:845 .text.HAL_RCC_DisableCSS:0000000000000000 $t /tmp/ccxtFLUq.s:852 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS /tmp/ccxtFLUq.s:867 .text.HAL_RCC_DisableCSS:0000000000000008 $d /tmp/ccxtFLUq.s:873 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t /tmp/ccxtFLUq.s:880 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq /tmp/ccxtFLUq.s:980 .text.HAL_RCC_GetSysClockFreq:0000000000000098 $d /tmp/ccxtFLUq.s:987 .text.HAL_RCC_ClockConfig:0000000000000000 $t /tmp/ccxtFLUq.s:994 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig /tmp/ccxtFLUq.s:1227 .text.HAL_RCC_ClockConfig:0000000000000148 $d /tmp/ccxtFLUq.s:1235 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t /tmp/ccxtFLUq.s:1242 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq /tmp/ccxtFLUq.s:1256 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d /tmp/ccxtFLUq.s:1261 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t /tmp/ccxtFLUq.s:1268 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq /tmp/ccxtFLUq.s:1293 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d /tmp/ccxtFLUq.s:1299 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 $t /tmp/ccxtFLUq.s:1306 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 HAL_RCC_GetPCLK2Freq /tmp/ccxtFLUq.s:1331 .text.HAL_RCC_GetPCLK2Freq:0000000000000018 $d /tmp/ccxtFLUq.s:1337 .text.HAL_RCC_GetOscConfig:0000000000000000 $t /tmp/ccxtFLUq.s:1344 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig /tmp/ccxtFLUq.s:1477 .text.HAL_RCC_GetOscConfig:00000000000000c8 $d /tmp/ccxtFLUq.s:1482 .text.HAL_RCC_GetClockConfig:0000000000000000 $t /tmp/ccxtFLUq.s:1489 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig /tmp/ccxtFLUq.s:1527 .text.HAL_RCC_GetClockConfig:0000000000000034 $d /tmp/ccxtFLUq.s:1533 .text.HAL_RCC_CSSCallback:0000000000000000 $t /tmp/ccxtFLUq.s:1540 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback /tmp/ccxtFLUq.s:1552 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t /tmp/ccxtFLUq.s:1559 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler /tmp/ccxtFLUq.s:1591 .text.HAL_RCC_NMI_IRQHandler:000000000000001c $d .debug_frame:0000000000000010 $d UNDEFINED SYMBOLS HAL_GetTick HAL_GPIO_Init __aeabi_uldivmod HAL_InitTick AHBPrescTable SystemCoreClock APBPrescTable