ARM GAS /tmp/ccO5fmWO.s page 1
1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 1
11 .eabi_attribute 34, 1
12 .eabi_attribute 18, 4
13 .file "main.c"
14 .text
15 .Ltext0:
16 .cfi_sections .debug_frame
17 .section .text.SystemClock_Config,"ax",%progbits
18 .align 1
19 .global SystemClock_Config
20 .syntax unified
21 .thumb
22 .thumb_func
23 .fpu fpv4-sp-d16
25 SystemClock_Config:
26 .LFB131:
27 .file 1 "Src/main.c"
1:Src/main.c **** /* USER CODE BEGIN Header */
2:Src/main.c **** /**
3:Src/main.c **** ******************************************************************************
4:Src/main.c **** * @file : main.c
5:Src/main.c **** * @brief : Main program body
6:Src/main.c **** ******************************************************************************
7:Src/main.c **** * @attention
8:Src/main.c **** *
9:Src/main.c **** *
© Copyright (c) 2019 STMicroelectronics.
10:Src/main.c **** * All rights reserved.
11:Src/main.c **** *
12:Src/main.c **** * This software component is licensed by ST under Ultimate Liberty license
13:Src/main.c **** * SLA0044, the "License"; You may not use this file except in compliance with
14:Src/main.c **** * the License. You may obtain a copy of the License at:
15:Src/main.c **** * www.st.com/SLA0044
16:Src/main.c **** *
17:Src/main.c **** ******************************************************************************
18:Src/main.c **** */
19:Src/main.c **** /* USER CODE END Header */
20:Src/main.c ****
21:Src/main.c **** /* Includes ------------------------------------------------------------------*/
22:Src/main.c **** #include "main.h"
23:Src/main.c **** #include "usart.h"
24:Src/main.c **** #include "gpio.h"
25:Src/main.c **** /* Private includes ----------------------------------------------------------*/
26:Src/main.c **** /* USER CODE BEGIN Includes */
27:Src/main.c ****
28:Src/main.c **** /* USER CODE END Includes */
29:Src/main.c ****
30:Src/main.c **** /* Private typedef -----------------------------------------------------------*/
31:Src/main.c **** /* USER CODE BEGIN PTD */
ARM GAS /tmp/ccO5fmWO.s page 2
32:Src/main.c ****
33:Src/main.c **** /* USER CODE END PTD */
34:Src/main.c ****
35:Src/main.c **** /* Private define ------------------------------------------------------------*/
36:Src/main.c **** /* USER CODE BEGIN PD */
37:Src/main.c ****
38:Src/main.c **** /* USER CODE END PD */
39:Src/main.c ****
40:Src/main.c **** /* Private macro -------------------------------------------------------------*/
41:Src/main.c **** /* USER CODE BEGIN PM */
42:Src/main.c ****
43:Src/main.c **** /* USER CODE END PM */
44:Src/main.c ****
45:Src/main.c **** /* Private variables ---------------------------------------------------------*/
46:Src/main.c ****
47:Src/main.c **** #define ApplicationAddress 0x8010000
48:Src/main.c **** #define VECT_TAB_OFFSET 0x10000
49:Src/main.c ****
50:Src/main.c **** int i;
51:Src/main.c **** /* USER CODE BEGIN PV */
52:Src/main.c **** uint8_t msg[7]={0xFF,0xFF,0x00,0x00,0x00,0x00,0x0D};
53:Src/main.c **** uint8_t NACK[1]={0x79};
54:Src/main.c **** int rf=0;
55:Src/main.c **** int row=0;
56:Src/main.c **** int data_count=0;
57:Src/main.c **** uint32_t temp[10000];
58:Src/main.c **** uint32_t FlashData1[10000];
59:Src/main.c **** uint8_t FlashData[16];
60:Src/main.c **** uint8_t com[7]={0xFF,0xFF,0x00,0x00,0x00,0x01,0x0D};
61:Src/main.c **** uint8_t com1[7]={0xFF,0xFF,0x00,0x00,0x00,0x02,0x0D};
62:Src/main.c **** uint8_t start[7]={0xFF,0xFF,0x00,0x00,0x00,0x03,0x0D};
63:Src/main.c ****
64:Src/main.c **** /* USER CODE END PV */
65:Src/main.c ****
66:Src/main.c **** /* Private function prototypes -----------------------------------------------*/
67:Src/main.c **** void SystemClock_Config(void);
68:Src/main.c **** void UserAppStart(void);
69:Src/main.c **** void writeFlashTest(void);
70:Src/main.c **** void printFlashTest(void);
71:Src/main.c **** /* USER CODE BEGIN PFP */
72:Src/main.c ****
73:Src/main.c **** /* USER CODE END PFP */
74:Src/main.c ****
75:Src/main.c **** /* Private user code ---------------------------------------------------------*/
76:Src/main.c **** /* USER CODE BEGIN 0 */
77:Src/main.c ****
78:Src/main.c **** /* USER CODE END 0 */
79:Src/main.c ****
80:Src/main.c **** /**
81:Src/main.c **** * @brief The application entry point.
82:Src/main.c **** * @retval int
83:Src/main.c **** */
84:Src/main.c **** int main(void)
85:Src/main.c **** {
86:Src/main.c **** /* USER CODE BEGIN 1 */
87:Src/main.c **** /* USER CODE END 1 */
88:Src/main.c ****
ARM GAS /tmp/ccO5fmWO.s page 3
89:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
90:Src/main.c ****
91:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
92:Src/main.c **** HAL_Init();
93:Src/main.c **** /* USER CODE BEGIN Init */
94:Src/main.c ****
95:Src/main.c **** /* USER CODE END Init */
96:Src/main.c **** /* Configure the system clock */
97:Src/main.c **** SystemClock_Config();
98:Src/main.c ****
99:Src/main.c **** /* USER CODE BEGIN SysInit */
100:Src/main.c ****
101:Src/main.c **** /* USER CODE END SysInit */
102:Src/main.c ****
103:Src/main.c **** /* Initialize all configured peripherals */
104:Src/main.c **** MX_GPIO_Init();
105:Src/main.c **** MX_USART2_UART_Init();
106:Src/main.c **** MX_UART4_Init();
107:Src/main.c **** MX_USART1_UART_Init();
108:Src/main.c **** /* USER CODE BEGIN 2 */
109:Src/main.c **** SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
110:Src/main.c **** /*------Zigbee setup-----------------------------------------------*/
111:Src/main.c **** HAL_UART_Transmit(&huart4,(uint8_t*)start,sizeof(start),10);
112:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_14, GPIO_PIN_SET);
113:Src/main.c **** /*-----------------------------------------------------*/
114:Src/main.c **** /* USER CODE END 2 */
115:Src/main.c **** /* Infinite loop */
116:Src/main.c **** /* USER CODE BEGIN WHILE */
117:Src/main.c **** while (1)
118:Src/main.c **** {
119:Src/main.c **** /* USER CODE END WHILE */
120:Src/main.c **** if(rf==0)
121:Src/main.c **** {
122:Src/main.c **** HAL_UART_Receive_IT(&huart4, (uint8_t *)msg,sizeof(msg));
123:Src/main.c **** }
124:Src/main.c **** else
125:Src/main.c **** {
126:Src/main.c **** HAL_UART_Receive_IT(&huart4, (uint8_t *)FlashData,sizeof(FlashData));
127:Src/main.c **** }
128:Src/main.c ****
129:Src/main.c ****
130:Src/main.c ****
131:Src/main.c ****
132:Src/main.c **** //HAL_UART_Receive_IT(&huart4, (uint8_t *)msg,sizeof(msg));
133:Src/main.c ****
134:Src/main.c ****
135:Src/main.c **** /* USER CODE BEGIN 3 */
136:Src/main.c **** }
137:Src/main.c **** /* USER CODE END 3 */
138:Src/main.c **** }
139:Src/main.c ****
140:Src/main.c **** /**
141:Src/main.c **** * @brief System Clock Configuration
142:Src/main.c **** * @retval None
143:Src/main.c **** */
144:Src/main.c **** void SystemClock_Config(void)
145:Src/main.c **** {
ARM GAS /tmp/ccO5fmWO.s page 4
28 .loc 1 145 0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 80
31 @ frame_needed = 0, uses_anonymous_args = 0
32 0000 30B5 push {r4, r5, lr}
33 .LCFI0:
34 .cfi_def_cfa_offset 12
35 .cfi_offset 4, -12
36 .cfi_offset 5, -8
37 .cfi_offset 14, -4
38 0002 95B0 sub sp, sp, #84
39 .LCFI1:
40 .cfi_def_cfa_offset 96
146:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
41 .loc 1 146 0
42 0004 3022 movs r2, #48
43 0006 0021 movs r1, #0
44 0008 08A8 add r0, sp, #32
45 000a FFF7FEFF bl memset
46 .LVL0:
147:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
47 .loc 1 147 0
48 000e 0024 movs r4, #0
49 0010 0394 str r4, [sp, #12]
50 0012 0494 str r4, [sp, #16]
51 0014 0594 str r4, [sp, #20]
52 0016 0694 str r4, [sp, #24]
53 0018 0794 str r4, [sp, #28]
54 .LBB4:
148:Src/main.c ****
149:Src/main.c **** /** Configure the main internal regulator output voltage
150:Src/main.c **** */
151:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE();
55 .loc 1 151 0
56 001a 0194 str r4, [sp, #4]
57 001c 1A4B ldr r3, .L3
58 001e 1A6C ldr r2, [r3, #64]
59 0020 42F08052 orr r2, r2, #268435456
60 0024 1A64 str r2, [r3, #64]
61 0026 1B6C ldr r3, [r3, #64]
62 0028 03F08053 and r3, r3, #268435456
63 002c 0193 str r3, [sp, #4]
64 002e 019B ldr r3, [sp, #4]
65 .LBE4:
66 .LBB5:
152:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
67 .loc 1 152 0
68 0030 0294 str r4, [sp, #8]
69 0032 164B ldr r3, .L3+4
70 0034 1A68 ldr r2, [r3]
71 0036 42F48042 orr r2, r2, #16384
72 003a 1A60 str r2, [r3]
73 003c 1B68 ldr r3, [r3]
74 003e 03F48043 and r3, r3, #16384
75 0042 0293 str r3, [sp, #8]
76 0044 029B ldr r3, [sp, #8]
77 .LBE5:
ARM GAS /tmp/ccO5fmWO.s page 5
153:Src/main.c **** /** Initializes the CPU, AHB and APB busses clocks
154:Src/main.c **** */
155:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
78 .loc 1 155 0
79 0046 0225 movs r5, #2
80 0048 0895 str r5, [sp, #32]
156:Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
81 .loc 1 156 0
82 004a 0123 movs r3, #1
83 004c 0B93 str r3, [sp, #44]
157:Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
84 .loc 1 157 0
85 004e 1023 movs r3, #16
86 0050 0C93 str r3, [sp, #48]
158:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
87 .loc 1 158 0
88 0052 0E95 str r5, [sp, #56]
159:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
89 .loc 1 159 0
90 0054 0F94 str r4, [sp, #60]
160:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 8;
91 .loc 1 160 0
92 0056 0823 movs r3, #8
93 0058 1093 str r3, [sp, #64]
161:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 72;
94 .loc 1 161 0
95 005a 4823 movs r3, #72
96 005c 1193 str r3, [sp, #68]
162:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
97 .loc 1 162 0
98 005e 1295 str r5, [sp, #72]
163:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 3;
99 .loc 1 163 0
100 0060 0323 movs r3, #3
101 0062 1393 str r3, [sp, #76]
164:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
102 .loc 1 164 0
103 0064 08A8 add r0, sp, #32
104 0066 FFF7FEFF bl HAL_RCC_OscConfig
105 .LVL1:
165:Src/main.c **** {
166:Src/main.c **** Error_Handler();
167:Src/main.c **** }
168:Src/main.c **** /** Initializes the CPU, AHB and APB busses clocks
169:Src/main.c **** */
170:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
106 .loc 1 170 0
107 006a 0F23 movs r3, #15
108 006c 0393 str r3, [sp, #12]
171:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
172:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
109 .loc 1 172 0
110 006e 0495 str r5, [sp, #16]
173:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
111 .loc 1 173 0
112 0070 0594 str r4, [sp, #20]
174:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
ARM GAS /tmp/ccO5fmWO.s page 6
113 .loc 1 174 0
114 0072 4FF48053 mov r3, #4096
115 0076 0693 str r3, [sp, #24]
175:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
116 .loc 1 175 0
117 0078 0794 str r4, [sp, #28]
176:Src/main.c ****
177:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
118 .loc 1 177 0
119 007a 2946 mov r1, r5
120 007c 03A8 add r0, sp, #12
121 007e FFF7FEFF bl HAL_RCC_ClockConfig
122 .LVL2:
178:Src/main.c **** {
179:Src/main.c **** Error_Handler();
180:Src/main.c **** }
181:Src/main.c **** }
123 .loc 1 181 0
124 0082 15B0 add sp, sp, #84
125 .LCFI2:
126 .cfi_def_cfa_offset 12
127 @ sp needed
128 0084 30BD pop {r4, r5, pc}
129 .L4:
130 0086 00BF .align 2
131 .L3:
132 0088 00380240 .word 1073887232
133 008c 00700040 .word 1073770496
134 .cfi_endproc
135 .LFE131:
137 .section .text.main,"ax",%progbits
138 .align 1
139 .global main
140 .syntax unified
141 .thumb
142 .thumb_func
143 .fpu fpv4-sp-d16
145 main:
146 .LFB130:
85:Src/main.c **** /* USER CODE BEGIN 1 */
147 .loc 1 85 0
148 .cfi_startproc
149 @ Volatile: function does not return.
150 @ args = 0, pretend = 0, frame = 0
151 @ frame_needed = 0, uses_anonymous_args = 0
152 0000 08B5 push {r3, lr}
153 .LCFI3:
154 .cfi_def_cfa_offset 8
155 .cfi_offset 3, -8
156 .cfi_offset 14, -4
92:Src/main.c **** /* USER CODE BEGIN Init */
157 .loc 1 92 0
158 0002 FFF7FEFF bl HAL_Init
159 .LVL3:
97:Src/main.c ****
160 .loc 1 97 0
161 0006 FFF7FEFF bl SystemClock_Config
ARM GAS /tmp/ccO5fmWO.s page 7
162 .LVL4:
104:Src/main.c **** MX_USART2_UART_Init();
163 .loc 1 104 0
164 000a FFF7FEFF bl MX_GPIO_Init
165 .LVL5:
105:Src/main.c **** MX_UART4_Init();
166 .loc 1 105 0
167 000e FFF7FEFF bl MX_USART2_UART_Init
168 .LVL6:
106:Src/main.c **** MX_USART1_UART_Init();
169 .loc 1 106 0
170 0012 FFF7FEFF bl MX_UART4_Init
171 .LVL7:
107:Src/main.c **** /* USER CODE BEGIN 2 */
172 .loc 1 107 0
173 0016 FFF7FEFF bl MX_USART1_UART_Init
174 .LVL8:
109:Src/main.c **** /*------Zigbee setup-----------------------------------------------*/
175 .loc 1 109 0
176 001a 0F4A ldr r2, .L10
177 001c 0F4B ldr r3, .L10+4
178 001e 9A60 str r2, [r3, #8]
111:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_14, GPIO_PIN_SET);
179 .loc 1 111 0
180 0020 0A23 movs r3, #10
181 0022 0722 movs r2, #7
182 0024 0E49 ldr r1, .L10+8
183 0026 0F48 ldr r0, .L10+12
184 0028 FFF7FEFF bl HAL_UART_Transmit
185 .LVL9:
112:Src/main.c **** /*-----------------------------------------------------*/
186 .loc 1 112 0
187 002c 0122 movs r2, #1
188 002e 4FF48041 mov r1, #16384
189 0032 0D48 ldr r0, .L10+16
190 0034 FFF7FEFF bl HAL_GPIO_WritePin
191 .LVL10:
192 0038 04E0 b .L6
193 .L7:
126:Src/main.c **** }
194 .loc 1 126 0
195 003a 1022 movs r2, #16
196 003c 0B49 ldr r1, .L10+20
197 003e 0948 ldr r0, .L10+12
198 0040 FFF7FEFF bl HAL_UART_Receive_IT
199 .LVL11:
200 .L6:
120:Src/main.c **** {
201 .loc 1 120 0
202 0044 0A4B ldr r3, .L10+24
203 0046 1B68 ldr r3, [r3]
204 0048 002B cmp r3, #0
205 004a F6D1 bne .L7
122:Src/main.c **** }
206 .loc 1 122 0
207 004c 0722 movs r2, #7
208 004e 0949 ldr r1, .L10+28
ARM GAS /tmp/ccO5fmWO.s page 8
209 0050 0448 ldr r0, .L10+12
210 0052 FFF7FEFF bl HAL_UART_Receive_IT
211 .LVL12:
212 0056 F5E7 b .L6
213 .L11:
214 .align 2
215 .L10:
216 0058 00000108 .word 134283264
217 005c 00ED00E0 .word -536810240
218 0060 00000000 .word .LANCHOR0
219 0064 00000000 .word huart4
220 0068 000C0240 .word 1073875968
221 006c 00000000 .word FlashData
222 0070 00000000 .word .LANCHOR1
223 0074 00000000 .word .LANCHOR2
224 .cfi_endproc
225 .LFE130:
227 .section .text.UserAppStart,"ax",%progbits
228 .align 1
229 .global UserAppStart
230 .syntax unified
231 .thumb
232 .thumb_func
233 .fpu fpv4-sp-d16
235 UserAppStart:
236 .LFB133:
182:Src/main.c ****
183:Src/main.c **** /* USER CODE BEGIN 4 */
184:Src/main.c **** void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
185:Src/main.c **** {
186:Src/main.c **** if(huart->Instance == UART4)
187:Src/main.c **** {
188:Src/main.c **** if(rf==1)
189:Src/main.c **** {
190:Src/main.c **** //printf("row:%d\r\n",row);
191:Src/main.c **** for(i=0;i<4;i++)
192:Src/main.c **** {
193:Src/main.c **** FlashData1[(4*row)+i]=(FlashData[4*i]<<24)+(FlashData[1+(4*i)]<<16)+(FlashData[2+(4*i)]<<8)+F
194:Src/main.c **** //printf("%x\r\n",FlashData1[(4*row)+i]);
195:Src/main.c **** }
196:Src/main.c **** if(row==(data_count-1))
197:Src/main.c **** {
198:Src/main.c **** writeFlashTest();
199:Src/main.c **** printFlashTest();
200:Src/main.c **** UserAppStart();
201:Src/main.c **** rf=0;
202:Src/main.c **** data_count=0;
203:Src/main.c **** row=0;
204:Src/main.c **** }
205:Src/main.c **** row=row+1;
206:Src/main.c ****
207:Src/main.c **** }
208:Src/main.c **** else if(rf==0)
209:Src/main.c **** {
210:Src/main.c ****
211:Src/main.c **** if(msg[0]==0xFF && msg[1]==0x01 && msg[6]==0x0D)
212:Src/main.c **** {
ARM GAS /tmp/ccO5fmWO.s page 9
213:Src/main.c **** HAL_UART_Transmit(&huart4, (uint8_t *)NACK,1,0xFFFF);
214:Src/main.c **** rf=1;
215:Src/main.c **** data_count=msg[2]*100+msg[3];
216:Src/main.c **** }
217:Src/main.c **** if(msg[0]==0xFF && msg[1]==0x02 && msg[6]==0x0D)
218:Src/main.c **** {
219:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_14, GPIO_PIN_SET);
220:Src/main.c **** HAL_UART_Transmit(&huart4,(uint8_t*)com,sizeof(com),10);
221:Src/main.c **** }
222:Src/main.c **** if(msg[0]==0xFF && msg[1]==0x03 && msg[6]==0x0D)
223:Src/main.c **** {
224:Src/main.c **** HAL_GPIO_WritePin(GPIOD,GPIO_PIN_14, GPIO_PIN_RESET);
225:Src/main.c **** HAL_UART_Transmit(&huart4,(uint8_t*)com1,sizeof(com1),10);
226:Src/main.c **** }
227:Src/main.c ****
228:Src/main.c **** }
229:Src/main.c ****
230:Src/main.c **** }
231:Src/main.c **** }
232:Src/main.c ****
233:Src/main.c ****
234:Src/main.c **** void UserAppStart(void)
235:Src/main.c **** { typedef void (*pFunction)(void);
237 .loc 1 235 0
238 .cfi_startproc
239 @ args = 0, pretend = 0, frame = 0
240 @ frame_needed = 0, uses_anonymous_args = 0
241 0000 08B5 push {r3, lr}
242 .LCFI4:
243 .cfi_def_cfa_offset 8
244 .cfi_offset 3, -8
245 .cfi_offset 14, -4
236:Src/main.c **** pFunction Jump_To_Application;
237:Src/main.c **** uint32_t JumpAddress;
238:Src/main.c **** if (((*(__IO uint32_t*)ApplicationAddress) & 0x2FFE0000 ) == 0x20000000)
246 .loc 1 238 0
247 0002 084B ldr r3, .L16
248 0004 1A68 ldr r2, [r3]
249 0006 084B ldr r3, .L16+4
250 0008 1340 ands r3, r3, r2
251 000a B3F1005F cmp r3, #536870912
252 000e 00D0 beq .L15
253 .L12:
254 0010 08BD pop {r3, pc}
255 .L15:
239:Src/main.c **** {
240:Src/main.c **** /* Jump to user application */
241:Src/main.c **** JumpAddress = *(__IO uint32_t*) (ApplicationAddress + 4);
256 .loc 1 241 0
257 0012 064B ldr r3, .L16+8
258 0014 1B68 ldr r3, [r3]
259 .LVL13:
242:Src/main.c **** Jump_To_Application = (pFunction) JumpAddress;
243:Src/main.c **** /* Initialize user application's Stack Pointer */
244:Src/main.c **** __set_MSP(*(__IO uint32_t*) ApplicationAddress);
260 .loc 1 244 0
261 0016 034A ldr r2, .L16
ARM GAS /tmp/ccO5fmWO.s page 10
262 0018 1268 ldr r2, [r2]
263 .LVL14:
264 .LBB6:
265 .LBB7:
266 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
ARM GAS /tmp/ccO5fmWO.s page 11
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccO5fmWO.s page 12
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
ARM GAS /tmp/ccO5fmWO.s page 13
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
ARM GAS /tmp/ccO5fmWO.s page 14
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccO5fmWO.s page 15
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
267 .loc 2 333 0
268 .syntax unified
269 @ 333 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
270 001a 82F30888 MSR msp, r2
ARM GAS /tmp/ccO5fmWO.s page 16
271 @ 0 "" 2
272 .LVL15:
273 .thumb
274 .syntax unified
275 .LBE7:
276 .LBE6:
245:Src/main.c **** Jump_To_Application();
277 .loc 1 245 0
278 001e 9847 blx r3
279 .LVL16:
246:Src/main.c **** }
247:Src/main.c **** }
280 .loc 1 247 0
281 0020 F6E7 b .L12
282 .L17:
283 0022 00BF .align 2
284 .L16:
285 0024 00000108 .word 134283264
286 0028 0000FE2F .word 805175296
287 002c 04000108 .word 134283268
288 .cfi_endproc
289 .LFE133:
291 .section .text.writeFlashTest,"ax",%progbits
292 .align 1
293 .global writeFlashTest
294 .syntax unified
295 .thumb
296 .thumb_func
297 .fpu fpv4-sp-d16
299 writeFlashTest:
300 .LFB134:
248:Src/main.c ****
249:Src/main.c ****
250:Src/main.c **** void writeFlashTest(void)
251:Src/main.c **** {
301 .loc 1 251 0
302 .cfi_startproc
303 @ args = 0, pretend = 0, frame = 24
304 @ frame_needed = 0, uses_anonymous_args = 0
305 0000 10B5 push {r4, lr}
306 .LCFI5:
307 .cfi_def_cfa_offset 8
308 .cfi_offset 4, -8
309 .cfi_offset 14, -4
310 0002 86B0 sub sp, sp, #24
311 .LCFI6:
312 .cfi_def_cfa_offset 32
252:Src/main.c **** FLASH_EraseInitTypeDef pEraseInit;
253:Src/main.c ****
254:Src/main.c **** HAL_FLASH_Unlock();
313 .loc 1 254 0
314 0004 FFF7FEFF bl HAL_FLASH_Unlock
315 .LVL17:
255:Src/main.c ****
256:Src/main.c **** pEraseInit.TypeErase = FLASH_TYPEERASE_SECTORS;
316 .loc 1 256 0
317 0008 0024 movs r4, #0
ARM GAS /tmp/ccO5fmWO.s page 17
318 000a 0194 str r4, [sp, #4]
257:Src/main.c **** pEraseInit.VoltageRange = FLASH_VOLTAGE_RANGE_3;
319 .loc 1 257 0
320 000c 0223 movs r3, #2
321 000e 0593 str r3, [sp, #20]
258:Src/main.c **** pEraseInit.Sector = FLASH_SECTOR_4;
322 .loc 1 258 0
323 0010 0423 movs r3, #4
324 0012 0393 str r3, [sp, #12]
259:Src/main.c **** pEraseInit.NbSectors = 1;
325 .loc 1 259 0
326 0014 0123 movs r3, #1
327 0016 0493 str r3, [sp, #16]
260:Src/main.c **** uint32_t PageError=0;
328 .loc 1 260 0
329 0018 06A9 add r1, sp, #24
330 001a 41F8184D str r4, [r1, #-24]!
261:Src/main.c **** HAL_FLASHEx_Erase(&pEraseInit,&PageError);
331 .loc 1 261 0
332 001e 01A8 add r0, sp, #4
333 0020 FFF7FEFF bl HAL_FLASHEx_Erase
334 .LVL18:
262:Src/main.c **** for(i=0;i<(data_count*4);i++)
335 .loc 1 262 0
336 0024 0E4B ldr r3, .L22
337 0026 1C60 str r4, [r3]
338 0028 0FE0 b .L19
339 .L20:
263:Src/main.c **** {
264:Src/main.c ****
265:Src/main.c **** HAL_FLASH_Program(TYPEPROGRAM_WORD,ApplicationAddress+(i*4),FlashData1[i]);
340 .loc 1 265 0 discriminator 3
341 002a 03F10071 add r1, r3, #33554432
342 002e 01F58041 add r1, r1, #16384
343 0032 0C4A ldr r2, .L22+4
344 0034 52F82320 ldr r2, [r2, r3, lsl #2]
345 0038 0023 movs r3, #0
346 003a 8900 lsls r1, r1, #2
347 003c 0220 movs r0, #2
348 003e FFF7FEFF bl HAL_FLASH_Program
349 .LVL19:
262:Src/main.c **** for(i=0;i<(data_count*4);i++)
350 .loc 1 262 0 discriminator 3
351 0042 074A ldr r2, .L22
352 0044 1368 ldr r3, [r2]
353 0046 0133 adds r3, r3, #1
354 0048 1360 str r3, [r2]
355 .L19:
262:Src/main.c **** for(i=0;i<(data_count*4);i++)
356 .loc 1 262 0 is_stmt 0 discriminator 1
357 004a 074B ldr r3, .L22+8
358 004c 1A68 ldr r2, [r3]
359 004e 044B ldr r3, .L22
360 0050 1B68 ldr r3, [r3]
361 0052 B3EB820F cmp r3, r2, lsl #2
362 0056 E8DB blt .L20
266:Src/main.c ****
ARM GAS /tmp/ccO5fmWO.s page 18
267:Src/main.c **** }
268:Src/main.c ****
269:Src/main.c ****
270:Src/main.c ****
271:Src/main.c **** HAL_FLASH_Lock();
363 .loc 1 271 0 is_stmt 1
364 0058 FFF7FEFF bl HAL_FLASH_Lock
365 .LVL20:
272:Src/main.c **** }
366 .loc 1 272 0
367 005c 06B0 add sp, sp, #24
368 .LCFI7:
369 .cfi_def_cfa_offset 8
370 @ sp needed
371 005e 10BD pop {r4, pc}
372 .L23:
373 .align 2
374 .L22:
375 0060 00000000 .word i
376 0064 00000000 .word FlashData1
377 0068 00000000 .word .LANCHOR3
378 .cfi_endproc
379 .LFE134:
381 .section .text.printFlashTest,"ax",%progbits
382 .align 1
383 .global printFlashTest
384 .syntax unified
385 .thumb
386 .thumb_func
387 .fpu fpv4-sp-d16
389 printFlashTest:
390 .LFB135:
273:Src/main.c **** void printFlashTest(void)
274:Src/main.c **** {
391 .loc 1 274 0
392 .cfi_startproc
393 @ args = 0, pretend = 0, frame = 0
394 @ frame_needed = 0, uses_anonymous_args = 0
395 @ link register save eliminated.
275:Src/main.c **** for(i=0;i<(data_count*4);i++)
396 .loc 1 275 0
397 0000 0022 movs r2, #0
398 0002 0B4B ldr r3, .L27
399 0004 1A60 str r2, [r3]
400 0006 0BE0 b .L25
401 .L26:
276:Src/main.c **** {
277:Src/main.c **** temp[i] = *(__IO uint32_t*)(ApplicationAddress+(i*4));
402 .loc 1 277 0 discriminator 3
403 0008 03F10072 add r2, r3, #33554432
404 000c 02F58042 add r2, r2, #16384
405 0010 9200 lsls r2, r2, #2
406 0012 1168 ldr r1, [r2]
407 0014 074A ldr r2, .L27+4
408 0016 42F82310 str r1, [r2, r3, lsl #2]
275:Src/main.c **** for(i=0;i<(data_count*4);i++)
409 .loc 1 275 0 discriminator 3
ARM GAS /tmp/ccO5fmWO.s page 19
410 001a 0133 adds r3, r3, #1
411 001c 044A ldr r2, .L27
412 001e 1360 str r3, [r2]
413 .L25:
275:Src/main.c **** for(i=0;i<(data_count*4);i++)
414 .loc 1 275 0 is_stmt 0 discriminator 1
415 0020 054B ldr r3, .L27+8
416 0022 1A68 ldr r2, [r3]
417 0024 024B ldr r3, .L27
418 0026 1B68 ldr r3, [r3]
419 0028 B3EB820F cmp r3, r2, lsl #2
420 002c ECDB blt .L26
278:Src/main.c **** //printf("addr:0x%x, data:0x%x\r\n",ApplicationAddress+(i*4), temp[i]);
279:Src/main.c **** //printf("%x\r\n", temp[i]);
280:Src/main.c ****
281:Src/main.c **** }
282:Src/main.c **** }
421 .loc 1 282 0 is_stmt 1
422 002e 7047 bx lr
423 .L28:
424 .align 2
425 .L27:
426 0030 00000000 .word i
427 0034 00000000 .word temp
428 0038 00000000 .word .LANCHOR3
429 .cfi_endproc
430 .LFE135:
432 .section .text.HAL_UART_RxCpltCallback,"ax",%progbits
433 .align 1
434 .global HAL_UART_RxCpltCallback
435 .syntax unified
436 .thumb
437 .thumb_func
438 .fpu fpv4-sp-d16
440 HAL_UART_RxCpltCallback:
441 .LFB132:
185:Src/main.c **** if(huart->Instance == UART4)
442 .loc 1 185 0
443 .cfi_startproc
444 @ args = 0, pretend = 0, frame = 0
445 @ frame_needed = 0, uses_anonymous_args = 0
446 .LVL21:
447 0000 38B5 push {r3, r4, r5, lr}
448 .LCFI8:
449 .cfi_def_cfa_offset 16
450 .cfi_offset 3, -16
451 .cfi_offset 4, -12
452 .cfi_offset 5, -8
453 .cfi_offset 14, -4
186:Src/main.c **** {
454 .loc 1 186 0
455 0002 0268 ldr r2, [r0]
456 0004 4B4B ldr r3, .L43
457 0006 9A42 cmp r2, r3
458 0008 00D0 beq .L38
459 .LVL22:
460 .L29:
ARM GAS /tmp/ccO5fmWO.s page 20
461 000a 38BD pop {r3, r4, r5, pc}
462 .LVL23:
463 .L38:
188:Src/main.c **** {
464 .loc 1 188 0
465 000c 4A4B ldr r3, .L43+4
466 000e 1B68 ldr r3, [r3]
467 0010 012B cmp r3, #1
468 0012 22D0 beq .L39
208:Src/main.c **** {
469 .loc 1 208 0
470 0014 002B cmp r3, #0
471 0016 F8D1 bne .L29
211:Src/main.c **** {
472 .loc 1 211 0
473 0018 484B ldr r3, .L43+8
474 001a 1B78 ldrb r3, [r3] @ zero_extendqisi2
475 001c FF2B cmp r3, #255
476 001e 58D0 beq .L40
477 .LVL24:
478 .L35:
217:Src/main.c **** {
479 .loc 1 217 0
480 0020 464B ldr r3, .L43+8
481 0022 1B78 ldrb r3, [r3] @ zero_extendqisi2
482 0024 FF2B cmp r3, #255
483 0026 6FD0 beq .L41
484 .L36:
222:Src/main.c **** {
485 .loc 1 222 0
486 0028 444B ldr r3, .L43+8
487 002a 1B78 ldrb r3, [r3] @ zero_extendqisi2
488 002c FF2B cmp r3, #255
489 002e ECD1 bne .L29
222:Src/main.c **** {
490 .loc 1 222 0 is_stmt 0 discriminator 1
491 0030 424B ldr r3, .L43+8
492 0032 5B78 ldrb r3, [r3, #1] @ zero_extendqisi2
493 0034 032B cmp r3, #3
494 0036 E8D1 bne .L29
222:Src/main.c **** {
495 .loc 1 222 0 discriminator 2
496 0038 404B ldr r3, .L43+8
497 003a 9B79 ldrb r3, [r3, #6] @ zero_extendqisi2
498 003c 0D2B cmp r3, #13
499 003e E4D1 bne .L29
224:Src/main.c **** HAL_UART_Transmit(&huart4,(uint8_t*)com1,sizeof(com1),10);
500 .loc 1 224 0 is_stmt 1
501 0040 0022 movs r2, #0
502 0042 4FF48041 mov r1, #16384
503 0046 3E48 ldr r0, .L43+12
504 0048 FFF7FEFF bl HAL_GPIO_WritePin
505 .LVL25:
225:Src/main.c **** }
506 .loc 1 225 0
507 004c 0A23 movs r3, #10
508 004e 0722 movs r2, #7
ARM GAS /tmp/ccO5fmWO.s page 21
509 0050 3C49 ldr r1, .L43+16
510 0052 3D48 ldr r0, .L43+20
511 0054 FFF7FEFF bl HAL_UART_Transmit
512 .LVL26:
231:Src/main.c ****
513 .loc 1 231 0
514 0058 D7E7 b .L29
515 .LVL27:
516 .L39:
191:Src/main.c **** {
517 .loc 1 191 0
518 005a 0022 movs r2, #0
519 005c 3B4B ldr r3, .L43+24
520 005e 1A60 str r2, [r3]
521 0060 19E0 b .L32
522 .LVL28:
523 .L33:
193:Src/main.c **** //printf("%x\r\n",FlashData1[(4*row)+i]);
524 .loc 1 193 0 discriminator 3
525 0062 3B4B ldr r3, .L43+28
526 0064 1C68 ldr r4, [r3]
527 0066 02EB8404 add r4, r2, r4, lsl #2
528 006a 9100 lsls r1, r2, #2
529 006c 3948 ldr r0, .L43+32
530 006e 10F82250 ldrb r5, [r0, r2, lsl #2] @ zero_extendqisi2
531 0072 4B1C adds r3, r1, #1
532 0074 C35C ldrb r3, [r0, r3] @ zero_extendqisi2
533 0076 1B04 lsls r3, r3, #16
534 0078 03EB0563 add r3, r3, r5, lsl #24
535 007c 8D1C adds r5, r1, #2
536 007e 455D ldrb r5, [r0, r5] @ zero_extendqisi2
537 0080 03EB0523 add r3, r3, r5, lsl #8
538 0084 0331 adds r1, r1, #3
539 0086 415C ldrb r1, [r0, r1] @ zero_extendqisi2
540 0088 0B44 add r3, r3, r1
541 008a 3349 ldr r1, .L43+36
542 008c 41F82430 str r3, [r1, r4, lsl #2]
191:Src/main.c **** {
543 .loc 1 191 0 discriminator 3
544 0090 0132 adds r2, r2, #1
545 0092 2E4B ldr r3, .L43+24
546 0094 1A60 str r2, [r3]
547 .L32:
191:Src/main.c **** {
548 .loc 1 191 0 is_stmt 0 discriminator 1
549 0096 2D4B ldr r3, .L43+24
550 0098 1A68 ldr r2, [r3]
551 009a 032A cmp r2, #3
552 009c E1DD ble .L33
196:Src/main.c **** {
553 .loc 1 196 0 is_stmt 1
554 009e 2F4B ldr r3, .L43+40
555 00a0 1B68 ldr r3, [r3]
556 00a2 013B subs r3, r3, #1
557 00a4 2A4A ldr r2, .L43+28
558 00a6 1268 ldr r2, [r2]
559 00a8 9342 cmp r3, r2
ARM GAS /tmp/ccO5fmWO.s page 22
560 00aa 04D0 beq .L42
561 .L34:
205:Src/main.c ****
562 .loc 1 205 0
563 00ac 284A ldr r2, .L43+28
564 00ae 1368 ldr r3, [r2]
565 00b0 0133 adds r3, r3, #1
566 00b2 1360 str r3, [r2]
567 00b4 38BD pop {r3, r4, r5, pc}
568 .L42:
198:Src/main.c **** printFlashTest();
569 .loc 1 198 0
570 00b6 FFF7FEFF bl writeFlashTest
571 .LVL29:
199:Src/main.c **** UserAppStart();
572 .loc 1 199 0
573 00ba FFF7FEFF bl printFlashTest
574 .LVL30:
200:Src/main.c **** rf=0;
575 .loc 1 200 0
576 00be FFF7FEFF bl UserAppStart
577 .LVL31:
201:Src/main.c **** data_count=0;
578 .loc 1 201 0
579 00c2 0023 movs r3, #0
580 00c4 1C4A ldr r2, .L43+4
581 00c6 1360 str r3, [r2]
202:Src/main.c **** row=0;
582 .loc 1 202 0
583 00c8 244A ldr r2, .L43+40
584 00ca 1360 str r3, [r2]
203:Src/main.c **** }
585 .loc 1 203 0
586 00cc 204A ldr r2, .L43+28
587 00ce 1360 str r3, [r2]
588 00d0 ECE7 b .L34
589 .LVL32:
590 .L40:
211:Src/main.c **** {
591 .loc 1 211 0 discriminator 1
592 00d2 1A4B ldr r3, .L43+8
593 00d4 5B78 ldrb r3, [r3, #1] @ zero_extendqisi2
594 00d6 012B cmp r3, #1
595 00d8 A2D1 bne .L35
211:Src/main.c **** {
596 .loc 1 211 0 is_stmt 0 discriminator 2
597 00da 184B ldr r3, .L43+8
598 00dc 9B79 ldrb r3, [r3, #6] @ zero_extendqisi2
599 00de 0D2B cmp r3, #13
600 00e0 9ED1 bne .L35
213:Src/main.c **** rf=1;
601 .loc 1 213 0 is_stmt 1
602 00e2 4FF6FF73 movw r3, #65535
603 00e6 0122 movs r2, #1
604 00e8 1D49 ldr r1, .L43+44
605 00ea 1748 ldr r0, .L43+20
606 .LVL33:
ARM GAS /tmp/ccO5fmWO.s page 23
607 00ec FFF7FEFF bl HAL_UART_Transmit
608 .LVL34:
214:Src/main.c **** data_count=msg[2]*100+msg[3];
609 .loc 1 214 0
610 00f0 0122 movs r2, #1
611 00f2 114B ldr r3, .L43+4
612 00f4 1A60 str r2, [r3]
215:Src/main.c **** }
613 .loc 1 215 0
614 00f6 114A ldr r2, .L43+8
615 00f8 9378 ldrb r3, [r2, #2] @ zero_extendqisi2
616 00fa D278 ldrb r2, [r2, #3] @ zero_extendqisi2
617 00fc 6421 movs r1, #100
618 00fe 01FB0323 mla r3, r1, r3, r2
619 0102 164A ldr r2, .L43+40
620 0104 1360 str r3, [r2]
621 0106 8BE7 b .L35
622 .L41:
217:Src/main.c **** {
623 .loc 1 217 0 discriminator 1
624 0108 0C4B ldr r3, .L43+8
625 010a 5B78 ldrb r3, [r3, #1] @ zero_extendqisi2
626 010c 022B cmp r3, #2
627 010e 8BD1 bne .L36
217:Src/main.c **** {
628 .loc 1 217 0 is_stmt 0 discriminator 2
629 0110 0A4B ldr r3, .L43+8
630 0112 9B79 ldrb r3, [r3, #6] @ zero_extendqisi2
631 0114 0D2B cmp r3, #13
632 0116 87D1 bne .L36
219:Src/main.c **** HAL_UART_Transmit(&huart4,(uint8_t*)com,sizeof(com),10);
633 .loc 1 219 0 is_stmt 1
634 0118 0122 movs r2, #1
635 011a 4FF48041 mov r1, #16384
636 011e 0848 ldr r0, .L43+12
637 0120 FFF7FEFF bl HAL_GPIO_WritePin
638 .LVL35:
220:Src/main.c **** }
639 .loc 1 220 0
640 0124 0A23 movs r3, #10
641 0126 0722 movs r2, #7
642 0128 0E49 ldr r1, .L43+48
643 012a 0748 ldr r0, .L43+20
644 012c FFF7FEFF bl HAL_UART_Transmit
645 .LVL36:
646 0130 7AE7 b .L36
647 .L44:
648 0132 00BF .align 2
649 .L43:
650 0134 004C0040 .word 1073761280
651 0138 00000000 .word .LANCHOR1
652 013c 00000000 .word .LANCHOR2
653 0140 000C0240 .word 1073875968
654 0144 00000000 .word .LANCHOR7
655 0148 00000000 .word huart4
656 014c 00000000 .word i
657 0150 00000000 .word .LANCHOR4
ARM GAS /tmp/ccO5fmWO.s page 24
658 0154 00000000 .word FlashData
659 0158 00000000 .word FlashData1
660 015c 00000000 .word .LANCHOR3
661 0160 00000000 .word .LANCHOR5
662 0164 00000000 .word .LANCHOR6
663 .cfi_endproc
664 .LFE132:
666 .section .text.Error_Handler,"ax",%progbits
667 .align 1
668 .global Error_Handler
669 .syntax unified
670 .thumb
671 .thumb_func
672 .fpu fpv4-sp-d16
674 Error_Handler:
675 .LFB136:
283:Src/main.c ****
284:Src/main.c ****
285:Src/main.c **** /* USER CODE END 4 */
286:Src/main.c ****
287:Src/main.c **** /**
288:Src/main.c **** * @brief This function is executed in case of error occurrence.
289:Src/main.c **** * @retval None
290:Src/main.c **** */
291:Src/main.c **** void Error_Handler(void)
292:Src/main.c **** {
676 .loc 1 292 0
677 .cfi_startproc
678 @ args = 0, pretend = 0, frame = 0
679 @ frame_needed = 0, uses_anonymous_args = 0
680 @ link register save eliminated.
681 0000 7047 bx lr
682 .cfi_endproc
683 .LFE136:
685 .global start
686 .global com1
687 .global com
688 .comm FlashData,16,4
689 .comm FlashData1,40000,4
690 .comm temp,40000,4
691 .global data_count
692 .global row
693 .global rf
694 .global NACK
695 .global msg
696 .comm i,4,4
697 .section .bss.data_count,"aw",%nobits
698 .align 2
699 .set .LANCHOR3,. + 0
702 data_count:
703 0000 00000000 .space 4
704 .section .bss.rf,"aw",%nobits
705 .align 2
706 .set .LANCHOR1,. + 0
709 rf:
710 0000 00000000 .space 4
711 .section .bss.row,"aw",%nobits
ARM GAS /tmp/ccO5fmWO.s page 25
712 .align 2
713 .set .LANCHOR4,. + 0
716 row:
717 0000 00000000 .space 4
718 .section .data.NACK,"aw",%progbits
719 .align 2
720 .set .LANCHOR5,. + 0
723 NACK:
724 0000 79 .byte 121
725 .section .data.com,"aw",%progbits
726 .align 2
727 .set .LANCHOR6,. + 0
730 com:
731 0000 FF .byte -1
732 0001 FF .byte -1
733 0002 00 .byte 0
734 0003 00 .byte 0
735 0004 00 .byte 0
736 0005 01 .byte 1
737 0006 0D .byte 13
738 .section .data.com1,"aw",%progbits
739 .align 2
740 .set .LANCHOR7,. + 0
743 com1:
744 0000 FF .byte -1
745 0001 FF .byte -1
746 0002 00 .byte 0
747 0003 00 .byte 0
748 0004 00 .byte 0
749 0005 02 .byte 2
750 0006 0D .byte 13
751 .section .data.msg,"aw",%progbits
752 .align 2
753 .set .LANCHOR2,. + 0
756 msg:
757 0000 FF .byte -1
758 0001 FF .byte -1
759 0002 00 .byte 0
760 0003 00 .byte 0
761 0004 00 .byte 0
762 0005 00 .byte 0
763 0006 0D .byte 13
764 .section .data.start,"aw",%progbits
765 .align 2
766 .set .LANCHOR0,. + 0
769 start:
770 0000 FF .byte -1
771 0001 FF .byte -1
772 0002 00 .byte 0
773 0003 00 .byte 0
774 0004 00 .byte 0
775 0005 03 .byte 3
776 0006 0D .byte 13
777 .text
778 .Letext0:
779 .file 3 "/usr/include/newlib/machine/_default_types.h"
780 .file 4 "/usr/include/newlib/sys/_stdint.h"
ARM GAS /tmp/ccO5fmWO.s page 26
781 .file 5 "Drivers/CMSIS/Include/core_cm4.h"
782 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
783 .file 7 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
784 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
785 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
786 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
787 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
788 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
789 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h"
790 .file 14 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
791 .file 15 "Inc/usart.h"
792 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h"
793 .file 17 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
794 .file 18 "Inc/gpio.h"
ARM GAS /tmp/ccO5fmWO.s page 27
DEFINED SYMBOLS
*ABS*:0000000000000000 main.c
/tmp/ccO5fmWO.s:18 .text.SystemClock_Config:0000000000000000 $t
/tmp/ccO5fmWO.s:25 .text.SystemClock_Config:0000000000000000 SystemClock_Config
/tmp/ccO5fmWO.s:132 .text.SystemClock_Config:0000000000000088 $d
/tmp/ccO5fmWO.s:138 .text.main:0000000000000000 $t
/tmp/ccO5fmWO.s:145 .text.main:0000000000000000 main
/tmp/ccO5fmWO.s:216 .text.main:0000000000000058 $d
*COM*:0000000000000010 FlashData
/tmp/ccO5fmWO.s:228 .text.UserAppStart:0000000000000000 $t
/tmp/ccO5fmWO.s:235 .text.UserAppStart:0000000000000000 UserAppStart
/tmp/ccO5fmWO.s:285 .text.UserAppStart:0000000000000024 $d
/tmp/ccO5fmWO.s:292 .text.writeFlashTest:0000000000000000 $t
/tmp/ccO5fmWO.s:299 .text.writeFlashTest:0000000000000000 writeFlashTest
/tmp/ccO5fmWO.s:375 .text.writeFlashTest:0000000000000060 $d
*COM*:0000000000000004 i
*COM*:0000000000009c40 FlashData1
/tmp/ccO5fmWO.s:382 .text.printFlashTest:0000000000000000 $t
/tmp/ccO5fmWO.s:389 .text.printFlashTest:0000000000000000 printFlashTest
/tmp/ccO5fmWO.s:426 .text.printFlashTest:0000000000000030 $d
*COM*:0000000000009c40 temp
/tmp/ccO5fmWO.s:433 .text.HAL_UART_RxCpltCallback:0000000000000000 $t
/tmp/ccO5fmWO.s:440 .text.HAL_UART_RxCpltCallback:0000000000000000 HAL_UART_RxCpltCallback
/tmp/ccO5fmWO.s:650 .text.HAL_UART_RxCpltCallback:0000000000000134 $d
/tmp/ccO5fmWO.s:667 .text.Error_Handler:0000000000000000 $t
/tmp/ccO5fmWO.s:674 .text.Error_Handler:0000000000000000 Error_Handler
/tmp/ccO5fmWO.s:769 .data.start:0000000000000000 start
/tmp/ccO5fmWO.s:743 .data.com1:0000000000000000 com1
/tmp/ccO5fmWO.s:730 .data.com:0000000000000000 com
/tmp/ccO5fmWO.s:702 .bss.data_count:0000000000000000 data_count
/tmp/ccO5fmWO.s:716 .bss.row:0000000000000000 row
/tmp/ccO5fmWO.s:709 .bss.rf:0000000000000000 rf
/tmp/ccO5fmWO.s:723 .data.NACK:0000000000000000 NACK
/tmp/ccO5fmWO.s:756 .data.msg:0000000000000000 msg
/tmp/ccO5fmWO.s:698 .bss.data_count:0000000000000000 $d
/tmp/ccO5fmWO.s:705 .bss.rf:0000000000000000 $d
/tmp/ccO5fmWO.s:712 .bss.row:0000000000000000 $d
/tmp/ccO5fmWO.s:719 .data.NACK:0000000000000000 $d
/tmp/ccO5fmWO.s:726 .data.com:0000000000000000 $d
/tmp/ccO5fmWO.s:739 .data.com1:0000000000000000 $d
/tmp/ccO5fmWO.s:752 .data.msg:0000000000000000 $d
/tmp/ccO5fmWO.s:765 .data.start:0000000000000000 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
memset
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_Init
MX_GPIO_Init
MX_USART2_UART_Init
MX_UART4_Init
MX_USART1_UART_Init
HAL_UART_Transmit
HAL_GPIO_WritePin
HAL_UART_Receive_IT
huart4
ARM GAS /tmp/ccO5fmWO.s page 28
HAL_FLASH_Unlock
HAL_FLASHEx_Erase
HAL_FLASH_Program
HAL_FLASH_Lock